hdmicore_regs      80 drivers/gpu/drm/vc4/vc4_hdmi.c 	void __iomem *hdmicore_regs;
hdmicore_regs      97 drivers/gpu/drm/vc4/vc4_hdmi.c #define HDMI_READ(offset) readl(vc4->hdmi->hdmicore_regs + offset)
hdmicore_regs      98 drivers/gpu/drm/vc4/vc4_hdmi.c #define HDMI_WRITE(offset, val) writel(val, vc4->hdmi->hdmicore_regs + offset)
hdmicore_regs    1324 drivers/gpu/drm/vc4/vc4_hdmi.c 	hdmi->hdmicore_regs = vc4_ioremap_regs(pdev, 0);
hdmicore_regs    1325 drivers/gpu/drm/vc4/vc4_hdmi.c 	if (IS_ERR(hdmi->hdmicore_regs))
hdmicore_regs    1326 drivers/gpu/drm/vc4/vc4_hdmi.c 		return PTR_ERR(hdmi->hdmicore_regs);
hdmicore_regs    1332 drivers/gpu/drm/vc4/vc4_hdmi.c 	hdmi->hdmi_regset.base = hdmi->hdmicore_regs;