hdmi_reg           52 drivers/gpu/drm/gma500/cdv_intel_hdmi.c 	u32 hdmi_reg;
hdmi_reg           89 drivers/gpu/drm/gma500/cdv_intel_hdmi.c 	REG_WRITE(hdmi_priv->hdmi_reg, hdmib);
hdmi_reg           90 drivers/gpu/drm/gma500/cdv_intel_hdmi.c 	REG_READ(hdmi_priv->hdmi_reg);
hdmi_reg          100 drivers/gpu/drm/gma500/cdv_intel_hdmi.c 	hdmib = REG_READ(hdmi_priv->hdmi_reg);
hdmi_reg          103 drivers/gpu/drm/gma500/cdv_intel_hdmi.c 		REG_WRITE(hdmi_priv->hdmi_reg, hdmib & ~HDMIB_PORT_EN);
hdmi_reg          105 drivers/gpu/drm/gma500/cdv_intel_hdmi.c 		REG_WRITE(hdmi_priv->hdmi_reg, hdmib | HDMIB_PORT_EN);
hdmi_reg          106 drivers/gpu/drm/gma500/cdv_intel_hdmi.c 	REG_READ(hdmi_priv->hdmi_reg);
hdmi_reg          115 drivers/gpu/drm/gma500/cdv_intel_hdmi.c 	hdmi_priv->save_HDMIB = REG_READ(hdmi_priv->hdmi_reg);
hdmi_reg          124 drivers/gpu/drm/gma500/cdv_intel_hdmi.c 	REG_WRITE(hdmi_priv->hdmi_reg, hdmi_priv->save_HDMIB);
hdmi_reg          125 drivers/gpu/drm/gma500/cdv_intel_hdmi.c 	REG_READ(hdmi_priv->hdmi_reg);
hdmi_reg          319 drivers/gpu/drm/gma500/cdv_intel_hdmi.c 	hdmi_priv->hdmi_reg = reg;
hdmi_reg         4209 drivers/gpu/drm/i915/display/intel_ddi.c 	intel_dig_port->hdmi.hdmi_reg = DDI_BUF_CTL(port);
hdmi_reg         1334 drivers/gpu/drm/i915/display/intel_display.c 				     i915_reg_t hdmi_reg)
hdmi_reg         1339 drivers/gpu/drm/i915/display/intel_display.c 	state = intel_sdvo_port_enabled(dev_priv, hdmi_reg, &port_pipe);
hdmi_reg         16882 drivers/gpu/drm/i915/display/intel_display.c 				       enum port port, i915_reg_t hdmi_reg)
hdmi_reg         16884 drivers/gpu/drm/i915/display/intel_display.c 	u32 val = I915_READ(hdmi_reg);
hdmi_reg         16896 drivers/gpu/drm/i915/display/intel_display.c 	I915_WRITE(hdmi_reg, val);
hdmi_reg         1097 drivers/gpu/drm/i915/display/intel_display_types.h 	i915_reg_t hdmi_reg;
hdmi_reg           75 drivers/gpu/drm/i915/display/intel_hdmi.c 	WARN(I915_READ(intel_hdmi->hdmi_reg) & enabled_bits,
hdmi_reg         1753 drivers/gpu/drm/i915/display/intel_hdmi.c 	I915_WRITE(intel_hdmi->hdmi_reg, hdmi_val);
hdmi_reg         1754 drivers/gpu/drm/i915/display/intel_hdmi.c 	POSTING_READ(intel_hdmi->hdmi_reg);
hdmi_reg         1770 drivers/gpu/drm/i915/display/intel_hdmi.c 	ret = intel_sdvo_port_enabled(dev_priv, intel_hdmi->hdmi_reg, pipe);
hdmi_reg         1788 drivers/gpu/drm/i915/display/intel_hdmi.c 	tmp = I915_READ(intel_hdmi->hdmi_reg);
hdmi_reg         1864 drivers/gpu/drm/i915/display/intel_hdmi.c 	temp = I915_READ(intel_hdmi->hdmi_reg);
hdmi_reg         1870 drivers/gpu/drm/i915/display/intel_hdmi.c 	I915_WRITE(intel_hdmi->hdmi_reg, temp);
hdmi_reg         1871 drivers/gpu/drm/i915/display/intel_hdmi.c 	POSTING_READ(intel_hdmi->hdmi_reg);
hdmi_reg         1886 drivers/gpu/drm/i915/display/intel_hdmi.c 	temp = I915_READ(intel_hdmi->hdmi_reg);
hdmi_reg         1896 drivers/gpu/drm/i915/display/intel_hdmi.c 	I915_WRITE(intel_hdmi->hdmi_reg, temp);
hdmi_reg         1897 drivers/gpu/drm/i915/display/intel_hdmi.c 	POSTING_READ(intel_hdmi->hdmi_reg);
hdmi_reg         1898 drivers/gpu/drm/i915/display/intel_hdmi.c 	I915_WRITE(intel_hdmi->hdmi_reg, temp);
hdmi_reg         1899 drivers/gpu/drm/i915/display/intel_hdmi.c 	POSTING_READ(intel_hdmi->hdmi_reg);
hdmi_reg         1910 drivers/gpu/drm/i915/display/intel_hdmi.c 		I915_WRITE(intel_hdmi->hdmi_reg, temp & ~SDVO_ENABLE);
hdmi_reg         1911 drivers/gpu/drm/i915/display/intel_hdmi.c 		POSTING_READ(intel_hdmi->hdmi_reg);
hdmi_reg         1917 drivers/gpu/drm/i915/display/intel_hdmi.c 		I915_WRITE(intel_hdmi->hdmi_reg, temp);
hdmi_reg         1918 drivers/gpu/drm/i915/display/intel_hdmi.c 		POSTING_READ(intel_hdmi->hdmi_reg);
hdmi_reg         1919 drivers/gpu/drm/i915/display/intel_hdmi.c 		I915_WRITE(intel_hdmi->hdmi_reg, temp);
hdmi_reg         1920 drivers/gpu/drm/i915/display/intel_hdmi.c 		POSTING_READ(intel_hdmi->hdmi_reg);
hdmi_reg         1938 drivers/gpu/drm/i915/display/intel_hdmi.c 	temp = I915_READ(intel_hdmi->hdmi_reg);
hdmi_reg         1963 drivers/gpu/drm/i915/display/intel_hdmi.c 	I915_WRITE(intel_hdmi->hdmi_reg, temp);
hdmi_reg         1964 drivers/gpu/drm/i915/display/intel_hdmi.c 	POSTING_READ(intel_hdmi->hdmi_reg);
hdmi_reg         1970 drivers/gpu/drm/i915/display/intel_hdmi.c 		I915_WRITE(intel_hdmi->hdmi_reg, temp);
hdmi_reg         1971 drivers/gpu/drm/i915/display/intel_hdmi.c 		POSTING_READ(intel_hdmi->hdmi_reg);
hdmi_reg         2000 drivers/gpu/drm/i915/display/intel_hdmi.c 	temp = I915_READ(intel_hdmi->hdmi_reg);
hdmi_reg         2003 drivers/gpu/drm/i915/display/intel_hdmi.c 	I915_WRITE(intel_hdmi->hdmi_reg, temp);
hdmi_reg         2004 drivers/gpu/drm/i915/display/intel_hdmi.c 	POSTING_READ(intel_hdmi->hdmi_reg);
hdmi_reg         2025 drivers/gpu/drm/i915/display/intel_hdmi.c 		I915_WRITE(intel_hdmi->hdmi_reg, temp);
hdmi_reg         2026 drivers/gpu/drm/i915/display/intel_hdmi.c 		POSTING_READ(intel_hdmi->hdmi_reg);
hdmi_reg         2027 drivers/gpu/drm/i915/display/intel_hdmi.c 		I915_WRITE(intel_hdmi->hdmi_reg, temp);
hdmi_reg         2028 drivers/gpu/drm/i915/display/intel_hdmi.c 		POSTING_READ(intel_hdmi->hdmi_reg);
hdmi_reg         2031 drivers/gpu/drm/i915/display/intel_hdmi.c 		I915_WRITE(intel_hdmi->hdmi_reg, temp);
hdmi_reg         2032 drivers/gpu/drm/i915/display/intel_hdmi.c 		POSTING_READ(intel_hdmi->hdmi_reg);
hdmi_reg         3161 drivers/gpu/drm/i915/display/intel_hdmi.c 		     i915_reg_t hdmi_reg, enum port port)
hdmi_reg         3234 drivers/gpu/drm/i915/display/intel_hdmi.c 	intel_dig_port->hdmi.hdmi_reg = hdmi_reg;
hdmi_reg           27 drivers/gpu/drm/i915/display/intel_hdmi.h void intel_hdmi_init(struct drm_i915_private *dev_priv, i915_reg_t hdmi_reg,