hdisplay 388 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (native_mode->hdisplay != 0 && hdisplay 396 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c } else if (native_mode->hdisplay != 0 && hdisplay 405 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); hdisplay 450 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (common_modes[i].w > native_mode->hdisplay || hdisplay 452 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c (common_modes[i].w == native_mode->hdisplay && hdisplay 620 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (mode->hdisplay != native_mode->hdisplay || hdisplay 629 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (mode->hdisplay == native_mode->hdisplay && hdisplay 687 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) hdisplay 697 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if ((mode->hdisplay > native_mode->hdisplay) || hdisplay 703 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if ((mode->hdisplay != native_mode->hdisplay) || hdisplay 731 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) hdisplay 1351 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) hdisplay 1425 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) hdisplay 1435 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if ((mode->hdisplay > native_mode->hdisplay) || hdisplay 1441 drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c if ((mode->hdisplay != native_mode->hdisplay) || hdisplay 672 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c if ((mode->vdisplay == 480 && mode->hdisplay == 720) || /* 480p */ hdisplay 707 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c else if (mode->hdisplay < amdgpu_encoder->native_mode.hdisplay || hdisplay 718 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c src_h = crtc->mode.hdisplay; hdisplay 719 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c dst_h = amdgpu_crtc->native_mode.hdisplay; hdisplay 730 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c amdgpu_crtc->h_border = (mode->hdisplay >> 5) + 16; hdisplay 738 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c src_h = crtc->mode.hdisplay; hdisplay 739 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c dst_h = crtc->mode.hdisplay - (amdgpu_crtc->h_border * 2); hdisplay 153 drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c unsigned hblank = native_mode->htotal - native_mode->hdisplay; hdisplay 155 drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c unsigned hover = native_mode->hsync_start - native_mode->hdisplay; hdisplay 163 drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c adjusted_mode->hdisplay = native_mode->hdisplay; hdisplay 166 drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c adjusted_mode->htotal = native_mode->hdisplay + hblank; hdisplay 167 drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c adjusted_mode->hsync_start = native_mode->hdisplay + hover; hdisplay 176 drivers/gpu/drm/amd/amdgpu/amdgpu_encoders.c adjusted_mode->crtc_hdisplay = native_mode->hdisplay; hdisplay 2023 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c lvds->native_mode.hdisplay = hdisplay 2027 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c lvds->native_mode.htotal = lvds->native_mode.hdisplay + hdisplay 2029 drivers/gpu/drm/amd/amdgpu/atombios_encoders.c lvds->native_mode.hsync_start = lvds->native_mode.hdisplay + hdisplay 2053 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c viewport_w = crtc->mode.hdisplay; hdisplay 2095 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c viewport_w = crtc->mode.hdisplay; hdisplay 1987 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c viewport_w = crtc->mode.hdisplay; hdisplay 1962 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c viewport_w = crtc->mode.hdisplay; hdisplay 3142 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c src.width = mode->hdisplay; hdisplay 4140 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c mode->hdisplay, hdisplay 4900 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c int hdisplay, int vdisplay) hdisplay 4912 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c mode->hdisplay = hdisplay; hdisplay 4955 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (common_modes[i].w > native_mode->hdisplay || hdisplay 4957 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c (common_modes[i].w == native_mode->hdisplay && hdisplay 4962 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (common_modes[i].w == curmode->hdisplay && hdisplay 799 drivers/gpu/drm/arm/display/komeda/d71/d71_component.c denominator = mode->hdisplay - 3; hdisplay 645 drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c *hsize = m->hdisplay; hdisplay 94 drivers/gpu/drm/arm/display/komeda/komeda_wb_connector.c int w = mode->hdisplay, h = mode->vdisplay; hdisplay 48 drivers/gpu/drm/arm/malidp_mw.c int w = mode->hdisplay, h = mode->vdisplay; hdisplay 138 drivers/gpu/drm/arm/malidp_mw.c if ((fb->width != crtc_state->mode.hdisplay) || hdisplay 606 drivers/gpu/drm/armada/armada_crtc.c } else if (dcrtc->cursor_x + w > dcrtc->crtc.mode.hdisplay) { hdisplay 609 drivers/gpu/drm/armada/armada_crtc.c w = max_t(int, dcrtc->crtc.mode.hdisplay - dcrtc->cursor_x, 0); hdisplay 113 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c writel(CRT_H_TOTAL(m->htotal - 1) | CRT_H_DE(m->hdisplay - 1), hdisplay 129 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c d_offset = m->hdisplay * bpp / 8; hdisplay 130 drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c t_count = (m->hdisplay * bpp + 127) / 128; hdisplay 789 drivers/gpu/drm/ast/ast_mode.c if ((mode->hdisplay == 1680) && (mode->vdisplay == 1050)) hdisplay 791 drivers/gpu/drm/ast/ast_mode.c if ((mode->hdisplay == 1280) && (mode->vdisplay == 800)) hdisplay 793 drivers/gpu/drm/ast/ast_mode.c if ((mode->hdisplay == 1440) && (mode->vdisplay == 900)) hdisplay 795 drivers/gpu/drm/ast/ast_mode.c if ((mode->hdisplay == 1360) && (mode->vdisplay == 768)) hdisplay 797 drivers/gpu/drm/ast/ast_mode.c if ((mode->hdisplay == 1600) && (mode->vdisplay == 900)) hdisplay 803 drivers/gpu/drm/ast/ast_mode.c if ((mode->hdisplay == 1920) && (mode->vdisplay == 1080)) hdisplay 806 drivers/gpu/drm/ast/ast_mode.c if ((mode->hdisplay == 1920) && (mode->vdisplay == 1200)) { hdisplay 815 drivers/gpu/drm/ast/ast_mode.c switch (mode->hdisplay) { hdisplay 501 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c int hfront_porch = mode->hsync_start - mode->hdisplay; hdisplay 513 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c mode->hdisplay < 1) hdisplay 703 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c (mode->hdisplay != state->crtc_w || hdisplay 208 drivers/gpu/drm/bochs/bochs_hw.c bochs->xres = mode->hdisplay; hdisplay 211 drivers/gpu/drm/bochs/bochs_hw.c bochs->stride = mode->hdisplay * (bochs->bpp / 8); hdisplay 122 drivers/gpu/drm/bochs/bochs_kms.c unsigned long size = mode->hdisplay * mode->vdisplay * 4; hdisplay 35 drivers/gpu/drm/bridge/adv7511/adv7533.c hfp = mode->hsync_start - mode->hdisplay; hdisplay 488 drivers/gpu/drm/bridge/cdns-dsi.c return mode->hsync_start - mode->hdisplay; hdisplay 546 drivers/gpu/drm/bridge/cdns-dsi.c mode->hdisplay : mode->crtc_hdisplay, hdisplay 686 drivers/gpu/drm/bridge/cdns-dsi.c if ((mode->hdisplay * bpp) % 32) hdisplay 364 drivers/gpu/drm/bridge/sii902x.c buf[4] = adj->hdisplay; hdisplay 365 drivers/gpu/drm/bridge/sii902x.c buf[5] = adj->hdisplay >> 8; hdisplay 1738 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c unsigned int vdisplay, hdisplay; hdisplay 1784 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c hdisplay = mode->hdisplay; hdisplay 1785 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c hblank = mode->htotal - mode->hdisplay; hdisplay 1786 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c h_de_hs = mode->hsync_start - mode->hdisplay; hdisplay 1794 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c hdisplay /= 2; hdisplay 1856 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c hdmi_writeb(hdmi, hdisplay >> 8, HDMI_FC_INHACTV1); hdisplay 1857 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c hdmi_writeb(hdmi, hdisplay, HDMI_FC_INHACTV0); hdisplay 642 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c VID_PKT_SIZE(mode->hdisplay / 2) : hdisplay 643 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c VID_PKT_SIZE(mode->hdisplay)); hdisplay 725 drivers/gpu/drm/bridge/tc358767.c int right_margin = mode->hsync_start - mode->hdisplay; hdisplay 746 drivers/gpu/drm/bridge/tc358767.c mode->hdisplay, mode->vdisplay); hdisplay 773 drivers/gpu/drm/bridge/tc358767.c FIELD_PREP(HDISPR, ALIGN(mode->hdisplay, 2)) | hdisplay 805 drivers/gpu/drm/bridge/tc358767.c vid_sync_dly = hsync_len + left_margin + mode->hdisplay; hdisplay 824 drivers/gpu/drm/bridge/tc358767.c FIELD_PREP(H_ACT, mode->hdisplay)); hdisplay 468 drivers/gpu/drm/bridge/ti-sn65dsi86.c mode->hdisplay); hdisplay 488 drivers/gpu/drm/bridge/ti-sn65dsi86.c (mode->hsync_start - mode->hdisplay) & 0xFF); hdisplay 186 drivers/gpu/drm/cirrus/cirrus.c hdispend = mode->hdisplay / 8; hdisplay 396 drivers/gpu/drm/cirrus/cirrus.c if (cirrus_check_size(mode->hdisplay, mode->vdisplay, NULL) < 0) hdisplay 1357 drivers/gpu/drm/drm_atomic.c int hdisplay, vdisplay; hdisplay 1400 drivers/gpu/drm/drm_atomic.c drm_mode_get_hv_timing(set->mode, &hdisplay, &vdisplay); hdisplay 1405 drivers/gpu/drm/drm_atomic.c primary_state->crtc_w = hdisplay; hdisplay 1411 drivers/gpu/drm/drm_atomic.c primary_state->src_h = hdisplay << 16; hdisplay 1413 drivers/gpu/drm/drm_atomic.c primary_state->src_w = hdisplay << 16; hdisplay 123 drivers/gpu/drm/drm_client_modeset.c if (mode->hdisplay > width || hdisplay 157 drivers/gpu/drm/drm_client_modeset.c if (mode->hdisplay != cmdline_mode->xres || hdisplay 330 drivers/gpu/drm/drm_client_modeset.c hoffset += modes[i]->hdisplay; hdisplay 641 drivers/gpu/drm/drm_client_modeset.c modes[i]->hdisplay, modes[i]->vdisplay, hdisplay 498 drivers/gpu/drm/drm_crtc.c int hdisplay, vdisplay; hdisplay 500 drivers/gpu/drm/drm_crtc.c drm_mode_get_hv_timing(mode, &hdisplay, &vdisplay); hdisplay 504 drivers/gpu/drm/drm_crtc.c swap(hdisplay, vdisplay); hdisplay 507 drivers/gpu/drm/drm_crtc.c hdisplay << 16, vdisplay << 16, hdisplay 1861 drivers/gpu/drm/drm_edid.c #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) hdisplay 1918 drivers/gpu/drm/drm_edid.c return (mode->htotal - mode->hdisplay == 160) && hdisplay 1919 drivers/gpu/drm/drm_edid.c (mode->hsync_end - mode->hdisplay == 80) && hdisplay 1944 drivers/gpu/drm/drm_edid.c if (hsize != ptr->hdisplay) hdisplay 2171 drivers/gpu/drm/drm_edid.c if (m->hdisplay == hsize && m->vdisplay == vsize && hdisplay 2181 drivers/gpu/drm/drm_edid.c mode->hdisplay = 1366; hdisplay 2261 drivers/gpu/drm/drm_edid.c if ((mode->hdisplay == cea_interlaced[i].w) && hdisplay 2336 drivers/gpu/drm/drm_edid.c mode->hdisplay = hactive; hdisplay 2337 drivers/gpu/drm/drm_edid.c mode->hsync_start = mode->hdisplay + hsync_offset; hdisplay 2339 drivers/gpu/drm/drm_edid.c mode->htotal = mode->hdisplay + hblank; hdisplay 2452 drivers/gpu/drm/drm_edid.c if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) hdisplay 2468 drivers/gpu/drm/drm_edid.c if (mode->hdisplay == m->hdisplay && hdisplay 2472 drivers/gpu/drm/drm_edid.c if (mode->hdisplay <= m->hdisplay && hdisplay 2506 drivers/gpu/drm/drm_edid.c if (mode->hdisplay == 1368 && mode->vdisplay == 768) { hdisplay 2507 drivers/gpu/drm/drm_edid.c mode->hdisplay = 1366; hdisplay 3136 drivers/gpu/drm/drm_edid.c if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160) hdisplay 3425 drivers/gpu/drm/drm_edid.c return mode->hdisplay == stereo_mode->width && hdisplay 4763 drivers/gpu/drm/drm_edid.c mode->hdisplay = hactive; hdisplay 4764 drivers/gpu/drm/drm_edid.c mode->hsync_start = mode->hdisplay + hsync; hdisplay 4766 drivers/gpu/drm/drm_edid.c mode->htotal = mode->hdisplay + hblank; hdisplay 4932 drivers/gpu/drm/drm_edid.c int hdisplay, int vdisplay) hdisplay 4939 drivers/gpu/drm/drm_edid.c if (hdisplay < 0) hdisplay 4940 drivers/gpu/drm/drm_edid.c hdisplay = 0; hdisplay 4946 drivers/gpu/drm/drm_edid.c if (hdisplay && vdisplay) { hdisplay 4952 drivers/gpu/drm/drm_edid.c if (ptr->hdisplay > hdisplay || hdisplay 4983 drivers/gpu/drm/drm_edid.c if (mode->hdisplay == hpref && hdisplay 1615 drivers/gpu/drm/drm_fb_helper.c sizes.surface_width = max_t(u32, desired_mode->hdisplay + x, sizes.surface_width); hdisplay 1630 drivers/gpu/drm/drm_fb_helper.c sizes.fb_width = min_t(u32, desired_mode->hdisplay + x, sizes.fb_width); hdisplay 451 drivers/gpu/drm/drm_mipi_dbi.c swap(mode->hdisplay, mode->vdisplay); hdisplay 537 drivers/gpu/drm/drm_mipi_dbi.c drm->mode_config.min_width = dbidev->mode.hdisplay; hdisplay 538 drivers/gpu/drm/drm_mipi_dbi.c drm->mode_config.max_width = dbidev->mode.hdisplay; hdisplay 570 drivers/gpu/drm/drm_mipi_dbi.c size_t bufsize = mode->vdisplay * mode->hdisplay * sizeof(u16); hdisplay 140 drivers/gpu/drm/drm_modes.c struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay, hdisplay 161 drivers/gpu/drm/drm_modes.c if (!hdisplay || !vdisplay) hdisplay 182 drivers/gpu/drm/drm_modes.c hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY); hdisplay 191 drivers/gpu/drm/drm_modes.c drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin; hdisplay 213 drivers/gpu/drm/drm_modes.c if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay)) hdisplay 215 drivers/gpu/drm/drm_modes.c else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay)) hdisplay 217 drivers/gpu/drm/drm_modes.c else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay)) hdisplay 219 drivers/gpu/drm/drm_modes.c else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay)) hdisplay 221 drivers/gpu/drm/drm_modes.c else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay)) hdisplay 273 drivers/gpu/drm/drm_modes.c hblank = drm_mode->hdisplay * hblank_percentage / hdisplay 277 drivers/gpu/drm/drm_modes.c drm_mode->htotal = drm_mode->hdisplay + hblank; hdisplay 278 drivers/gpu/drm/drm_modes.c drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2; hdisplay 311 drivers/gpu/drm/drm_modes.c drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK; hdisplay 313 drivers/gpu/drm/drm_modes.c drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2; hdisplay 366 drivers/gpu/drm/drm_modes.c drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay, hdisplay 398 drivers/gpu/drm/drm_modes.c if (!hdisplay || !vdisplay) hdisplay 410 drivers/gpu/drm/drm_modes.c hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; hdisplay 509 drivers/gpu/drm/drm_modes.c drm_mode->hdisplay = hdisplay_rnd; hdisplay 570 drivers/gpu/drm/drm_modes.c drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh, hdisplay 573 drivers/gpu/drm/drm_modes.c return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, hdisplay 590 drivers/gpu/drm/drm_modes.c dmode->hdisplay = vm->hactive; hdisplay 591 drivers/gpu/drm/drm_modes.c dmode->hsync_start = dmode->hdisplay + vm->hfront_porch; hdisplay 631 drivers/gpu/drm/drm_modes.c vm->hactive = dmode->hdisplay; hdisplay 632 drivers/gpu/drm/drm_modes.c vm->hfront_porch = dmode->hsync_start - dmode->hdisplay; hdisplay 744 drivers/gpu/drm/drm_modes.c mode->hdisplay, mode->vdisplay, hdisplay 818 drivers/gpu/drm/drm_modes.c int *hdisplay, int *vdisplay) hdisplay 823 drivers/gpu/drm/drm_modes.c *hdisplay = adjusted.crtc_hdisplay; hdisplay 849 drivers/gpu/drm/drm_modes.c p->crtc_hdisplay = p->hdisplay; hdisplay 953 drivers/gpu/drm/drm_modes.c return mode1->hdisplay == mode2->hdisplay && hdisplay 1121 drivers/gpu/drm/drm_modes.c if (mode->hdisplay == 0 || hdisplay 1122 drivers/gpu/drm/drm_modes.c mode->hsync_start < mode->hdisplay || hdisplay 1183 drivers/gpu/drm/drm_modes.c if (maxX > 0 && mode->hdisplay > maxX) hdisplay 1332 drivers/gpu/drm/drm_modes.c diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay; hdisplay 1931 drivers/gpu/drm/drm_modes.c WARN(in->hdisplay > USHRT_MAX || in->hsync_start > USHRT_MAX || hdisplay 1939 drivers/gpu/drm/drm_modes.c out->hdisplay = in->hdisplay; hdisplay 1999 drivers/gpu/drm/drm_modes.c out->hdisplay = in->hdisplay; hdisplay 150 drivers/gpu/drm/drm_probe_helper.c if (mode->hdisplay != cmdline_mode->xres || hdisplay 227 drivers/gpu/drm/exynos/exynos5433_drm_decon.c VIDTCON2_HOZVAL(m->hdisplay - 1); hdisplay 230 drivers/gpu/drm/exynos/exynos5433_drm_decon.c VIDTCON2_HOZVAL(m->hdisplay - 1); hdisplay 193 drivers/gpu/drm/exynos/exynos7_drm_decon.c VIDTCON4_HOZVAL(mode->hdisplay - 1); hdisplay 893 drivers/gpu/drm/exynos/exynos_drm_dsi.c reg = DSIM_MAIN_HFP(m->hsync_start - m->hdisplay) hdisplay 901 drivers/gpu/drm/exynos/exynos_drm_dsi.c reg = DSIM_MAIN_HRESOL(m->hdisplay, num_bits_resol) | hdisplay 906 drivers/gpu/drm/exynos/exynos_drm_dsi.c dev_dbg(dsi->dev, "LCD size = %dx%d\n", m->hdisplay, m->vdisplay); hdisplay 547 drivers/gpu/drm/exynos/exynos_drm_fimd.c VIDTCON2_HOZVAL(mode->hdisplay - 1) | hdisplay 549 drivers/gpu/drm/exynos/exynos_drm_fimd.c VIDTCON2_HOZVAL_E(mode->hdisplay - 1); hdisplay 90 drivers/gpu/drm/exynos/exynos_drm_plane.c actual_w = exynos_plane_get_size(crtc_x, crtc_w, mode->hdisplay); hdisplay 922 drivers/gpu/drm/exynos/exynos_hdmi.c mode->hdisplay, mode->vdisplay, mode->vrefresh, hdisplay 1018 drivers/gpu/drm/exynos/exynos_hdmi.c m->hdisplay, m->vdisplay, hdisplay 1201 drivers/gpu/drm/exynos/exynos_hdmi.c hdmi_reg_writev(hdata, HDMI_H_BLANK_0, 2, m->htotal - m->hdisplay); hdisplay 1211 drivers/gpu/drm/exynos/exynos_hdmi.c val = (m->hsync_start - m->hdisplay - 2); hdisplay 1212 drivers/gpu/drm/exynos/exynos_hdmi.c val |= ((m->hsync_end - m->hdisplay - 2) << 10); hdisplay 1241 drivers/gpu/drm/exynos/exynos_hdmi.c val = ((m->htotal / 2) + (m->hsync_start - m->hdisplay)); hdisplay 1243 drivers/gpu/drm/exynos/exynos_hdmi.c (m->hsync_start - m->hdisplay)) << 12; hdisplay 1270 drivers/gpu/drm/exynos/exynos_hdmi.c hdmi_reg_writev(hdata, HDMI_TG_HACT_ST_L, 2, m->htotal - m->hdisplay); hdisplay 1271 drivers/gpu/drm/exynos/exynos_hdmi.c hdmi_reg_writev(hdata, HDMI_TG_HACT_SZ_L, 2, m->hdisplay); hdisplay 1288 drivers/gpu/drm/exynos/exynos_hdmi.c (m->hdisplay == 1280 || m->hdisplay == 1024 || m->hdisplay == 1366)) hdisplay 1291 drivers/gpu/drm/exynos/exynos_hdmi.c hdmi_reg_writev(hdata, HDMI_H_BLANK_0, 2, m->htotal - m->hdisplay); hdisplay 1324 drivers/gpu/drm/exynos/exynos_hdmi.c (m->htotal / 2) + (m->hsync_start - m->hdisplay)); hdisplay 1326 drivers/gpu/drm/exynos/exynos_hdmi.c (m->htotal / 2) + (m->hsync_start - m->hdisplay)); hdisplay 1360 drivers/gpu/drm/exynos/exynos_hdmi.c m->hsync_start - m->hdisplay - 2); hdisplay 1362 drivers/gpu/drm/exynos/exynos_hdmi.c m->hsync_end - m->hdisplay - 2); hdisplay 1384 drivers/gpu/drm/exynos/exynos_hdmi.c m->htotal - m->hdisplay - hquirk); hdisplay 1385 drivers/gpu/drm/exynos/exynos_hdmi.c hdmi_reg_writev(hdata, HDMI_TG_HACT_SZ_L, 2, m->hdisplay + hquirk); hdisplay 506 drivers/gpu/drm/exynos/exynos_mixer.c mixer_cfg_scan(ctx, mode->hdisplay, mode->vdisplay); hdisplay 1046 drivers/gpu/drm/exynos/exynos_mixer.c u32 w = mode->hdisplay, h = mode->vdisplay; hdisplay 1073 drivers/gpu/drm/exynos/exynos_mixer.c int width = mode->hdisplay, height = mode->vdisplay, i; hdisplay 1076 drivers/gpu/drm/exynos/exynos_mixer.c int hdisplay, vdisplay, htotal, vtotal, scan_val; hdisplay 1094 drivers/gpu/drm/exynos/exynos_mixer.c if (width <= modes[i].hdisplay && height <= modes[i].vdisplay) { hdisplay 1096 drivers/gpu/drm/exynos/exynos_mixer.c if (width < modes[i].hdisplay || hdisplay 1098 drivers/gpu/drm/exynos/exynos_mixer.c adjusted_mode->hdisplay = modes[i].hdisplay; hdisplay 1099 drivers/gpu/drm/exynos/exynos_mixer.c adjusted_mode->hsync_start = modes[i].hdisplay; hdisplay 76 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c if (mode->hdisplay & 0xf) hdisplay 803 drivers/gpu/drm/gma500/cdv_intel_display.c ((mode->vdisplay - 1) << 16) | (mode->hdisplay - 1)); hdisplay 806 drivers/gpu/drm/gma500/cdv_intel_display.c ((mode->hdisplay - 1) << 16) | (mode->vdisplay - 1)); hdisplay 950 drivers/gpu/drm/gma500/cdv_intel_display.c mode->hdisplay = (htot & 0xffff) + 1; hdisplay 520 drivers/gpu/drm/gma500/cdv_intel_dp.c if (mode->hdisplay > intel_dp->panel_fixed_mode->hdisplay) hdisplay 879 drivers/gpu/drm/gma500/cdv_intel_dp.c adjusted_mode->hdisplay = fixed_mode->hdisplay; hdisplay 1095 drivers/gpu/drm/gma500/cdv_intel_dp.c if (mode->hdisplay != adjusted_mode->hdisplay || hdisplay 192 drivers/gpu/drm/gma500/cdv_intel_hdmi.c if (crtc->saved_mode.hdisplay != 0 && hdisplay 251 drivers/gpu/drm/gma500/cdv_intel_lvds.c if (mode->hdisplay > fixed_mode->hdisplay) hdisplay 286 drivers/gpu/drm/gma500/cdv_intel_lvds.c adjusted_mode->hdisplay = panel_fixed_mode->hdisplay; hdisplay 359 drivers/gpu/drm/gma500/cdv_intel_lvds.c if (mode->hdisplay != adjusted_mode->hdisplay || hdisplay 455 drivers/gpu/drm/gma500/cdv_intel_lvds.c if (crtc->saved_mode.hdisplay != 0 && hdisplay 149 drivers/gpu/drm/gma500/intel_bios.c panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | hdisplay 151 drivers/gpu/drm/gma500/intel_bios.c panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + hdisplay 155 drivers/gpu/drm/gma500/intel_bios.c panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + hdisplay 437 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c pclk_hactive = mode->hdisplay; hdisplay 438 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c pclk_hfp = mode->hsync_start - mode->hdisplay; hdisplay 521 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c mode->vdisplay << 16 | mode->hdisplay); hdisplay 698 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c adjusted_mode->hdisplay = fixed_mode->hdisplay; hdisplay 755 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c mode->vdisplay << 16 | mode->hdisplay); hdisplay 799 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(HTOTAL_A, ((mode->htotal - 1) << 16) | (mode->hdisplay - 1)); hdisplay 800 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(HBLANK_A, ((mode->htotal - 1) << 16) | (mode->hdisplay - 1)); hdisplay 810 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c ((mode->hdisplay - 1) << 16) | (mode->vdisplay - 1)); hdisplay 879 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c ((mode->vdisplay - 1) << 16) | (mode->hdisplay - 1)); hdisplay 285 drivers/gpu/drm/gma500/mdfld_dsi_output.c if (gma_crtc->saved_mode.hdisplay != 0 && hdisplay 342 drivers/gpu/drm/gma500/mdfld_dsi_output.c fixed_mode->hdisplay, fixed_mode->vdisplay); hdisplay 372 drivers/gpu/drm/gma500/mdfld_dsi_output.c if (mode->hdisplay != fixed_mode->hdisplay) hdisplay 699 drivers/gpu/drm/gma500/mdfld_intel_display.c adjusted_mode->hdisplay); hdisplay 717 drivers/gpu/drm/gma500/mdfld_intel_display.c mode->hdisplay); hdisplay 47 drivers/gpu/drm/gma500/mdfld_tmd_vid.c mode->hdisplay = (ti->hactive_hi << 8) | ti->hactive_lo; hdisplay 49 drivers/gpu/drm/gma500/mdfld_tmd_vid.c mode->hsync_start = mode->hdisplay + \ hdisplay 55 drivers/gpu/drm/gma500/mdfld_tmd_vid.c mode->htotal = mode->hdisplay + ((ti->hblank_hi << 8) | \ hdisplay 67 drivers/gpu/drm/gma500/mdfld_tmd_vid.c dev_dbg(dev->dev, "hdisplay is %d\n", mode->hdisplay); hdisplay 77 drivers/gpu/drm/gma500/mdfld_tmd_vid.c mode->hdisplay = 480; hdisplay 38 drivers/gpu/drm/gma500/mdfld_tpo_vid.c mode->hdisplay = 864; hdisplay 347 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(dspsize_reg, ((mode->vdisplay - 1) << 16) | (mode->hdisplay - 1)); hdisplay 132 drivers/gpu/drm/gma500/oaktrail_lvds.c (mode->hdisplay != adjusted_mode->crtc_hdisplay)) { hdisplay 134 drivers/gpu/drm/gma500/oaktrail_lvds.c (mode->hdisplay * adjusted_mode->crtc_vdisplay)) hdisplay 137 drivers/gpu/drm/gma500/oaktrail_lvds.c mode->vdisplay) > (mode->hdisplay * hdisplay 226 drivers/gpu/drm/gma500/oaktrail_lvds.c mode->hdisplay = (ti->hactive_hi << 8) | ti->hactive_lo; hdisplay 228 drivers/gpu/drm/gma500/oaktrail_lvds.c mode->hsync_start = mode->hdisplay + \ hdisplay 234 drivers/gpu/drm/gma500/oaktrail_lvds.c mode->htotal = mode->hdisplay + ((ti->hblank_hi << 8) | \ hdisplay 246 drivers/gpu/drm/gma500/oaktrail_lvds.c pr_info("hdisplay is %d\n", mode->hdisplay); hdisplay 277 drivers/gpu/drm/gma500/psb_intel_display.c ((mode->vdisplay - 1) << 16) | (mode->hdisplay - 1)); hdisplay 280 drivers/gpu/drm/gma500/psb_intel_display.c ((mode->hdisplay - 1) << 16) | (mode->vdisplay - 1)); hdisplay 405 drivers/gpu/drm/gma500/psb_intel_display.c mode->hdisplay = (htot & 0xffff) + 1; hdisplay 353 drivers/gpu/drm/gma500/psb_intel_lvds.c if (mode->hdisplay > fixed_mode->hdisplay) hdisplay 402 drivers/gpu/drm/gma500/psb_intel_lvds.c adjusted_mode->hdisplay = panel_fixed_mode->hdisplay; hdisplay 474 drivers/gpu/drm/gma500/psb_intel_lvds.c if (mode->hdisplay != adjusted_mode->hdisplay || hdisplay 574 drivers/gpu/drm/gma500/psb_intel_lvds.c if (crtc->saved_mode.hdisplay != 0 && hdisplay 703 drivers/gpu/drm/gma500/psb_intel_sdvo.c (psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width || hdisplay 780 drivers/gpu/drm/gma500/psb_intel_sdvo.c mode->hdisplay = dtd->part1.h_active; hdisplay 781 drivers/gpu/drm/gma500/psb_intel_sdvo.c mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; hdisplay 782 drivers/gpu/drm/gma500/psb_intel_sdvo.c mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off; hdisplay 786 drivers/gpu/drm/gma500/psb_intel_sdvo.c mode->htotal = mode->hdisplay + dtd->part1.h_blank; hdisplay 942 drivers/gpu/drm/gma500/psb_intel_sdvo.c mode->hdisplay, hdisplay 1183 drivers/gpu/drm/gma500/psb_intel_sdvo.c if (mode->hdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay) hdisplay 591 drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c mode->hdisplay = 1280; hdisplay 601 drivers/gpu/drm/gma500/tc35876x-dsi-lvds.c dev_info(&dev->pdev->dev, "hdisplay(w) = %d\n", mode->hdisplay); hdisplay 36 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c unsigned long hdisplay; hdisplay 84 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c crtc_state->adjusted_mode.hdisplay || hdisplay 291 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c if (hibmc_pll_table[i].hdisplay == x && hdisplay 320 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c x = mode->hdisplay; hdisplay 372 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_de.c HIBMC_FIELD(HIBMC_CRT_HORZ_TOTAL_DISP_END, mode->hdisplay - 1), hdisplay 477 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c hfp = mode->hsync_start - mode->hdisplay; hdisplay 502 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c writel(mode->hdisplay, base + VID_PKT_SIZE); hdisplay 623 drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c mode->hdisplay, mode->vdisplay, bpp, hdisplay 175 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c u32 width = mode->hdisplay; hdisplay 182 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c hfp = mode->hsync_start - mode->hdisplay; hdisplay 798 drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c if (crtc_x + crtc_w > crtc_state->adjusted_mode.hdisplay || hdisplay 112 drivers/gpu/drm/i2c/ch7006_mode.c .hdisplay = hd, \ hdisplay 185 drivers/gpu/drm/i2c/ch7006_mode.c if (mode->mode.hdisplay != drm_mode->hdisplay || hdisplay 352 drivers/gpu/drm/i2c/ch7006_mode.c hpos = round_fixed((norm->hvirtual * aspect - mode->hdisplay * scale) hdisplay 1464 drivers/gpu/drm/i2c/tda998x_drv.c hs_pix_e = mode->hsync_end - mode->hdisplay; hdisplay 1465 drivers/gpu/drm/i2c/tda998x_drv.c hs_pix_s = mode->hsync_start - mode->hdisplay; hdisplay 1467 drivers/gpu/drm/i2c/tda998x_drv.c de_pix_s = mode->htotal - mode->hdisplay; hdisplay 302 drivers/gpu/drm/i915/display/dvo_ch7017.c horizontal_active_pixel_input = mode->hdisplay & 0x00ff; hdisplay 305 drivers/gpu/drm/i915/display/dvo_ch7017.c horizontal_active_pixel_output = mode->hdisplay & 0x00ff; hdisplay 307 drivers/gpu/drm/i915/display/dvo_ch7017.c active_input_line_output = ((mode->hdisplay & 0x0700) >> 8) | hdisplay 311 drivers/gpu/drm/i915/display/dvo_ch7017.c (mode->hdisplay & 0x0700) >> 8; hdisplay 418 drivers/gpu/drm/i915/display/dvo_ivch.c if (mode->hdisplay != adjusted_mode->crtc_hdisplay || hdisplay 424 drivers/gpu/drm/i915/display/dvo_ivch.c x_ratio = (((mode->hdisplay - 1) << 16) / hdisplay 532 drivers/gpu/drm/i915/display/dvo_ns2501.c mode->hdisplay, mode->htotal, mode->vdisplay, mode->vtotal); hdisplay 540 drivers/gpu/drm/i915/display/dvo_ns2501.c if ((mode->hdisplay == 640 && mode->vdisplay == 480 && mode->clock == 25175) || hdisplay 541 drivers/gpu/drm/i915/display/dvo_ns2501.c (mode->hdisplay == 800 && mode->vdisplay == 600 && mode->clock == 40000) || hdisplay 542 drivers/gpu/drm/i915/display/dvo_ns2501.c (mode->hdisplay == 1024 && mode->vdisplay == 768 && mode->clock == 65000)) { hdisplay 559 drivers/gpu/drm/i915/display/dvo_ns2501.c mode->hdisplay, mode->htotal, mode->vdisplay, mode->vtotal); hdisplay 591 drivers/gpu/drm/i915/display/dvo_ns2501.c if (mode->hdisplay == 640 && mode->vdisplay == 480) hdisplay 593 drivers/gpu/drm/i915/display/dvo_ns2501.c else if (mode->hdisplay == 800 && mode->vdisplay == 600) hdisplay 595 drivers/gpu/drm/i915/display/dvo_ns2501.c else if (mode->hdisplay == 1024 && mode->vdisplay == 768) hdisplay 1542 drivers/gpu/drm/i915/display/icl_dsi.c connector->panel.fixed_mode->hdisplay, hdisplay 115 drivers/gpu/drm/i915/display/intel_bios.c panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | hdisplay 117 drivers/gpu/drm/i915/display/intel_bios.c panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + hdisplay 122 drivers/gpu/drm/i915/display/intel_bios.c panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + hdisplay 293 drivers/gpu/drm/i915/display/intel_bios.c if (fp_timing->x_res == panel_fixed_mode->hdisplay && hdisplay 350 drivers/gpu/drm/i915/display/intel_crt.c if (mode->hdisplay > 4096) hdisplay 8253 drivers/gpu/drm/i915/display/intel_display.c pipe_config->base.mode.hdisplay = pipe_config->pipe_src_w; hdisplay 8259 drivers/gpu/drm/i915/display/intel_display.c mode->hdisplay = pipe_config->base.adjusted_mode.crtc_hdisplay; hdisplay 15813 drivers/gpu/drm/i915/display/intel_display.c if (mode->hdisplay > hdisplay_max || hdisplay 16786 drivers/gpu/drm/i915/display/intel_display.c crtc->base.mode.hdisplay = crtc_state->pipe_src_w; hdisplay 1135 drivers/gpu/drm/i915/display/intel_display_types.h u16 hdisplay, vdisplay; hdisplay 608 drivers/gpu/drm/i915/display/intel_dp.c if (mode->hdisplay > fixed_mode->hdisplay) hdisplay 640 drivers/gpu/drm/i915/display/intel_dp.c mode->hdisplay) >> 4; hdisplay 644 drivers/gpu/drm/i915/display/intel_dp.c mode->hdisplay); hdisplay 4601 drivers/gpu/drm/i915/display/intel_dp.c intel_dp->compliance.test_data.hdisplay = be16_to_cpu(h_width); hdisplay 7096 drivers/gpu/drm/i915/display/intel_dp.c connector, fixed_mode->hdisplay, fixed_mode->vdisplay); hdisplay 68 drivers/gpu/drm/i915/display/intel_dsi.c if (mode->hdisplay > fixed_mode->hdisplay) hdisplay 235 drivers/gpu/drm/i915/display/intel_dvo.c if (mode->hdisplay > fixed_mode->hdisplay) hdisplay 376 drivers/gpu/drm/i915/display/intel_lvds.c if (mode->hdisplay > fixed_mode->hdisplay) hdisplay 800 drivers/gpu/drm/i915/display/intel_sdvo.c if (fixed_mode->hdisplay != width || hdisplay 836 drivers/gpu/drm/i915/display/intel_sdvo.c width = mode->hdisplay; hdisplay 840 drivers/gpu/drm/i915/display/intel_sdvo.c h_blank_len = mode->htotal - mode->hdisplay; hdisplay 846 drivers/gpu/drm/i915/display/intel_sdvo.c h_sync_offset = mode->hsync_start - mode->hdisplay; hdisplay 886 drivers/gpu/drm/i915/display/intel_sdvo.c mode.hdisplay = dtd->part1.h_active; hdisplay 887 drivers/gpu/drm/i915/display/intel_sdvo.c mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; hdisplay 888 drivers/gpu/drm/i915/display/intel_sdvo.c mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off; hdisplay 892 drivers/gpu/drm/i915/display/intel_sdvo.c mode.htotal = mode.hdisplay + dtd->part1.h_blank; hdisplay 1228 drivers/gpu/drm/i915/display/intel_sdvo.c mode->hdisplay, hdisplay 1847 drivers/gpu/drm/i915/display/intel_sdvo.c if (mode->hdisplay > fixed_mode->hdisplay) hdisplay 998 drivers/gpu/drm/i915/display/intel_tv.c mode->hdisplay = hdisplay 1000 drivers/gpu/drm/i915/display/intel_tv.c mode->hsync_start = mode->hdisplay + hdisplay 1044 drivers/gpu/drm/i915/display/intel_tv.c mode->hdisplay, mode->vdisplay, hdisplay 1050 drivers/gpu/drm/i915/display/intel_tv.c int hdisplay, int left_margin, hdisplay 1053 drivers/gpu/drm/i915/display/intel_tv.c int hsync_start = mode->hsync_start - mode->hdisplay + right_margin; hdisplay 1054 drivers/gpu/drm/i915/display/intel_tv.c int hsync_end = mode->hsync_end - mode->hdisplay + right_margin; hdisplay 1055 drivers/gpu/drm/i915/display/intel_tv.c int new_htotal = mode->htotal * hdisplay / hdisplay 1056 drivers/gpu/drm/i915/display/intel_tv.c (mode->hdisplay - left_margin - right_margin); hdisplay 1060 drivers/gpu/drm/i915/display/intel_tv.c mode->hdisplay = hdisplay; hdisplay 1061 drivers/gpu/drm/i915/display/intel_tv.c mode->hsync_start = hdisplay + hsync_start * new_htotal / mode->htotal; hdisplay 1062 drivers/gpu/drm/i915/display/intel_tv.c mode->hsync_end = hdisplay + hsync_end * new_htotal / mode->htotal; hdisplay 1093 drivers/gpu/drm/i915/display/intel_tv.c int hdisplay = adjusted_mode->crtc_hdisplay; hdisplay 1151 drivers/gpu/drm/i915/display/intel_tv.c intel_tv_scale_mode_horiz(&mode, hdisplay, hdisplay 1152 drivers/gpu/drm/i915/display/intel_tv.c xpos, mode.hdisplay - xsize - xpos); hdisplay 1167 drivers/gpu/drm/i915/display/intel_tv.c int hdisplay) hdisplay 1169 drivers/gpu/drm/i915/display/intel_tv.c return IS_GEN(dev_priv, 3) && hdisplay > 1024; hdisplay 1193 drivers/gpu/drm/i915/display/intel_tv.c int hdisplay = adjusted_mode->crtc_hdisplay; hdisplay 1212 drivers/gpu/drm/i915/display/intel_tv.c if (intel_tv_source_too_wide(dev_priv, hdisplay) || hdisplay 1320 drivers/gpu/drm/i915/display/intel_tv.c intel_tv_scale_mode_horiz(adjusted_mode, hdisplay, hdisplay 1639 drivers/gpu/drm/i915/display/vlv_dsi.c connector->panel.fixed_mode->hdisplay, hdisplay 3260 drivers/gpu/drm/i915/i915_debugfs.c intel_dp->compliance.test_data.hdisplay); hdisplay 2227 drivers/gpu/drm/i915/intel_pm.c int hdisplay = crtc->config->pipe_src_w; hdisplay 2232 drivers/gpu/drm/i915/intel_pm.c hdisplay, cpp, sr_latency_ns / 100); hdisplay 2383 drivers/gpu/drm/i915/intel_pm.c int hdisplay = enabled->config->pipe_src_w; hdisplay 2392 drivers/gpu/drm/i915/intel_pm.c entries = intel_wm_method2(clock, htotal, hdisplay, cpp, hdisplay 3916 drivers/gpu/drm/i915/intel_pm.c int hdisplay, vdisplay; hdisplay 3921 drivers/gpu/drm/i915/intel_pm.c drm_mode_get_hv_timing(adjusted_mode, &hdisplay, &vdisplay); hdisplay 3922 drivers/gpu/drm/i915/intel_pm.c total_width += hdisplay; hdisplay 3925 drivers/gpu/drm/i915/intel_pm.c width_before_pipe += hdisplay; hdisplay 3927 drivers/gpu/drm/i915/intel_pm.c pipe_width = hdisplay; hdisplay 257 drivers/gpu/drm/imx/imx-tve.c mode->hdisplay, mode->vdisplay); hdisplay 274 drivers/gpu/drm/imx/ipuv3-crtc.c mode->hdisplay); hdisplay 312 drivers/gpu/drm/imx/ipuv3-crtc.c imx_crtc_state->bus_format, mode->hdisplay); hdisplay 267 drivers/gpu/drm/ingenic/ingenic-drm.c hde = hds + mode->hdisplay; hdisplay 268 drivers/gpu/drm/ingenic/ingenic-drm.c ht = hde + mode->hsync_start - mode->hdisplay; hdisplay 378 drivers/gpu/drm/ingenic/ingenic-drm.c width = state->crtc->state->adjusted_mode.hdisplay; hdisplay 171 drivers/gpu/drm/mcde/mcde_display.c if (fb->pitches[0] != mode->hdisplay * fb->format->cpp[0]) { hdisplay 397 drivers/gpu/drm/mcde/mcde_display.c val = mode->hdisplay << MCDE_OVLXCONF_PPL_SHIFT; hdisplay 522 drivers/gpu/drm/mcde/mcde_display.c val = (mode->hdisplay - 1) << MCDE_CHNLXCONF_PPL_SHIFT; hdisplay 823 drivers/gpu/drm/mcde/mcde_display.c u32 formatter_ppl = mode->hdisplay; /* pixels per line */ hdisplay 834 drivers/gpu/drm/mcde/mcde_display.c mode->hdisplay, mode->vdisplay, hdisplay 863 drivers/gpu/drm/mcde/mcde_display.c fifo_wtrmrk = mode->hdisplay; hdisplay 870 drivers/gpu/drm/mcde/mcde_display.c pkt_div = mcde_dsi_get_pkt_div(mode->hdisplay, 640); hdisplay 885 drivers/gpu/drm/mcde/mcde_display.c mode->hdisplay * mode->vdisplay * cpp); hdisplay 886 drivers/gpu/drm/mcde/mcde_display.c mcde->stride = mode->hdisplay * cpp; hdisplay 442 drivers/gpu/drm/mcde/mcde_dsi.c hfp = (mode->hsync_start - mode->hdisplay) * bpp - 6 - 2; hdisplay 478 drivers/gpu/drm/mcde/mcde_dsi.c val = mode->hdisplay * (bpp / 8); hdisplay 520 drivers/gpu/drm/mcde/mcde_dsi.c blkeol_pck = bpl - mode->hdisplay * bpp - 6; hdisplay 693 drivers/gpu/drm/mcde/mcde_dsi.c mode->hdisplay, mode->vdisplay, pixel_clock_hz, hdisplay 155 drivers/gpu/drm/mediatek/mtk_drm_crtc.c state->pending_width = crtc->mode.hdisplay; hdisplay 224 drivers/gpu/drm/mediatek/mtk_drm_crtc.c width = crtc->state->adjusted_mode.hdisplay; hdisplay 1242 drivers/gpu/drm/mediatek/mtk_hdmi.c mode->hdisplay, mode->vdisplay, mode->vrefresh, hdisplay 1379 drivers/gpu/drm/mediatek/mtk_hdmi.c adjusted_mode->name, adjusted_mode->hdisplay); hdisplay 93 drivers/gpu/drm/meson/meson_crtc.c writel(crtc_state->mode.hdisplay | hdisplay 98 drivers/gpu/drm/meson/meson_crtc.c (crtc_state->mode.hdisplay - 1), hdisplay 103 drivers/gpu/drm/meson/meson_crtc.c writel_relaxed(crtc_state->mode.hdisplay << 16 | hdisplay 125 drivers/gpu/drm/meson/meson_crtc.c writel(crtc_state->mode.hdisplay, hdisplay 168 drivers/gpu/drm/meson/meson_overlay.c crtc_width = crtc_state->mode.hdisplay; hdisplay 869 drivers/gpu/drm/meson/meson_venc.c if (mode->hdisplay < 640 || mode->hdisplay > 1920) hdisplay 904 drivers/gpu/drm/meson/meson_venc.c mode->hdisplay - 1; hdisplay 1022 drivers/gpu/drm/meson/meson_venc.c active_pixels_venc = mode->hdisplay; hdisplay 1028 drivers/gpu/drm/meson/meson_venc.c front_porch_venc = (mode->hsync_start - mode->hdisplay); hdisplay 906 drivers/gpu/drm/mgag200/mgag200_mode.c int hdisplay, hsyncstart, hsyncend, htotal; hdisplay 1031 drivers/gpu/drm/mgag200/mgag200_mode.c hdisplay = mode->hdisplay / 8 - 1; hdisplay 1056 drivers/gpu/drm/mgag200/mgag200_mode.c WREG_CRT(1, hdisplay); hdisplay 1057 drivers/gpu/drm/mgag200/mgag200_mode.c WREG_CRT(2, hdisplay); hdisplay 1095 drivers/gpu/drm/mgag200/mgag200_mode.c ((hdisplay & 0x100) >> 7) | hdisplay 1549 drivers/gpu/drm/mgag200/mgag200_mode.c active_area = mode->hdisplay * mode->vdisplay; hdisplay 1572 drivers/gpu/drm/mgag200/mgag200_mode.c if (mode->hdisplay > 1600) hdisplay 1580 drivers/gpu/drm/mgag200/mgag200_mode.c if (mode->hdisplay > 1920) hdisplay 1593 drivers/gpu/drm/mgag200/mgag200_mode.c if (mode->hdisplay > 1280) hdisplay 1614 drivers/gpu/drm/mgag200/mgag200_mode.c if ((mode->hdisplay % 8) != 0 || (mode->hsync_start % 8) != 0 || hdisplay 1632 drivers/gpu/drm/mgag200/mgag200_mode.c if ((mode->hdisplay * mode->vdisplay * (bpp/8)) > mdev->mc.vram_size) { hdisplay 404 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c u32 crtc_split_width = adj_mode->hdisplay / cstate->num_mixers; hdisplay 855 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c mixer_width = mode->hdisplay / cstate->num_mixers; hdisplay 859 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c crtc_rect.x2 = mode->hdisplay; hdisplay 1098 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c out_width = mode->hdisplay / cstate->num_mixers; hdisplay 1101 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c mode->hdisplay, mode->vdisplay); hdisplay 517 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c cur_mode->hdisplay == adj_mode->hdisplay && hdisplay 1157 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c trace_dpu_enc_enable(DRMID(drm_enc), cur_mode->hdisplay, hdisplay 46 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c || (mode->hsync_start < mode->hdisplay) hdisplay 54 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c mode->htotal, mode->hdisplay); hdisplay 70 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c timing->width = mode->hdisplay; /* active width */ hdisplay 75 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c timing->h_front_porch = mode->hsync_start - mode->hdisplay; hdisplay 257 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c mode.hdisplay >>= 1; hdisplay 265 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c mode.hdisplay, mode.htotal, hdisplay 291 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_PROTO(uint32_t drm_id, int hdisplay, int vdisplay), hdisplay 292 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h TP_ARGS(drm_id, hdisplay, vdisplay), hdisplay 295 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h __field( int, hdisplay ) hdisplay 300 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h __entry->hdisplay = hdisplay; hdisplay 304 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h __entry->drm_id, __entry->hdisplay, __entry->vdisplay) hdisplay 241 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c MDP4_DMA_SRC_SIZE_WIDTH(mode->hdisplay) | hdisplay 253 drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c MDP4_OVLP_SIZE_WIDTH(mode->hdisplay) | hdisplay 62 drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1; hdisplay 112 drivers/gpu/drm/msm/disp/mdp4/mdp4_dtv_encoder.c hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1; hdisplay 283 drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1; hdisplay 381 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c mixer_width = mode->hdisplay; hdisplay 583 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c ((pstate->crtc_x + pstate->crtc_w) >= cstate->mode.hdisplay) && hdisplay 657 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c if (mode->hdisplay > hw_cfg->lm.max_width) hdisplay 753 drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c uint32_t xres = crtc->mode.hdisplay; hdisplay 148 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1; hdisplay 162 drivers/gpu/drm/msm/disp/mdp5/mdp5_encoder.c display_v_end -= mode->hsync_start - mode->hdisplay; hdisplay 927 drivers/gpu/drm/msm/dsi/dsi_host.c u32 ha_end = ha_start + mode->hdisplay; hdisplay 930 drivers/gpu/drm/msm/dsi/dsi_host.c u32 hdisplay = mode->hdisplay; hdisplay 947 drivers/gpu/drm/msm/dsi/dsi_host.c hdisplay /= 2; hdisplay 970 drivers/gpu/drm/msm/dsi/dsi_host.c wc = hdisplay * dsi_get_bpp(msm_host->format) / 8 + 1; hdisplay 980 drivers/gpu/drm/msm/dsi/dsi_host.c DSI_CMD_MDP_STREAM_TOTAL_H_TOTAL(hdisplay) | hdisplay 1347 drivers/gpu/drm/msm/dsi/dsi_host.c int bllp_len = msm_host->mode->hdisplay * hdisplay 1305 drivers/gpu/drm/msm/edp/edp_ctrl.c EDP_ACTIVE_HOR_VER_HORIZ(mode->hdisplay) | hdisplay 215 drivers/gpu/drm/msm/hdmi/hdmi_bridge.c hend = mode->htotal - mode->hsync_start + mode->hdisplay; hdisplay 275 drivers/gpu/drm/mxsfb/mxsfb_crtc.c writel(SET_DOTCLK_H_VALID_DATA_CNT(m->hdisplay), hdisplay 191 drivers/gpu/drm/nouveau/dispnv04/dfp.c mode->hdisplay > nv_connector->native_mode->hdisplay || hdisplay 300 drivers/gpu/drm/nouveau/dispnv04/dfp.c regp->fp_horiz_regs[FP_DISPLAY_END] = output_mode->hdisplay - 1; hdisplay 303 drivers/gpu/drm/nouveau/dispnv04/dfp.c (output_mode->hsync_start - output_mode->hdisplay) >= hdisplay 305 drivers/gpu/drm/nouveau/dispnv04/dfp.c regp->fp_horiz_regs[FP_CRTC] = output_mode->hdisplay; hdisplay 311 drivers/gpu/drm/nouveau/dispnv04/dfp.c regp->fp_horiz_regs[FP_VALID_END] = output_mode->hdisplay - 1; hdisplay 334 drivers/gpu/drm/nouveau/dispnv04/dfp.c else if (adjusted_mode->hdisplay == output_mode->hdisplay && hdisplay 374 drivers/gpu/drm/nouveau/dispnv04/dfp.c mode_ratio = (1 << 12) * adjusted_mode->hdisplay / adjusted_mode->vdisplay; hdisplay 375 drivers/gpu/drm/nouveau/dispnv04/dfp.c panel_ratio = (1 << 12) * output_mode->hdisplay / output_mode->vdisplay; hdisplay 393 drivers/gpu/drm/nouveau/dispnv04/dfp.c diff = output_mode->hdisplay - hdisplay 404 drivers/gpu/drm/nouveau/dispnv04/dfp.c scale = (1 << 12) * adjusted_mode->hdisplay / output_mode->hdisplay; hdisplay 410 drivers/gpu/drm/nouveau/dispnv04/dfp.c (1 << 12) * output_mode->hdisplay / mode_ratio; hdisplay 325 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c uint64_t rs[] = {mode->hdisplay * id3, hdisplay 328 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c do_div(rs[0], overscan * tv_norm->tv_enc_mode.hdisplay); hdisplay 559 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c hmargin = (output_mode->hdisplay - crtc_mode->hdisplay) / 2; hdisplay 562 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c hmargin = interpolate(0, min(hmargin, output_mode->hdisplay/20), hdisplay 567 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c hratio = crtc_mode->hdisplay * 0x800 / hdisplay 568 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c (output_mode->hdisplay - 2*hmargin); hdisplay 573 drivers/gpu/drm/nouveau/dispnv04/tvmodesnv17.c regs->fp_horiz_regs[FP_VALID_END] = output_mode->hdisplay - hmargin - 1; hdisplay 207 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c for (tv_mode = nv17_tv_modes; tv_mode->hdisplay; tv_mode++) { hdisplay 219 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c if (mode->hdisplay == tv_norm->tv_enc_mode.hdisplay && hdisplay 237 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c int hdisplay; hdisplay 253 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c if (modes[i].hdisplay > output_mode->hdisplay || hdisplay 257 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c if (modes[i].hdisplay == output_mode->hdisplay && hdisplay 263 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c mode = drm_cvt_mode(encoder->dev, modes[i].hdisplay, hdisplay 270 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c if (output_mode->hdisplay <= 720 hdisplay 271 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c || output_mode->hdisplay >= 1920) { hdisplay 273 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c mode->hsync_start = (mode->hdisplay + (mode->htotal hdisplay 274 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c - mode->hdisplay) * 9 / 10) & ~7; hdisplay 315 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c if (mode->hdisplay > output_mode->hdisplay || hdisplay 533 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c regs->fp_horiz_regs[FP_DISPLAY_END] = output_mode->hdisplay - 1; hdisplay 538 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c regs->fp_horiz_regs[FP_CRTC] = output_mode->hdisplay + hdisplay 539 drivers/gpu/drm/nouveau/dispnv04/tvnv17.c max((output_mode->hdisplay-600)/40 - 1, 1); hdisplay 98 drivers/gpu/drm/nouveau/dispnv04/tvnv17.h int hdisplay; hdisplay 329 drivers/gpu/drm/nouveau/dispnv50/disp.c if (mode->hdisplay == native_mode->hdisplay && hdisplay 609 drivers/gpu/drm/nouveau/dispnv50/disp.c max_ac_packet = mode->htotal - mode->hdisplay; hdisplay 137 drivers/gpu/drm/nouveau/dispnv50/head.c asyh->view.iW = umode->hdisplay; hdisplay 219 drivers/gpu/drm/nouveau/dispnv50/head507d.c asyh->core.w = asyh->state.mode.hdisplay; hdisplay 465 drivers/gpu/drm/nouveau/nouveau_bios.c mode->hdisplay = ROM16(mode_entry[11]) + 1; hdisplay 76 drivers/gpu/drm/nouveau/nouveau_connector.c if (mode->hdisplay < high_w) hdisplay 79 drivers/gpu/drm/nouveau/nouveau_connector.c if (mode->hdisplay == high_w && mode->vdisplay < high_h) hdisplay 82 drivers/gpu/drm/nouveau/nouveau_connector.c if (mode->hdisplay == high_w && mode->vdisplay == high_h && hdisplay 86 drivers/gpu/drm/nouveau/nouveau_connector.c high_w = mode->hdisplay; hdisplay 799 drivers/gpu/drm/nouveau/nouveau_connector.c int hdisplay; hdisplay 833 drivers/gpu/drm/nouveau/nouveau_connector.c while (mode->hdisplay) { hdisplay 834 drivers/gpu/drm/nouveau/nouveau_connector.c if (mode->hdisplay <= native->hdisplay && hdisplay 836 drivers/gpu/drm/nouveau/nouveau_connector.c (mode->hdisplay != native->hdisplay || hdisplay 838 drivers/gpu/drm/nouveau/nouveau_connector.c m = drm_cvt_mode(dev, mode->hdisplay, mode->vdisplay, hdisplay 1046 drivers/gpu/drm/nouveau/nouveau_connector.c (mode->hdisplay > nv_connector->native_mode->hdisplay || hdisplay 1126 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c if (mode->hdisplay != ddata->vm.hactive) hdisplay 1134 drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c mode->hdisplay, mode->vdisplay); hdisplay 473 drivers/gpu/drm/omapdrm/dss/dpi.c if (mode->hdisplay % 8 != 0) hdisplay 260 drivers/gpu/drm/omapdrm/dss/venc.c .hdisplay = 720, hdisplay 275 drivers/gpu/drm/omapdrm/dss/venc.c .hdisplay = 720, hdisplay 536 drivers/gpu/drm/omapdrm/dss/venc.c mode->hdisplay == omap_dss_pal_mode.hdisplay && hdisplay 541 drivers/gpu/drm/omapdrm/dss/venc.c mode->hdisplay == omap_dss_ntsc_mode.hdisplay && hdisplay 385 drivers/gpu/drm/omapdrm/omap_crtc.c ret = dssdrv->update(dssdev, 0, 0, mode->hdisplay, mode->vdisplay); hdisplay 529 drivers/gpu/drm/omapdrm/omap_crtc.c bandwidth = bandwidth * mode->hdisplay * mode->vdisplay * bpp; hdisplay 122 drivers/gpu/drm/omapdrm/omap_plane.c if (state->crtc_x + state->crtc_w > crtc_state->adjusted_mode.hdisplay) hdisplay 138 drivers/gpu/drm/panel/panel-arm-versatile.c .hdisplay = 320, hdisplay 162 drivers/gpu/drm/panel/panel-arm-versatile.c .hdisplay = 640, hdisplay 185 drivers/gpu/drm/panel/panel-arm-versatile.c .hdisplay = 176, hdisplay 209 drivers/gpu/drm/panel/panel-arm-versatile.c .hdisplay = 240, hdisplay 151 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c .hdisplay = 1024, hdisplay 174 drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c feiyang_default_mode.hdisplay, hdisplay 544 drivers/gpu/drm/panel/panel-ilitek-ili9322.c .hdisplay = 320, hdisplay 558 drivers/gpu/drm/panel/panel-ilitek-ili9322.c .hdisplay = 360, hdisplay 573 drivers/gpu/drm/panel/panel-ilitek-ili9322.c .hdisplay = 320, hdisplay 588 drivers/gpu/drm/panel/panel-ilitek-ili9322.c .hdisplay = 640, hdisplay 602 drivers/gpu/drm/panel/panel-ilitek-ili9322.c .hdisplay = 720, hdisplay 617 drivers/gpu/drm/panel/panel-ilitek-ili9322.c .hdisplay = 640, hdisplay 632 drivers/gpu/drm/panel/panel-ilitek-ili9322.c .hdisplay = 720, hdisplay 379 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c .hdisplay = 720, hdisplay 399 drivers/gpu/drm/panel/panel-ilitek-ili9881c.c bananapi_default_mode.hdisplay, hdisplay 230 drivers/gpu/drm/panel/panel-innolux-p079zca.c .hdisplay = 768, hdisplay 264 drivers/gpu/drm/panel/panel-innolux-p079zca.c .hdisplay = 1536, hdisplay 415 drivers/gpu/drm/panel/panel-innolux-p079zca.c m->hdisplay, m->vdisplay, m->vrefresh); hdisplay 75 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c ret = mipi_dsi_dcs_set_column_address(dsi, 0, jdi->mode->hdisplay - 1); hdisplay 291 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c .hdisplay = 1200, hdisplay 312 drivers/gpu/drm/panel/panel-jdi-lt070me05000.c default_mode.hdisplay, default_mode.vdisplay, hdisplay 325 drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c .hdisplay = 1536, hdisplay 343 drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c default_mode.hdisplay, default_mode.vdisplay, hdisplay 129 drivers/gpu/drm/panel/panel-lg-lb035q02.c .hdisplay = 320, hdisplay 201 drivers/gpu/drm/panel/panel-lg-lg4573.c .hdisplay = 480, hdisplay 220 drivers/gpu/drm/panel/panel-lg-lg4573.c default_mode.hdisplay, default_mode.vdisplay, hdisplay 111 drivers/gpu/drm/panel/panel-nec-nl8048hl11.c .hdisplay = 800, hdisplay 323 drivers/gpu/drm/panel/panel-novatek-nt39016.c .hdisplay = 320, hdisplay 168 drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c mode->hdisplay = lcd_mode->hactive; hdisplay 76 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c .hdisplay = 480, hdisplay 228 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c default_mode.hdisplay - 1); hdisplay 359 drivers/gpu/drm/panel/panel-orisetech-otm8009a.c default_mode.hdisplay, default_mode.vdisplay, hdisplay 103 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c .hdisplay = 1920, hdisplay 123 drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c osd101t2587->default_mode->hdisplay, hdisplay 158 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c .hdisplay = 1920, hdisplay 176 drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c default_mode.hdisplay, default_mode.vdisplay, hdisplay 206 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c .hdisplay = 800, hdisplay 328 drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c m->hdisplay, m->vdisplay, m->vrefresh); hdisplay 213 drivers/gpu/drm/panel/panel-raydium-rm67191.c .hdisplay = 1080, hdisplay 447 drivers/gpu/drm/panel/panel-raydium-rm67191.c default_mode.hdisplay, default_mode.vdisplay, hdisplay 88 drivers/gpu/drm/panel/panel-raydium-rm68200.c .hdisplay = 720, hdisplay 345 drivers/gpu/drm/panel/panel-raydium-rm68200.c default_mode.hdisplay, default_mode.vdisplay, hdisplay 218 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c .hdisplay = 720, hdisplay 241 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c default_mode.hdisplay, default_mode.vdisplay, hdisplay 362 drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c default_mode.hdisplay, default_mode.vdisplay, hdisplay 109 drivers/gpu/drm/panel/panel-ronbo-rb070d30.c .hdisplay = 1024, hdisplay 32 drivers/gpu/drm/panel/panel-samsung-s6d16d0.c .hdisplay = 864, hdisplay 612 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c .hdisplay = 1440, hdisplay 631 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c .hdisplay = 1600, hdisplay 657 drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c ctx->desc->mode->hdisplay, ctx->desc->mode->vdisplay, hdisplay 47 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c .hdisplay = 320, hdisplay 280 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c default_mode.hdisplay - 1 + FIRST_COLUMN); hdisplay 411 drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c default_mode.hdisplay, default_mode.vdisplay, hdisplay 112 drivers/gpu/drm/panel/panel-samsung-s6e63m0.c .hdisplay = 480, hdisplay 373 drivers/gpu/drm/panel/panel-samsung-s6e63m0.c default_mode.hdisplay, default_mode.vdisplay, hdisplay 98 drivers/gpu/drm/panel/panel-seiko-43wvf1g.c m->hdisplay, m->vdisplay, m->vrefresh); hdisplay 137 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c err = mipi_dsi_dcs_set_column_address(left, 0, mode->hdisplay / 2 - 1); hdisplay 149 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c err = mipi_dsi_dcs_set_column_address(right, mode->hdisplay / 2, hdisplay 150 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c mode->hdisplay - 1); hdisplay 270 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c .hdisplay = 2560, hdisplay 288 drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c default_mode.hdisplay, default_mode.vdisplay, hdisplay 88 drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c .hdisplay = 480, hdisplay 202 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c .hdisplay = 540, hdisplay 220 drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c default_mode.hdisplay, default_mode.vdisplay, hdisplay 167 drivers/gpu/drm/panel/panel-simple.c m->hdisplay, m->vdisplay, m->vrefresh); hdisplay 517 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 480, hdisplay 542 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 593 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1024, hdisplay 638 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1366, hdisplay 662 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1366, hdisplay 685 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1366, hdisplay 708 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1920, hdisplay 764 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1280, hdisplay 788 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 897 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1920, hdisplay 924 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1024, hdisplay 952 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 974 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1024, hdisplay 997 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1280, hdisplay 1009 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1280, hdisplay 1038 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 480, hdisplay 1063 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 1087 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 1111 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1366, hdisplay 1134 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1366, hdisplay 1157 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 1242 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 320, hdisplay 1268 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 480, hdisplay 1292 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 640, hdisplay 1318 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 1383 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 1407 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 1430 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 480, hdisplay 1532 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 1559 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 480, hdisplay 1585 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 1693 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1024, hdisplay 1755 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1366, hdisplay 1778 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 2160, hdisplay 1806 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1024, hdisplay 1900 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 320, hdisplay 1924 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 1948 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1536, hdisplay 1971 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 2048, hdisplay 1993 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1920, hdisplay 2016 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 2560, hdisplay 2039 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 2053 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 480, hdisplay 2132 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 480, hdisplay 2158 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1024, hdisplay 2181 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 480, hdisplay 2234 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 2287 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 480, hdisplay 2315 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 2344 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 480, hdisplay 2371 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 480, hdisplay 2396 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 2422 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 2446 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 480, hdisplay 2500 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 2560, hdisplay 2522 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1024, hdisplay 2545 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1366, hdisplay 2568 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1920, hdisplay 2594 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 2621 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 240, hdisplay 2697 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1024, hdisplay 2748 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 2771 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1920, hdisplay 2799 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 2873 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 320, hdisplay 2901 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 320, hdisplay 2930 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1280, hdisplay 2954 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 2977 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1024, hdisplay 3035 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 3061 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 320, hdisplay 3087 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1024, hdisplay 3486 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1200, hdisplay 3514 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1200, hdisplay 3544 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 800, hdisplay 3572 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 720, hdisplay 3600 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1920, hdisplay 3629 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1080, hdisplay 3657 drivers/gpu/drm/panel/panel-simple.c .hdisplay = 1920, hdisplay 277 drivers/gpu/drm/panel/panel-sitronix-st7701.c desc_mode->hdisplay, desc_mode->vdisplay, hdisplay 302 drivers/gpu/drm/panel/panel-sitronix-st7701.c .hdisplay = 480, hdisplay 162 drivers/gpu/drm/panel/panel-sitronix-st7789v.c .hdisplay = 240, hdisplay 181 drivers/gpu/drm/panel/panel-sitronix-st7789v.c default_mode.hdisplay, default_mode.vdisplay, hdisplay 509 drivers/gpu/drm/panel/panel-sony-acx565akm.c .hdisplay = 800, hdisplay 275 drivers/gpu/drm/panel/panel-tpo-td028ttec1.c .hdisplay = 480, hdisplay 334 drivers/gpu/drm/panel/panel-tpo-td043mtea1.c .hdisplay = 800, hdisplay 111 drivers/gpu/drm/panel/panel-tpo-tpg110.c .hdisplay = 800, hdisplay 128 drivers/gpu/drm/panel/panel-tpo-tpg110.c .hdisplay = 640, hdisplay 145 drivers/gpu/drm/panel/panel-tpo-tpg110.c .hdisplay = 480, hdisplay 162 drivers/gpu/drm/panel/panel-tpo-tpg110.c .hdisplay = 480, hdisplay 179 drivers/gpu/drm/panel/panel-tpo-tpg110.c .hdisplay = 400, hdisplay 532 drivers/gpu/drm/panel/panel-truly-nt35597.c .hdisplay = 1440, hdisplay 64 drivers/gpu/drm/pl111/pl111_display.c bw = bw * mode->hdisplay * mode->vdisplay * cpp; hdisplay 73 drivers/gpu/drm/pl111/pl111_display.c mode->hdisplay, mode->vdisplay, hdisplay 79 drivers/gpu/drm/pl111/pl111_display.c mode->hdisplay, mode->vdisplay, hdisplay 93 drivers/gpu/drm/pl111/pl111_display.c if (mode->hdisplay % 16) hdisplay 106 drivers/gpu/drm/pl111/pl111_display.c if (fb->pitches[0] != mode->hdisplay * fb->format->cpp[0]) hdisplay 147 drivers/gpu/drm/pl111/pl111_display.c ppl = (mode->hdisplay / 16) - 1; hdisplay 149 drivers/gpu/drm/pl111/pl111_display.c hfp = mode->hsync_start - mode->hdisplay - 1; hdisplay 157 drivers/gpu/drm/pl111/pl111_display.c cpl = mode->hdisplay - 1; hdisplay 235 drivers/gpu/drm/qxl/qxl_display.c mode->hdisplay = width; hdisplay 332 drivers/gpu/drm/qxl/qxl_display.c head.width = mode->hdisplay; hdisplay 1009 drivers/gpu/drm/qxl/qxl_display.c if (qxl_check_mode(qdev, mode->hdisplay, mode->vdisplay) != 0) hdisplay 1440 drivers/gpu/drm/radeon/atombios_crtc.c viewport_w = crtc->mode.hdisplay; hdisplay 1652 drivers/gpu/drm/radeon/atombios_crtc.c viewport_w = crtc->mode.hdisplay; hdisplay 3470 drivers/gpu/drm/radeon/r100.c stop_req = mode1->hdisplay * pixel_bytes1 / 16; hdisplay 3550 drivers/gpu/drm/radeon/r100.c stop_req = mode2->hdisplay * pixel_bytes2 / 16; hdisplay 1655 drivers/gpu/drm/radeon/radeon_atombios.c lvds->native_mode.hdisplay = hdisplay 1659 drivers/gpu/drm/radeon/radeon_atombios.c lvds->native_mode.htotal = lvds->native_mode.hdisplay + hdisplay 1661 drivers/gpu/drm/radeon/radeon_atombios.c lvds->native_mode.hsync_start = lvds->native_mode.hdisplay + hdisplay 1136 drivers/gpu/drm/radeon/radeon_combios.c lvds->native_mode.hdisplay = hdisplay 1140 drivers/gpu/drm/radeon/radeon_combios.c lvds->native_mode.hdisplay = hdisplay 1143 drivers/gpu/drm/radeon/radeon_combios.c if ((lvds->native_mode.hdisplay < 640) || hdisplay 1145 drivers/gpu/drm/radeon/radeon_combios.c lvds->native_mode.hdisplay = 640; hdisplay 1166 drivers/gpu/drm/radeon/radeon_combios.c DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.hdisplay, hdisplay 1197 drivers/gpu/drm/radeon/radeon_combios.c lvds->native_mode.hdisplay = RBIOS16(lcd_info + 0x19); hdisplay 1200 drivers/gpu/drm/radeon/radeon_combios.c DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.hdisplay, hdisplay 1258 drivers/gpu/drm/radeon/radeon_combios.c if ((RBIOS16(tmp) == lvds->native_mode.hdisplay) && hdisplay 1262 drivers/gpu/drm/radeon/radeon_combios.c if (hss > lvds->native_mode.hdisplay) hdisplay 1265 drivers/gpu/drm/radeon/radeon_combios.c lvds->native_mode.htotal = lvds->native_mode.hdisplay + hdisplay 1267 drivers/gpu/drm/radeon/radeon_combios.c lvds->native_mode.hsync_start = lvds->native_mode.hdisplay + hdisplay 476 drivers/gpu/drm/radeon/radeon_connectors.c if (native_mode->hdisplay != 0 && hdisplay 484 drivers/gpu/drm/radeon/radeon_connectors.c } else if (native_mode->hdisplay != 0 && hdisplay 493 drivers/gpu/drm/radeon/radeon_connectors.c mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); hdisplay 537 drivers/gpu/drm/radeon/radeon_connectors.c if (common_modes[i].w > native_mode->hdisplay || hdisplay 539 drivers/gpu/drm/radeon/radeon_connectors.c (common_modes[i].w == native_mode->hdisplay && hdisplay 782 drivers/gpu/drm/radeon/radeon_connectors.c if (mode->hdisplay != native_mode->hdisplay || hdisplay 791 drivers/gpu/drm/radeon/radeon_connectors.c if (mode->hdisplay == native_mode->hdisplay && hdisplay 849 drivers/gpu/drm/radeon/radeon_connectors.c if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) hdisplay 859 drivers/gpu/drm/radeon/radeon_connectors.c if ((mode->hdisplay > native_mode->hdisplay) || hdisplay 865 drivers/gpu/drm/radeon/radeon_connectors.c if ((mode->hdisplay != native_mode->hdisplay) || hdisplay 895 drivers/gpu/drm/radeon/radeon_connectors.c if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) hdisplay 1151 drivers/gpu/drm/radeon/radeon_connectors.c if ((mode->hdisplay > 1024) || (mode->vdisplay > 768)) hdisplay 1687 drivers/gpu/drm/radeon/radeon_connectors.c if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) hdisplay 1780 drivers/gpu/drm/radeon/radeon_connectors.c if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) hdisplay 1790 drivers/gpu/drm/radeon/radeon_connectors.c if ((mode->hdisplay > native_mode->hdisplay) || hdisplay 1796 drivers/gpu/drm/radeon/radeon_connectors.c if ((mode->hdisplay != native_mode->hdisplay) || hdisplay 210 drivers/gpu/drm/radeon/radeon_cursor.c x >= (crtc->x + crtc->mode.hdisplay) || hdisplay 1673 drivers/gpu/drm/radeon/radeon_display.c if ((mode->vdisplay == 480 && mode->hdisplay == 720) || /* 480p */ hdisplay 1711 drivers/gpu/drm/radeon/radeon_display.c else if (mode->hdisplay < radeon_encoder->native_mode.hdisplay || hdisplay 1722 drivers/gpu/drm/radeon/radeon_display.c src_h = crtc->mode.hdisplay; hdisplay 1723 drivers/gpu/drm/radeon/radeon_display.c dst_h = radeon_crtc->native_mode.hdisplay; hdisplay 1735 drivers/gpu/drm/radeon/radeon_display.c radeon_crtc->h_border = (mode->hdisplay >> 5) + 16; hdisplay 1743 drivers/gpu/drm/radeon/radeon_display.c src_h = crtc->mode.hdisplay; hdisplay 1744 drivers/gpu/drm/radeon/radeon_display.c dst_h = crtc->mode.hdisplay - (radeon_crtc->h_border * 2); hdisplay 329 drivers/gpu/drm/radeon/radeon_encoders.c unsigned hblank = native_mode->htotal - native_mode->hdisplay; hdisplay 331 drivers/gpu/drm/radeon/radeon_encoders.c unsigned hover = native_mode->hsync_start - native_mode->hdisplay; hdisplay 340 drivers/gpu/drm/radeon/radeon_encoders.c adjusted_mode->hdisplay = native_mode->hdisplay; hdisplay 344 drivers/gpu/drm/radeon/radeon_encoders.c adjusted_mode->htotal = native_mode->hdisplay + hblank; hdisplay 345 drivers/gpu/drm/radeon/radeon_encoders.c adjusted_mode->hsync_start = native_mode->hdisplay + hover; hdisplay 355 drivers/gpu/drm/radeon/radeon_encoders.c adjusted_mode->crtc_hdisplay = native_mode->hdisplay; hdisplay 55 drivers/gpu/drm/radeon/radeon_legacy_crtc.c int xres = mode->hdisplay; hdisplay 113 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if (native_mode->hdisplay == 0 || hdisplay 118 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if (xres > native_mode->hdisplay) hdisplay 119 drivers/gpu/drm/radeon/radeon_legacy_crtc.c xres = native_mode->hdisplay; hdisplay 123 drivers/gpu/drm/radeon/radeon_legacy_crtc.c if (xres == native_mode->hdisplay) hdisplay 137 drivers/gpu/drm/radeon/radeon_legacy_crtc.c / native_mode->hdisplay + 1; hdisplay 141 drivers/gpu/drm/radeon/radeon_legacy_crtc.c ((native_mode->hdisplay/8-1) << 16)); hdisplay 194 drivers/gpu/drm/radeon/radeon_legacy_crtc.c (((native_mode->hdisplay / 8) & 0x1ff) << 16)); hdisplay 232 drivers/gpu/drm/radeon/rs690.c if (mode1->hdisplay > mode2->hdisplay) { hdisplay 233 drivers/gpu/drm/radeon/rs690.c if (mode1->hdisplay > 2560) hdisplay 237 drivers/gpu/drm/radeon/rs690.c } else if (mode2->hdisplay > mode1->hdisplay) { hdisplay 238 drivers/gpu/drm/radeon/rs690.c if (mode2->hdisplay > 2560) hdisplay 302 drivers/gpu/drm/rcar-du/rcar_du_crtc.c mode->hdisplay - 19); hdisplay 318 drivers/gpu/drm/rcar-du/rcar_du_crtc.c rcar_du_crtc_write(rcrtc, DEWR, mode->hdisplay); hdisplay 52 drivers/gpu/drm/rcar-du/rcar_du_vsp.c .width = mode->hdisplay, hdisplay 64 drivers/gpu/drm/rcar-du/rcar_du_vsp.c .dst.x2 = mode->hdisplay, hdisplay 68 drivers/gpu/drm/rcar-du/rcar_du_vsp.c .src.x2 = mode->hdisplay << 16, hdisplay 159 drivers/gpu/drm/rcar-du/rcar_du_writeback.c if (fb->width != mode->hdisplay || fb->height != mode->vdisplay) { hdisplay 122 drivers/gpu/drm/rcar-du/rcar_lvds.c if (crtc_state->mode.hdisplay != panel_mode->hdisplay || hdisplay 717 drivers/gpu/drm/rockchip/cdn-dp-reg.c val = (mode->hsync_start - mode->hdisplay) << 16; hdisplay 723 drivers/gpu/drm/rockchip/cdn-dp-reg.c val = mode->hdisplay * bit_per_pix / 8; hdisplay 734 drivers/gpu/drm/rockchip/cdn-dp-reg.c val |= (mode->hdisplay << 16) | (video->h_sync_polarity << 15); hdisplay 761 drivers/gpu/drm/rockchip/cdn-dp-reg.c val |= mode->hdisplay << 16; hdisplay 400 drivers/gpu/drm/rockchip/inno_hdmi.c value = mode->htotal - mode->hdisplay; hdisplay 404 drivers/gpu/drm/rockchip/inno_hdmi.c value = mode->hsync_start - mode->hdisplay; hdisplay 234 drivers/gpu/drm/rockchip/rk3066_hdmi.c value = mode->htotal - mode->hdisplay; hdisplay 1090 drivers/gpu/drm/rockchip/rockchip_drm_vop.c u16 hdisplay = adjusted_mode->hdisplay; hdisplay 1093 drivers/gpu/drm/rockchip/rockchip_drm_vop.c u16 hact_end = hact_st + hdisplay; hdisplay 96 drivers/gpu/drm/shmobile/shmob_drm_crtc.c value = ((mode->hdisplay / 8) << 16) /* HDCN */ hdisplay 104 drivers/gpu/drm/shmobile/shmob_drm_crtc.c value = ((mode->hdisplay & 7) << 24) | ((mode->htotal & 7) << 16) hdisplay 607 drivers/gpu/drm/shmobile/shmob_drm_crtc.c mode->hdisplay = sdev->pdata->panel.mode.hdisplay; hdisplay 286 drivers/gpu/drm/sti/sti_cursor.c x = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1); hdisplay 126 drivers/gpu/drm/sti/sti_dvo.c timing.active_pixels = mode->hdisplay; hdisplay 127 drivers/gpu/drm/sti/sti_dvo.c timing.blanking_pixels = mode->hsync_start - mode->hdisplay; hdisplay 639 drivers/gpu/drm/sti/sti_gdp.c dst_w = clamp_val(state->crtc_w, 0, mode->hdisplay - dst_x); hdisplay 748 drivers/gpu/drm/sti/sti_gdp.c dst_w = clamp_val(state->crtc_w, 0, mode->hdisplay - dst_x); hdisplay 244 drivers/gpu/drm/sti/sti_hdmi.c xmax = sti_vtg_get_pixel_number(hdmi->mode, hdmi->mode.hdisplay); hdisplay 1039 drivers/gpu/drm/sti/sti_hqvdp.c dst_w = clamp_val(state->crtc_w, 0, mode->hdisplay - dst_x); hdisplay 1146 drivers/gpu/drm/sti/sti_hqvdp.c dst_w = clamp_val(state->crtc_w, 0, mode->hdisplay - dst_x); hdisplay 231 drivers/gpu/drm/sti/sti_mixer.c xds = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1); hdisplay 300 drivers/gpu/drm/sti/sti_mixer.c xds = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1); hdisplay 146 drivers/gpu/drm/sti/sti_vid.c int dst_w = clamp_val(state->crtc_w, 0, mode->hdisplay - dst_x); hdisplay 168 drivers/gpu/drm/sti/sti_vtg.c u32 xstop = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1); hdisplay 151 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c writel(SUN4I_HDMI_VID_TIMING_X(mode->hdisplay) | hdisplay 160 drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c x = mode->hsync_start - mode->hdisplay; hdisplay 79 drivers/gpu/drm/sun4i/sun4i_rgb.c if ((mode->hdisplay < 1) || (mode->htotal < 1)) hdisplay 82 drivers/gpu/drm/sun4i/sun4i_rgb.c if ((mode->hdisplay > 0x7ff) || (mode->htotal > 0xfff)) hdisplay 373 drivers/gpu/drm/sun4i/sun4i_tcon.c block_space -= mode->hdisplay + 40; hdisplay 377 drivers/gpu/drm/sun4i/sun4i_tcon.c SUN4I_TCON0_CPU_TRI0_BLOCK_SIZE(mode->hdisplay)); hdisplay 149 drivers/gpu/drm/sun4i/sun4i_tv.c u32 hdisplay; hdisplay 225 drivers/gpu/drm/sun4i/sun4i_tv.c .hdisplay = 720, hdisplay 251 drivers/gpu/drm/sun4i/sun4i_tv.c .hdisplay = 720, hdisplay 330 drivers/gpu/drm/sun4i/sun4i_tv.c mode->hdisplay = tv_mode->hdisplay; hdisplay 331 drivers/gpu/drm/sun4i/sun4i_tv.c mode->hsync_start = mode->hdisplay + tv_mode->hfront_porch; hdisplay 392 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c edge0 += (mode->hdisplay + 40) * SUN6I_DSI_TCON_DIV / 8; hdisplay 410 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c edge1 += (mode->hdisplay + hbp + 20) * Bpp / device->lanes; hdisplay 440 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c } else if ((mode->hsync_start - mode->hdisplay) > 20) { hdisplay 442 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c u16 drq = (mode->hsync_start - mode->hdisplay) - 20; hdisplay 461 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c u32 hsync_porch = (mode->htotal - mode->hdisplay) * 150; hdisplay 513 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c wc = mode->hdisplay * mipi_dsi_pixel_format_to_bpp(device->format) / 8; hdisplay 544 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c hblk = mode->hdisplay * Bpp; hdisplay 578 drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c (mode->hsync_start - mode->hdisplay) * Bpp - HFP_PACKET_OVERHEAD); hdisplay 1608 drivers/gpu/drm/tegra/dc.c ((mode->hsync_start - mode->hdisplay) << 0); hdisplay 1611 drivers/gpu/drm/tegra/dc.c value = (mode->vdisplay << 16) | mode->hdisplay; hdisplay 547 drivers/gpu/drm/tegra/dsi.c hact = mode->hdisplay * mul / div; hdisplay 559 drivers/gpu/drm/tegra/dsi.c hfp = (mode->hsync_start - mode->hdisplay) * mul / div; hdisplay 582 drivers/gpu/drm/tegra/dsi.c bytes = 1 + (mode->hdisplay / 2) * mul / div; hdisplay 585 drivers/gpu/drm/tegra/dsi.c bytes = 1 + mode->hdisplay * mul / div; hdisplay 626 drivers/gpu/drm/tegra/dsi.c tegra_dsi_ganged_enable(dsi, 0, mode->hdisplay / 2); hdisplay 627 drivers/gpu/drm/tegra/dsi.c tegra_dsi_ganged_enable(dsi->slave, mode->hdisplay / 2, hdisplay 628 drivers/gpu/drm/tegra/dsi.c mode->hdisplay / 2); hdisplay 1202 drivers/gpu/drm/tegra/hdmi.c h_front_porch = mode->hsync_start - mode->hdisplay; hdisplay 1249 drivers/gpu/drm/tegra/hdmi.c if ((mode->hdisplay == 720) && ((mode->vdisplay == 480) || hdisplay 926 drivers/gpu/drm/tegra/sor.c params.num_clocks = div_u64(link_rate * mode->hdisplay, pclk); hdisplay 961 drivers/gpu/drm/tegra/sor.c num_syms_per_line = (mode->hdisplay * config->bits_per_pixel) * hdisplay 976 drivers/gpu/drm/tegra/sor.c num = ((mode->htotal - mode->hdisplay) - 7) * link_rate; hdisplay 985 drivers/gpu/drm/tegra/sor.c num = (mode->hdisplay - 25) * link_rate; hdisplay 1115 drivers/gpu/drm/tegra/sor.c hbs = hbe + mode->hdisplay; hdisplay 1643 drivers/gpu/drm/tegra/sor.c hfp = mode->hsync_start - mode->hdisplay; hdisplay 1665 drivers/gpu/drm/tegra/sor.c if (mode->hdisplay < 16) hdisplay 2595 drivers/gpu/drm/tegra/sor.c max_ac = ((mode->htotal - mode->hdisplay) - SOR_REKEY - 18) / 32; hdisplay 317 drivers/gpu/drm/tilcdc/tilcdc_crtc.c hfp = mode->hsync_start - mode->hdisplay; hdisplay 324 drivers/gpu/drm/tilcdc/tilcdc_crtc.c mode->hdisplay, mode->vdisplay, hbp, hfp, hsw, vbp, vfp, vsw); hdisplay 344 drivers/gpu/drm/tilcdc/tilcdc_crtc.c reg = (((mode->hdisplay >> 4) - 1) << 4) | hdisplay 349 drivers/gpu/drm/tilcdc/tilcdc_crtc.c reg |= (((mode->hdisplay >> 4) - 1) & 0x40) >> 3; hdisplay 741 drivers/gpu/drm/tilcdc/tilcdc_crtc.c if (mode->hdisplay > tilcdc_crtc_max_width(crtc)) hdisplay 745 drivers/gpu/drm/tilcdc/tilcdc_crtc.c if (mode->hdisplay & 0xf) hdisplay 752 drivers/gpu/drm/tilcdc/tilcdc_crtc.c mode->hdisplay, mode->vdisplay, hdisplay 756 drivers/gpu/drm/tilcdc/tilcdc_crtc.c hfp = mode->hsync_start - mode->hdisplay; hdisplay 805 drivers/gpu/drm/tilcdc/tilcdc_crtc.c if (mode->hdisplay > priv->max_width) hdisplay 809 drivers/gpu/drm/tilcdc/tilcdc_crtc.c bandwidth = mode->hdisplay * mode->vdisplay * hdisplay 48 drivers/gpu/drm/tilcdc/tilcdc_plane.c if (crtc_state->mode.hdisplay != state->crtc_w || hdisplay 52 drivers/gpu/drm/tilcdc/tilcdc_plane.c crtc_state->mode.hdisplay, crtc_state->mode.vdisplay, hdisplay 57 drivers/gpu/drm/tilcdc/tilcdc_plane.c pitch = crtc_state->mode.hdisplay * hdisplay 1136 drivers/gpu/drm/tiny/repaper.c epd->width = mode->hdisplay; hdisplay 1150 drivers/gpu/drm/tiny/repaper.c drm->mode_config.min_width = mode->hdisplay; hdisplay 1151 drivers/gpu/drm/tiny/repaper.c drm->mode_config.max_width = mode->hdisplay; hdisplay 343 drivers/gpu/drm/tiny/st7586.c bufsize = (st7586_mode.vdisplay + 2) / 3 * st7586_mode.hdisplay; hdisplay 81 drivers/gpu/drm/tve200/tve200_display.c if (!(mode->hdisplay == 352 && mode->vdisplay == 240) && /* SIF(525) */ hdisplay 82 drivers/gpu/drm/tve200/tve200_display.c !(mode->hdisplay == 352 && mode->vdisplay == 288) && /* CIF(625) */ hdisplay 83 drivers/gpu/drm/tve200/tve200_display.c !(mode->hdisplay == 640 && mode->vdisplay == 480) && /* VGA */ hdisplay 84 drivers/gpu/drm/tve200/tve200_display.c !(mode->hdisplay == 720 && mode->vdisplay == 480) && /* D1 */ hdisplay 85 drivers/gpu/drm/tve200/tve200_display.c !(mode->hdisplay == 720 && mode->vdisplay == 576)) { /* D1 */ hdisplay 87 drivers/gpu/drm/tve200/tve200_display.c mode->hdisplay, mode->vdisplay); hdisplay 104 drivers/gpu/drm/tve200/tve200_display.c if (fb->pitches[0] != mode->hdisplay * fb->format->cpp[0]) { hdisplay 154 drivers/gpu/drm/tve200/tve200_display.c if ((mode->hdisplay == 352 && mode->vdisplay == 240) || /* SIF(525) */ hdisplay 155 drivers/gpu/drm/tve200/tve200_display.c (mode->hdisplay == 352 && mode->vdisplay == 288)) { /* CIF(625) */ hdisplay 158 drivers/gpu/drm/tve200/tve200_display.c } else if (mode->hdisplay == 640 && mode->vdisplay == 480) { hdisplay 161 drivers/gpu/drm/tve200/tve200_display.c } else if ((mode->hdisplay == 720 && mode->vdisplay == 480) || hdisplay 162 drivers/gpu/drm/tve200/tve200_display.c (mode->hdisplay == 720 && mode->vdisplay == 576)) { hdisplay 65 drivers/gpu/drm/udl/udl_connector.c if (mode->vdisplay * mode->hdisplay > udl->sku_pixel_limit) hdisplay 193 drivers/gpu/drm/udl/udl_modeset.c wrptr = udl_set_register_16(wrptr, 0x0F, mode->hdisplay); hdisplay 327 drivers/gpu/drm/udl/udl_modeset.c wrptr = udl_set_base8bpp(wrptr, 2 * mode->vdisplay * mode->hdisplay); hdisplay 65 drivers/gpu/drm/vboxvideo/vbox_main.c if (rects[i].x1 > crtc_x + mode->hdisplay || hdisplay 184 drivers/gpu/drm/vboxvideo/vbox_mode.c vbox_crtc->width = crtc->state->mode.hdisplay; hdisplay 320 drivers/gpu/drm/vc4/vc4_crtc.c mode->hdisplay) * pixel_rep, hdisplay 322 drivers/gpu/drm/vc4/vc4_crtc.c VC4_SET_FIELD(mode->hdisplay * pixel_rep, PV_HORZB_HACTIVE)); hdisplay 366 drivers/gpu/drm/vc4/vc4_crtc.c CRTC_WRITE(PV_HACT_ACT, mode->hdisplay * pixel_rep); hdisplay 568 drivers/gpu/drm/vc4/vc4_crtc.c VC4_SET_FIELD(mode->hdisplay, SCALER_DISPCTRLX_WIDTH) | hdisplay 548 drivers/gpu/drm/vc4/vc4_hdmi.c VC4_SET_FIELD(mode->hdisplay * pixel_rep, hdisplay 559 drivers/gpu/drm/vc4/vc4_hdmi.c mode->hdisplay) * pixel_rep, hdisplay 274 drivers/gpu/drm/vc4/vc4_plane.c if (left + right >= crtc_state->mode.hdisplay || hdisplay 278 drivers/gpu/drm/vc4/vc4_plane.c adjhdisplay = crtc_state->mode.hdisplay - (left + right); hdisplay 281 drivers/gpu/drm/vc4/vc4_plane.c crtc_state->mode.hdisplay); hdisplay 283 drivers/gpu/drm/vc4/vc4_plane.c if (vc4_pstate->crtc_x > crtc_state->mode.hdisplay - left) hdisplay 284 drivers/gpu/drm/vc4/vc4_plane.c vc4_pstate->crtc_x = crtc_state->mode.hdisplay - left; hdisplay 296 drivers/gpu/drm/vc4/vc4_plane.c crtc_state->mode.hdisplay); hdisplay 912 drivers/gpu/drm/vc4/vc4_plane.c vc4_state->crtc_w == state->crtc->mode.hdisplay && hdisplay 188 drivers/gpu/drm/vc4/vc4_txp.c int w = mode->hdisplay, h = mode->vdisplay; hdisplay 240 drivers/gpu/drm/vc4/vc4_txp.c if (fb->width != crtc_state->mode.hdisplay || hdisplay 299 drivers/gpu/drm/vc4/vc4_txp.c VC4_SET_FIELD(mode->hdisplay, TXP_WIDTH) | hdisplay 89 drivers/gpu/drm/virtio/virtgpu_display.c crtc->mode.hdisplay, hdisplay 197 drivers/gpu/drm/virtio/virtgpu_display.c if (mode->hdisplay == XRES_DEF && mode->vdisplay == YRES_DEF) hdisplay 199 drivers/gpu/drm/virtio/virtgpu_display.c if (mode->hdisplay <= width && mode->hdisplay >= width - 16 && hdisplay 203 drivers/gpu/drm/virtio/virtgpu_display.c DRM_DEBUG("del mode: %dx%d\n", mode->hdisplay, mode->vdisplay); hdisplay 576 drivers/gpu/drm/vmwgfx/vmwgfx_fb.c mode->hdisplay = var->xres; hdisplay 581 drivers/gpu/drm/vmwgfx/vmwgfx_fb.c mode->hdisplay * hdisplay 680 drivers/gpu/drm/vmwgfx/vmwgfx_fb.c info->var.xres = init_mode->hdisplay; hdisplay 1633 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c rects[i].x2 = du->gui_x + crtc_state->mode.hdisplay; hdisplay 2220 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c mode->hsync_start = mode->hdisplay + 50; hdisplay 2268 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c mode->hdisplay = du->pref_width; hdisplay 2273 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c mode->hdisplay * assumed_bpp, hdisplay 2291 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c if (bmode->hdisplay > max_width || hdisplay 2296 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c bmode->hdisplay * assumed_bpp, hdisplay 2471 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c s32 crtc_width = unit->crtc.mode.hdisplay; hdisplay 93 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c w = max(w, crtc->x + crtc->mode.hdisplay); hdisplay 127 drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c vmw_write(dev_priv, SVGA_REG_DISPLAY_WIDTH, crtc->mode.hdisplay); hdisplay 145 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c cmd->obj.size.width = mode->hdisplay; hdisplay 154 drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c cmd->obj.backingStore.pitch = mode->hdisplay * 4; hdisplay 181 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c cmd->body.width = mode->hdisplay; hdisplay 194 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c stdu->display_width = mode->hdisplay; hdisplay 1042 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c uint32_t hdisplay = new_state->crtc_w, vdisplay = new_state->crtc_h; hdisplay 1058 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c if (new_vfbs && new_vfbs->surface->base_size.width == hdisplay && hdisplay 1070 drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c display_base_size.width = hdisplay; hdisplay 279 drivers/gpu/drm/xen/xen_drm_front_kms.c if (mode->hdisplay != pipeline->width) hdisplay 68 drivers/gpu/drm/zte/zx_tvenc.c .hdisplay = 720, hdisplay 99 drivers/gpu/drm/zte/zx_tvenc.c .hdisplay = 720, hdisplay 490 include/drm/drm_edid.h int hdisplay, int vdisplay); hdisplay 136 include/drm/drm_modes.h .hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \ hdisplay 153 include/drm/drm_modes.h .hdisplay = (hd), .hsync_start = (hd), .hsync_end = (hd), \ hdisplay 281 include/drm/drm_modes.h int hdisplay; hdisplay 442 include/drm/drm_modes.h (m)->hdisplay, (m)->hsync_start, (m)->hsync_end, (m)->htotal, \ hdisplay 481 include/drm/drm_modes.h int hdisplay, int vdisplay, int vrefresh, hdisplay 485 include/drm/drm_modes.h int hdisplay, int vdisplay, int vrefresh, hdisplay 488 include/drm/drm_modes.h int hdisplay, int vdisplay, hdisplay 506 include/drm/drm_modes.h int *hdisplay, int *vdisplay); hdisplay 223 include/uapi/drm/drm_mode.h __u16 hdisplay;