hdcp             3654 drivers/gpu/drm/i915/display/intel_ddi.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp             3656 drivers/gpu/drm/i915/display/intel_ddi.c 			(conn_state->hdcp_content_type != hdcp->content_type &&
hdcp             3677 drivers/gpu/drm/i915/display/intel_ddi.c 		mutex_lock(&hdcp->mutex);
hdcp             3678 drivers/gpu/drm/i915/display/intel_ddi.c 		hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
hdcp             3679 drivers/gpu/drm/i915/display/intel_ddi.c 		schedule_work(&hdcp->prop_work);
hdcp             3680 drivers/gpu/drm/i915/display/intel_ddi.c 		mutex_unlock(&hdcp->mutex);
hdcp             17085 drivers/gpu/drm/i915/display/intel_display.c 		if (connector->hdcp.shim) {
hdcp             17086 drivers/gpu/drm/i915/display/intel_display.c 			cancel_delayed_work_sync(&connector->hdcp.check_work);
hdcp             17087 drivers/gpu/drm/i915/display/intel_display.c 			cancel_work_sync(&connector->hdcp.prop_work);
hdcp              425 drivers/gpu/drm/i915/display/intel_display_types.h 	struct intel_hdcp hdcp;
hdcp             5590 drivers/gpu/drm/i915/display/intel_dp.c static void intel_dp_hdcp_wait_for_cp_irq(struct intel_hdcp *hdcp, int timeout)
hdcp             5594 drivers/gpu/drm/i915/display/intel_dp.c #define C (hdcp->cp_irq_count_cached != atomic_read(&hdcp->cp_irq_count))
hdcp             5595 drivers/gpu/drm/i915/display/intel_dp.c 	ret = wait_event_interruptible_timeout(hdcp->cp_irq_queue, C,
hdcp             5930 drivers/gpu/drm/i915/display/intel_dp.c 	struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
hdcp             5935 drivers/gpu/drm/i915/display/intel_dp.c 	if (msg_id == HDCP_2_2_AKE_SEND_HPRIME && !hdcp->is_paired)
hdcp             5952 drivers/gpu/drm/i915/display/intel_dp.c 		intel_dp_hdcp_wait_for_cp_irq(hdcp, timeout);
hdcp             5982 drivers/gpu/drm/i915/display/intel_dp.c 	struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
hdcp             5998 drivers/gpu/drm/i915/display/intel_dp.c 	hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count);
hdcp               65 drivers/gpu/drm/i915/display/intel_hdcp.c 	const struct intel_hdcp_shim *shim = connector->hdcp.shim;
hdcp               87 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp               91 drivers/gpu/drm/i915/display/intel_hdcp.c 	if (!hdcp->hdcp2_supported)
hdcp              103 drivers/gpu/drm/i915/display/intel_hdcp.c 	hdcp->shim->hdcp_2_2_capable(intel_dig_port, &capable);
hdcp              496 drivers/gpu/drm/i915/display/intel_hdcp.c 	const struct intel_hdcp_shim *shim = connector->hdcp.shim;
hdcp              575 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp              577 drivers/gpu/drm/i915/display/intel_hdcp.c 	const struct intel_hdcp_shim *shim = hdcp->shim;
hdcp              728 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp              737 drivers/gpu/drm/i915/display/intel_hdcp.c 	hdcp->hdcp_encrypted = false;
hdcp              745 drivers/gpu/drm/i915/display/intel_hdcp.c 	ret = hdcp->shim->toggle_signalling(intel_dig_port, false);
hdcp              757 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp              784 drivers/gpu/drm/i915/display/intel_hdcp.c 			hdcp->hdcp_encrypted = true;
hdcp              799 drivers/gpu/drm/i915/display/intel_hdcp.c struct intel_connector *intel_hdcp_to_connector(struct intel_hdcp *hdcp)
hdcp              801 drivers/gpu/drm/i915/display/intel_hdcp.c 	return container_of(hdcp, struct intel_connector, hdcp);
hdcp              807 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp              813 drivers/gpu/drm/i915/display/intel_hdcp.c 	mutex_lock(&hdcp->mutex);
hdcp              816 drivers/gpu/drm/i915/display/intel_hdcp.c 	if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED ||
hdcp              817 drivers/gpu/drm/i915/display/intel_hdcp.c 	    !hdcp->hdcp_encrypted) {
hdcp              827 drivers/gpu/drm/i915/display/intel_hdcp.c 		hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
hdcp              828 drivers/gpu/drm/i915/display/intel_hdcp.c 		schedule_work(&hdcp->prop_work);
hdcp              832 drivers/gpu/drm/i915/display/intel_hdcp.c 	if (hdcp->shim->check_link(intel_dig_port)) {
hdcp              833 drivers/gpu/drm/i915/display/intel_hdcp.c 		if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
hdcp              834 drivers/gpu/drm/i915/display/intel_hdcp.c 			hdcp->value = DRM_MODE_CONTENT_PROTECTION_ENABLED;
hdcp              835 drivers/gpu/drm/i915/display/intel_hdcp.c 			schedule_work(&hdcp->prop_work);
hdcp              846 drivers/gpu/drm/i915/display/intel_hdcp.c 		hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
hdcp              847 drivers/gpu/drm/i915/display/intel_hdcp.c 		schedule_work(&hdcp->prop_work);
hdcp              854 drivers/gpu/drm/i915/display/intel_hdcp.c 		hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
hdcp              855 drivers/gpu/drm/i915/display/intel_hdcp.c 		schedule_work(&hdcp->prop_work);
hdcp              860 drivers/gpu/drm/i915/display/intel_hdcp.c 	mutex_unlock(&hdcp->mutex);
hdcp              866 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = container_of(work, struct intel_hdcp,
hdcp              868 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_connector *connector = intel_hdcp_to_connector(hdcp);
hdcp              872 drivers/gpu/drm/i915/display/intel_hdcp.c 	mutex_lock(&hdcp->mutex);
hdcp              879 drivers/gpu/drm/i915/display/intel_hdcp.c 	if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
hdcp              881 drivers/gpu/drm/i915/display/intel_hdcp.c 						   hdcp->value);
hdcp              883 drivers/gpu/drm/i915/display/intel_hdcp.c 	mutex_unlock(&hdcp->mutex);
hdcp              897 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct hdcp_port_data *data = &connector->hdcp.port_data;
hdcp              925 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct hdcp_port_data *data = &connector->hdcp.port_data;
hdcp              951 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct hdcp_port_data *data = &connector->hdcp.port_data;
hdcp              976 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct hdcp_port_data *data = &connector->hdcp.port_data;
hdcp             1001 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct hdcp_port_data *data = &connector->hdcp.port_data;
hdcp             1026 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct hdcp_port_data *data = &connector->hdcp.port_data;
hdcp             1050 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct hdcp_port_data *data = &connector->hdcp.port_data;
hdcp             1077 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct hdcp_port_data *data = &connector->hdcp.port_data;
hdcp             1104 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct hdcp_port_data *data = &connector->hdcp.port_data;
hdcp             1127 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct hdcp_port_data *data = &connector->hdcp.port_data;
hdcp             1163 drivers/gpu/drm/i915/display/intel_hdcp.c 					     &connector->hdcp.port_data);
hdcp             1178 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp             1187 drivers/gpu/drm/i915/display/intel_hdcp.c 	const struct intel_hdcp_shim *shim = hdcp->shim;
hdcp             1192 drivers/gpu/drm/i915/display/intel_hdcp.c 	hdcp->seq_num_v = 0;
hdcp             1193 drivers/gpu/drm/i915/display/intel_hdcp.c 	hdcp->seq_num_m = 0;
hdcp             1214 drivers/gpu/drm/i915/display/intel_hdcp.c 	hdcp->is_repeater = HDCP_2_2_RX_REPEATER(msgs.send_cert.rx_caps[2]);
hdcp             1227 drivers/gpu/drm/i915/display/intel_hdcp.c 					      &hdcp->is_paired,
hdcp             1245 drivers/gpu/drm/i915/display/intel_hdcp.c 	if (!hdcp->is_paired) {
hdcp             1257 drivers/gpu/drm/i915/display/intel_hdcp.c 		hdcp->is_paired = true;
hdcp             1266 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp             1271 drivers/gpu/drm/i915/display/intel_hdcp.c 	const struct intel_hdcp_shim *shim = hdcp->shim;
hdcp             1302 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp             1310 drivers/gpu/drm/i915/display/intel_hdcp.c 	ret = hdcp->shim->write_2_2_msg(intel_dig_port, &send_eks,
hdcp             1322 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp             1327 drivers/gpu/drm/i915/display/intel_hdcp.c 	const struct intel_hdcp_shim *shim = hdcp->shim;
hdcp             1332 drivers/gpu/drm/i915/display/intel_hdcp.c 	drm_hdcp_cpu_to_be24(msgs.stream_manage.seq_num_m, hdcp->seq_num_m);
hdcp             1339 drivers/gpu/drm/i915/display/intel_hdcp.c 	msgs.stream_manage.streams[0].stream_type = hdcp->content_type;
hdcp             1352 drivers/gpu/drm/i915/display/intel_hdcp.c 	hdcp->port_data.seq_num_m = hdcp->seq_num_m;
hdcp             1353 drivers/gpu/drm/i915/display/intel_hdcp.c 	hdcp->port_data.streams[0].stream_type = hdcp->content_type;
hdcp             1359 drivers/gpu/drm/i915/display/intel_hdcp.c 	hdcp->seq_num_m++;
hdcp             1361 drivers/gpu/drm/i915/display/intel_hdcp.c 	if (hdcp->seq_num_m > HDCP_2_2_SEQ_NUM_MAX) {
hdcp             1373 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp             1379 drivers/gpu/drm/i915/display/intel_hdcp.c 	const struct intel_hdcp_shim *shim = hdcp->shim;
hdcp             1401 drivers/gpu/drm/i915/display/intel_hdcp.c 	if (seq_num_v < hdcp->seq_num_v) {
hdcp             1421 drivers/gpu/drm/i915/display/intel_hdcp.c 	hdcp->seq_num_v = seq_num_v;
hdcp             1444 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp             1445 drivers/gpu/drm/i915/display/intel_hdcp.c 	const struct intel_hdcp_shim *shim = hdcp->shim;
hdcp             1468 drivers/gpu/drm/i915/display/intel_hdcp.c 					       hdcp->is_repeater,
hdcp             1469 drivers/gpu/drm/i915/display/intel_hdcp.c 					       hdcp->content_type);
hdcp             1474 drivers/gpu/drm/i915/display/intel_hdcp.c 	if (hdcp->is_repeater) {
hdcp             1482 drivers/gpu/drm/i915/display/intel_hdcp.c 	hdcp->port_data.streams[0].stream_type = hdcp->content_type;
hdcp             1494 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp             1500 drivers/gpu/drm/i915/display/intel_hdcp.c 	if (hdcp->shim->toggle_signalling) {
hdcp             1501 drivers/gpu/drm/i915/display/intel_hdcp.c 		ret = hdcp->shim->toggle_signalling(intel_dig_port, true);
hdcp             1527 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp             1542 drivers/gpu/drm/i915/display/intel_hdcp.c 	if (hdcp->shim->toggle_signalling) {
hdcp             1543 drivers/gpu/drm/i915/display/intel_hdcp.c 		ret = hdcp->shim->toggle_signalling(intel_dig_port, false);
hdcp             1589 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp             1594 drivers/gpu/drm/i915/display/intel_hdcp.c 		      hdcp->content_type);
hdcp             1599 drivers/gpu/drm/i915/display/intel_hdcp.c 			      hdcp->content_type, ret);
hdcp             1605 drivers/gpu/drm/i915/display/intel_hdcp.c 		      hdcp->content_type);
hdcp             1607 drivers/gpu/drm/i915/display/intel_hdcp.c 	hdcp->hdcp2_encrypted = true;
hdcp             1623 drivers/gpu/drm/i915/display/intel_hdcp.c 	connector->hdcp.hdcp2_encrypted = false;
hdcp             1633 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp             1637 drivers/gpu/drm/i915/display/intel_hdcp.c 	mutex_lock(&hdcp->mutex);
hdcp             1640 drivers/gpu/drm/i915/display/intel_hdcp.c 	if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED ||
hdcp             1641 drivers/gpu/drm/i915/display/intel_hdcp.c 	    !hdcp->hdcp2_encrypted) {
hdcp             1650 drivers/gpu/drm/i915/display/intel_hdcp.c 		hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
hdcp             1651 drivers/gpu/drm/i915/display/intel_hdcp.c 		schedule_work(&hdcp->prop_work);
hdcp             1655 drivers/gpu/drm/i915/display/intel_hdcp.c 	ret = hdcp->shim->check_2_2_link(intel_dig_port);
hdcp             1657 drivers/gpu/drm/i915/display/intel_hdcp.c 		if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
hdcp             1658 drivers/gpu/drm/i915/display/intel_hdcp.c 			hdcp->value = DRM_MODE_CONTENT_PROTECTION_ENABLED;
hdcp             1659 drivers/gpu/drm/i915/display/intel_hdcp.c 			schedule_work(&hdcp->prop_work);
hdcp             1665 drivers/gpu/drm/i915/display/intel_hdcp.c 		if (hdcp->value == DRM_MODE_CONTENT_PROTECTION_UNDESIRED)
hdcp             1671 drivers/gpu/drm/i915/display/intel_hdcp.c 			hdcp->value = DRM_MODE_CONTENT_PROTECTION_ENABLED;
hdcp             1672 drivers/gpu/drm/i915/display/intel_hdcp.c 			schedule_work(&hdcp->prop_work);
hdcp             1687 drivers/gpu/drm/i915/display/intel_hdcp.c 		hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
hdcp             1688 drivers/gpu/drm/i915/display/intel_hdcp.c 		schedule_work(&hdcp->prop_work);
hdcp             1697 drivers/gpu/drm/i915/display/intel_hdcp.c 		hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
hdcp             1698 drivers/gpu/drm/i915/display/intel_hdcp.c 		schedule_work(&hdcp->prop_work);
hdcp             1703 drivers/gpu/drm/i915/display/intel_hdcp.c 	mutex_unlock(&hdcp->mutex);
hdcp             1709 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = container_of(to_delayed_work(work),
hdcp             1712 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_connector *connector = intel_hdcp_to_connector(hdcp);
hdcp             1715 drivers/gpu/drm/i915/display/intel_hdcp.c 		schedule_delayed_work(&hdcp->check_work,
hdcp             1718 drivers/gpu/drm/i915/display/intel_hdcp.c 		schedule_delayed_work(&hdcp->check_work,
hdcp             1755 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp             1756 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct hdcp_port_data *data = &hdcp->port_data;
hdcp             1773 drivers/gpu/drm/i915/display/intel_hdcp.c 	data->streams[0].stream_type = hdcp->content_type;
hdcp             1813 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp             1822 drivers/gpu/drm/i915/display/intel_hdcp.c 	hdcp->hdcp2_supported = true;
hdcp             1829 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp             1840 drivers/gpu/drm/i915/display/intel_hdcp.c 							 hdcp->hdcp2_supported);
hdcp             1842 drivers/gpu/drm/i915/display/intel_hdcp.c 		hdcp->hdcp2_supported = false;
hdcp             1843 drivers/gpu/drm/i915/display/intel_hdcp.c 		kfree(hdcp->port_data.streams);
hdcp             1847 drivers/gpu/drm/i915/display/intel_hdcp.c 	hdcp->shim = shim;
hdcp             1848 drivers/gpu/drm/i915/display/intel_hdcp.c 	mutex_init(&hdcp->mutex);
hdcp             1849 drivers/gpu/drm/i915/display/intel_hdcp.c 	INIT_DELAYED_WORK(&hdcp->check_work, intel_hdcp_check_work);
hdcp             1850 drivers/gpu/drm/i915/display/intel_hdcp.c 	INIT_WORK(&hdcp->prop_work, intel_hdcp_prop_work);
hdcp             1851 drivers/gpu/drm/i915/display/intel_hdcp.c 	init_waitqueue_head(&hdcp->cp_irq_queue);
hdcp             1858 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp             1862 drivers/gpu/drm/i915/display/intel_hdcp.c 	if (!hdcp->shim)
hdcp             1865 drivers/gpu/drm/i915/display/intel_hdcp.c 	mutex_lock(&hdcp->mutex);
hdcp             1866 drivers/gpu/drm/i915/display/intel_hdcp.c 	WARN_ON(hdcp->value == DRM_MODE_CONTENT_PROTECTION_ENABLED);
hdcp             1867 drivers/gpu/drm/i915/display/intel_hdcp.c 	hdcp->content_type = content_type;
hdcp             1884 drivers/gpu/drm/i915/display/intel_hdcp.c 	    hdcp->content_type != DRM_MODE_HDCP_CONTENT_TYPE1) {
hdcp             1889 drivers/gpu/drm/i915/display/intel_hdcp.c 		schedule_delayed_work(&hdcp->check_work, check_link_interval);
hdcp             1890 drivers/gpu/drm/i915/display/intel_hdcp.c 		hdcp->value = DRM_MODE_CONTENT_PROTECTION_ENABLED;
hdcp             1891 drivers/gpu/drm/i915/display/intel_hdcp.c 		schedule_work(&hdcp->prop_work);
hdcp             1894 drivers/gpu/drm/i915/display/intel_hdcp.c 	mutex_unlock(&hdcp->mutex);
hdcp             1900 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp             1903 drivers/gpu/drm/i915/display/intel_hdcp.c 	if (!hdcp->shim)
hdcp             1906 drivers/gpu/drm/i915/display/intel_hdcp.c 	mutex_lock(&hdcp->mutex);
hdcp             1908 drivers/gpu/drm/i915/display/intel_hdcp.c 	if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
hdcp             1909 drivers/gpu/drm/i915/display/intel_hdcp.c 		hdcp->value = DRM_MODE_CONTENT_PROTECTION_UNDESIRED;
hdcp             1910 drivers/gpu/drm/i915/display/intel_hdcp.c 		if (hdcp->hdcp2_encrypted)
hdcp             1912 drivers/gpu/drm/i915/display/intel_hdcp.c 		else if (hdcp->hdcp_encrypted)
hdcp             1916 drivers/gpu/drm/i915/display/intel_hdcp.c 	mutex_unlock(&hdcp->mutex);
hdcp             1917 drivers/gpu/drm/i915/display/intel_hdcp.c 	cancel_delayed_work_sync(&hdcp->check_work);
hdcp             1937 drivers/gpu/drm/i915/display/intel_hdcp.c 	if (!connector->hdcp.shim)
hdcp             1940 drivers/gpu/drm/i915/display/intel_hdcp.c 	mutex_lock(&connector->hdcp.mutex);
hdcp             1941 drivers/gpu/drm/i915/display/intel_hdcp.c 	kfree(connector->hdcp.port_data.streams);
hdcp             1942 drivers/gpu/drm/i915/display/intel_hdcp.c 	mutex_unlock(&connector->hdcp.mutex);
hdcp             1984 drivers/gpu/drm/i915/display/intel_hdcp.c 	struct intel_hdcp *hdcp = &connector->hdcp;
hdcp             1986 drivers/gpu/drm/i915/display/intel_hdcp.c 	if (!hdcp->shim)
hdcp             1989 drivers/gpu/drm/i915/display/intel_hdcp.c 	atomic_inc(&connector->hdcp.cp_irq_count);
hdcp             1990 drivers/gpu/drm/i915/display/intel_hdcp.c 	wake_up_all(&connector->hdcp.cp_irq_queue);
hdcp             1992 drivers/gpu/drm/i915/display/intel_hdcp.c 	schedule_delayed_work(&hdcp->check_work, 0);
hdcp             1629 drivers/gpu/drm/i915/display/intel_hdmi.c 	struct intel_hdcp *hdcp = &hdmi->attached_connector->hdcp;
hdcp             1634 drivers/gpu/drm/i915/display/intel_hdmi.c 					    hdcp->is_paired);
hdcp             2519 drivers/gpu/drm/i915/i915_debugfs.c 	if (intel_connector->hdcp.shim) {
hdcp             2546 drivers/gpu/drm/i915/i915_debugfs.c 	if (intel_connector->hdcp.shim) {
hdcp             4477 drivers/gpu/drm/i915/i915_debugfs.c 	if (!intel_connector->hdcp.shim)
hdcp             2038 drivers/pinctrl/tegra/pinctrl-tegra30.c 	FUNCTION(hdcp),