hd_regs            81 drivers/gpu/drm/vc4/vc4_hdmi.c 	void __iomem *hd_regs;
hd_regs            99 drivers/gpu/drm/vc4/vc4_hdmi.c #define HD_READ(offset) readl(vc4->hdmi->hd_regs + offset)
hd_regs           100 drivers/gpu/drm/vc4/vc4_hdmi.c #define HD_WRITE(offset, val) writel(val, vc4->hdmi->hd_regs + offset)
hd_regs           171 drivers/gpu/drm/vc4/vc4_hdmi.c static const struct debugfs_reg32 hd_regs[] = {
hd_regs          1328 drivers/gpu/drm/vc4/vc4_hdmi.c 	hdmi->hd_regs = vc4_ioremap_regs(pdev, 1);
hd_regs          1329 drivers/gpu/drm/vc4/vc4_hdmi.c 	if (IS_ERR(hdmi->hd_regs))
hd_regs          1330 drivers/gpu/drm/vc4/vc4_hdmi.c 		return PTR_ERR(hdmi->hd_regs);
hd_regs          1335 drivers/gpu/drm/vc4/vc4_hdmi.c 	hdmi->hd_regset.base = hdmi->hd_regs;
hd_regs          1336 drivers/gpu/drm/vc4/vc4_hdmi.c 	hdmi->hd_regset.regs = hd_regs;
hd_regs          1337 drivers/gpu/drm/vc4/vc4_hdmi.c 	hdmi->hd_regset.nregs = ARRAY_SIZE(hd_regs);