hctl3            1091 drivers/gpu/drm/i915/display/intel_tv.c 	u32 tv_ctl, hctl1, hctl3, vctl1, vctl2, tmp;
hctl3            1101 drivers/gpu/drm/i915/display/intel_tv.c 	hctl3 = I915_READ(TV_H_CTL_3);
hctl3            1108 drivers/gpu/drm/i915/display/intel_tv.c 	tv_mode.hblank_start = (hctl3 & TV_HBLANK_START_MASK) >> TV_HBLANK_START_SHIFT;
hctl3            1109 drivers/gpu/drm/i915/display/intel_tv.c 	tv_mode.hblank_end = (hctl3 & TV_HSYNC_END_MASK) >> TV_HBLANK_END_SHIFT;
hctl3            1342 drivers/gpu/drm/i915/display/intel_tv.c 	u32 hctl1, hctl2, hctl3;
hctl3            1354 drivers/gpu/drm/i915/display/intel_tv.c 	hctl3 = (tv_mode->hblank_start << TV_HBLANK_START_SHIFT) |
hctl3            1386 drivers/gpu/drm/i915/display/intel_tv.c 	I915_WRITE(TV_H_CTL_3, hctl3);