hcr               107 arch/arm/include/asm/kvm_emulate.h 	vcpu->arch.hcr = HCR_GUEST_MASK;
hcr               112 arch/arm/include/asm/kvm_emulate.h 	return (unsigned long *)&vcpu->arch.hcr;
hcr               117 arch/arm/include/asm/kvm_emulate.h 	vcpu->arch.hcr &= ~HCR_TWE;
hcr               122 arch/arm/include/asm/kvm_emulate.h 	vcpu->arch.hcr |= HCR_TWE;
hcr               172 arch/arm/include/asm/kvm_host.h 	u32 hcr;
hcr                36 arch/arm/kvm/hyp/switch.c 	write_sysreg(vcpu->arch.hcr, HCR);
hcr                56 arch/arm/kvm/hyp/switch.c 	if (vcpu->arch.hcr & HCR_VA)
hcr                57 arch/arm/kvm/hyp/switch.c 		vcpu->arch.hcr = read_sysreg(HCR);
hcr                34 arch/arm64/include/asm/hardirq.h 	u64 hcr;
hcr                43 arch/arm64/include/asm/hardirq.h 			nmi_ctx->hcr = read_sysreg(hcr_el2);			\
hcr                44 arch/arm64/include/asm/hardirq.h 			if (!(nmi_ctx->hcr & HCR_TGE)) {			\
hcr                45 arch/arm64/include/asm/hardirq.h 				write_sysreg(nmi_ctx->hcr | HCR_TGE, hcr_el2);	\
hcr                55 arch/arm64/include/asm/hardirq.h 			if (!(nmi_ctx->hcr & HCR_TGE))				\
hcr                56 arch/arm64/include/asm/hardirq.h 				write_sysreg(nmi_ctx->hcr, hcr_el2);		\
hcr               133 arch/arm64/kvm/hyp/switch.c 	u64 hcr = vcpu->arch.hcr_el2;
hcr               136 arch/arm64/kvm/hyp/switch.c 		hcr |= HCR_TVM;
hcr               138 arch/arm64/kvm/hyp/switch.c 	write_sysreg(hcr, hcr_el2);
hcr               140 arch/arm64/kvm/hyp/switch.c 	if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN) && (hcr & HCR_VSE))
hcr               457 drivers/atm/fore200e.c     if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) {
hcr               469 drivers/atm/fore200e.c     writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr);
hcr               476 drivers/atm/fore200e.c     writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr);
hcr               478 drivers/atm/fore200e.c     writel(0, fore200e->regs.pca.hcr);
hcr               496 drivers/atm/fore200e.c     fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET;
hcr               646 drivers/atm/fore200e.c 	u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
hcr               647 drivers/atm/fore200e.c 	fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr);
hcr               652 drivers/atm/fore200e.c 	return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ;
hcr               657 drivers/atm/fore200e.c 	u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
hcr               658 drivers/atm/fore200e.c 	fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr);
hcr               663 drivers/atm/fore200e.c 	fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr);
hcr               665 drivers/atm/fore200e.c 	fore200e->bus->write(0, fore200e->regs.sba.hcr);
hcr               674 drivers/atm/fore200e.c 	fore200e->regs.sba.hcr = of_ioremap(&op->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR");
hcr               702 drivers/atm/fore200e.c 	of_iounmap(&op->resource[0], fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH);
hcr               773 drivers/atm/fore200e.h     volatile u32 __iomem * hcr;    /* address of host control register        */
hcr               782 drivers/atm/fore200e.h     u32 __iomem *hcr;    /* address of host control register              */
hcr              1676 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 	u32 __iomem *hcr = (u32 __iomem *)(hr_dev->reg_base + ROCEE_MB1_REG);
hcr              1702 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 	writeq(in_param, hcr + 0);
hcr              1703 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 	writeq(out_param, hcr + 2);
hcr              1704 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 	writel(in_modifier, hcr + 4);
hcr              1708 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 	writel(val, hcr + 5);
hcr              1716 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 	u8 __iomem *hcr = hr_dev->reg_base + ROCEE_MB1_REG;
hcr              1730 drivers/infiniband/hw/hns/hns_roce_hw_v1.c 			      __raw_readl(hcr + HCR_STATUS_OFFSET));
hcr               194 drivers/infiniband/hw/mthca/mthca_cmd.c 	return readl(dev->hcr + HCR_STATUS_OFFSET) &
hcr               257 drivers/infiniband/hw/mthca/mthca_cmd.c 	__raw_writel((__force u32) cpu_to_be32(in_param >> 32),           dev->hcr + 0 * 4);
hcr               258 drivers/infiniband/hw/mthca/mthca_cmd.c 	__raw_writel((__force u32) cpu_to_be32(in_param & 0xfffffffful),  dev->hcr + 1 * 4);
hcr               259 drivers/infiniband/hw/mthca/mthca_cmd.c 	__raw_writel((__force u32) cpu_to_be32(in_modifier),              dev->hcr + 2 * 4);
hcr               260 drivers/infiniband/hw/mthca/mthca_cmd.c 	__raw_writel((__force u32) cpu_to_be32(out_param >> 32),          dev->hcr + 3 * 4);
hcr               261 drivers/infiniband/hw/mthca/mthca_cmd.c 	__raw_writel((__force u32) cpu_to_be32(out_param & 0xfffffffful), dev->hcr + 4 * 4);
hcr               262 drivers/infiniband/hw/mthca/mthca_cmd.c 	__raw_writel((__force u32) cpu_to_be32(token << 16),              dev->hcr + 5 * 4);
hcr               270 drivers/infiniband/hw/mthca/mthca_cmd.c 					       op),                       dev->hcr + 6 * 4);
hcr               367 drivers/infiniband/hw/mthca/mthca_cmd.c 					  __raw_readl(dev->hcr + HCR_OUT_PARAM_OFFSET)) << 32 |
hcr               369 drivers/infiniband/hw/mthca/mthca_cmd.c 					  __raw_readl(dev->hcr + HCR_OUT_PARAM_OFFSET + 4));
hcr               375 drivers/infiniband/hw/mthca/mthca_cmd.c 	status = be32_to_cpu((__force __be32) __raw_readl(dev->hcr + HCR_STATUS_OFFSET)) >> 24;
hcr               528 drivers/infiniband/hw/mthca/mthca_cmd.c 	dev->hcr = ioremap(pci_resource_start(dev->pdev, 0) + MTHCA_HCR_BASE,
hcr               530 drivers/infiniband/hw/mthca/mthca_cmd.c 	if (!dev->hcr) {
hcr               539 drivers/infiniband/hw/mthca/mthca_cmd.c 		iounmap(dev->hcr);
hcr               549 drivers/infiniband/hw/mthca/mthca_cmd.c 	iounmap(dev->hcr);
hcr               323 drivers/infiniband/hw/mthca/mthca_dev.h 	void __iomem    *hcr;
hcr               425 drivers/net/ethernet/mellanox/mlx4/cmd.c 	status = readl(mlx4_priv(dev)->cmd.hcr + HCR_STATUS_OFFSET);
hcr               437 drivers/net/ethernet/mellanox/mlx4/cmd.c 	u32 __iomem *hcr = cmd->hcr;
hcr               482 drivers/net/ethernet/mellanox/mlx4/cmd.c 	__raw_writel((__force u32) cpu_to_be32(in_param >> 32),		  hcr + 0);
hcr               483 drivers/net/ethernet/mellanox/mlx4/cmd.c 	__raw_writel((__force u32) cpu_to_be32(in_param & 0xfffffffful),  hcr + 1);
hcr               484 drivers/net/ethernet/mellanox/mlx4/cmd.c 	__raw_writel((__force u32) cpu_to_be32(in_modifier),		  hcr + 2);
hcr               485 drivers/net/ethernet/mellanox/mlx4/cmd.c 	__raw_writel((__force u32) cpu_to_be32(out_param >> 32),	  hcr + 3);
hcr               486 drivers/net/ethernet/mellanox/mlx4/cmd.c 	__raw_writel((__force u32) cpu_to_be32(out_param & 0xfffffffful), hcr + 4);
hcr               487 drivers/net/ethernet/mellanox/mlx4/cmd.c 	__raw_writel((__force u32) cpu_to_be32(token << 16),		  hcr + 5);
hcr               496 drivers/net/ethernet/mellanox/mlx4/cmd.c 					       op), hcr + 6);
hcr               581 drivers/net/ethernet/mellanox/mlx4/cmd.c 	void __iomem *hcr = priv->cmd.hcr;
hcr               638 drivers/net/ethernet/mellanox/mlx4/cmd.c 					  __raw_readl(hcr + HCR_OUT_PARAM_OFFSET)) << 32 |
hcr               640 drivers/net/ethernet/mellanox/mlx4/cmd.c 					  __raw_readl(hcr + HCR_OUT_PARAM_OFFSET + 4));
hcr               642 drivers/net/ethernet/mellanox/mlx4/cmd.c 			   __raw_readl(hcr + HCR_STATUS_OFFSET)) >> 24;
hcr              2510 drivers/net/ethernet/mellanox/mlx4/cmd.c 	if (!mlx4_is_slave(dev) && !priv->cmd.hcr) {
hcr              2511 drivers/net/ethernet/mellanox/mlx4/cmd.c 		priv->cmd.hcr = ioremap(pci_resource_start(dev->persist->pdev,
hcr              2513 drivers/net/ethernet/mellanox/mlx4/cmd.c 		if (!priv->cmd.hcr) {
hcr              2604 drivers/net/ethernet/mellanox/mlx4/cmd.c 	if (!mlx4_is_slave(dev) && priv->cmd.hcr &&
hcr              2606 drivers/net/ethernet/mellanox/mlx4/cmd.c 		iounmap(priv->cmd.hcr);
hcr              2607 drivers/net/ethernet/mellanox/mlx4/cmd.c 		priv->cmd.hcr = NULL;
hcr               629 drivers/net/ethernet/mellanox/mlx4/mlx4.h 	void __iomem	       *hcr;
hcr               245 drivers/net/wireless/intersil/hostap/hostap_cs.c static void sandisk_write_hcr(local_info_t *local, int hcr)
hcr               253 drivers/net/wireless/intersil/hostap/hostap_cs.c 		HFA384X_OUTB(hcr, SANDISK_HCR_OFF);
hcr               369 drivers/net/wireless/intersil/hostap/hostap_cs.c static void prism2_pccard_genesis_reset(local_info_t *local, int hcr)
hcr               379 drivers/net/wireless/intersil/hostap/hostap_cs.c 		sandisk_write_hcr(local, hcr);
hcr               400 drivers/net/wireless/intersil/hostap/hostap_cs.c 	res = pcmcia_write_config_byte(hw_priv->link, CISREG_CCSR, hcr);
hcr               388 drivers/net/wireless/intersil/hostap/hostap_download.c static int prism2_enable_genesis(local_info_t *local, int hcr)
hcr               395 drivers/net/wireless/intersil/hostap/hostap_download.c 	       dev->name, hcr);
hcr               398 drivers/net/wireless/intersil/hostap/hostap_download.c 	local->func->genesis_reset(local, hcr);
hcr               407 drivers/net/wireless/intersil/hostap/hostap_download.c 		       hcr);
hcr               411 drivers/net/wireless/intersil/hostap/hostap_download.c 		       hcr, initseq, readbuf);
hcr               268 drivers/net/wireless/intersil/hostap/hostap_pci.c static void prism2_pci_genesis_reset(local_info_t *local, int hcr)
hcr               274 drivers/net/wireless/intersil/hostap/hostap_pci.c 	HFA384X_OUTW(hcr, HFA384X_PCIHCR_OFF);
hcr               297 drivers/net/wireless/intersil/hostap/hostap_plx.c static void prism2_plx_genesis_reset(local_info_t *local, int hcr)
hcr               307 drivers/net/wireless/intersil/hostap/hostap_plx.c 		outb(hcr, hw_priv->cor_offset + 2);
hcr               317 drivers/net/wireless/intersil/hostap/hostap_plx.c 		writeb(hcr, hw_priv->attr_mem + hw_priv->cor_offset + 2);
hcr               577 drivers/net/wireless/intersil/hostap/hostap_wlan.h 	void (*genesis_reset)(local_info_t *local, int hcr);
hcr                67 drivers/usb/serial/ark3116.c 	__u32			hcr;	/* handshake control register (0x8)
hcr               145 drivers/usb/serial/ark3116.c 	priv->hcr = 0;
hcr               202 drivers/usb/serial/ark3116.c 	__u8 lcr, hcr, eval;
hcr               231 drivers/usb/serial/ark3116.c 	hcr = (cflag & CRTSCTS) ? 0x03 : 0x00;
hcr               262 drivers/usb/serial/ark3116.c 		__func__, hcr, lcr, quot);
hcr               265 drivers/usb/serial/ark3116.c 	if (priv->hcr != hcr) {
hcr               266 drivers/usb/serial/ark3116.c 		priv->hcr = hcr;
hcr               267 drivers/usb/serial/ark3116.c 		ark3116_write_reg(serial, 0x8, hcr);
hcr               871 virt/kvm/arm/arm.c 	unsigned long *hcr;
hcr               878 virt/kvm/arm/arm.c 	hcr = vcpu_hcr(vcpu);
hcr               880 virt/kvm/arm/arm.c 		set = test_and_set_bit(bit_index, hcr);
hcr               882 virt/kvm/arm/arm.c 		set = test_and_clear_bit(bit_index, hcr);
hcr               694 virt/kvm/arm/hyp/vgic-v3-sr.c 	u32 hcr;
hcr               696 virt/kvm/arm/hyp/vgic-v3-sr.c 	hcr = read_gicreg(ICH_HCR_EL2);
hcr               697 virt/kvm/arm/hyp/vgic-v3-sr.c 	hcr += 1 << ICH_HCR_EOIcount_SHIFT;
hcr               698 virt/kvm/arm/hyp/vgic-v3-sr.c 	write_gicreg(hcr, ICH_HCR_EL2);
hcr              2431 virt/kvm/arm/mmu.c 	unsigned long hcr = *vcpu_hcr(vcpu);
hcr              2442 virt/kvm/arm/mmu.c 	if (!(hcr & HCR_TVM)) {
hcr              2446 virt/kvm/arm/mmu.c 		*vcpu_hcr(vcpu) = hcr | HCR_TVM;