hbase              95 arch/alpha/kernel/core_t2.c 	unsigned long hbase;
hbase             402 arch/alpha/kernel/core_t2.c 	t2_saved_config.hbase = *(vulp)T2_HBASE;
hbase             500 arch/alpha/kernel/core_t2.c 	*(vulp)T2_HBASE = t2_saved_config.hbase;
hbase             296 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint32_t hbase:32;
hbase             298 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint32_t hbase:32;
hbase             326 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint32_t hbase:32;
hbase             328 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint32_t hbase:32;
hbase             354 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint32_t hbase:25;
hbase             358 arch/mips/include/asm/octeon/cvmx-pci-defs.h 		uint32_t hbase:25;
hbase             913 arch/powerpc/platforms/cell/iommu.c 	unsigned long dbase, dsize, fbase, fsize, hbase, hend;
hbase             950 arch/powerpc/platforms/cell/iommu.c 		hbase = 0; /* use the device tree window */
hbase             962 arch/powerpc/platforms/cell/iommu.c 		hbase = __pa(htab_address);
hbase             963 arch/powerpc/platforms/cell/iommu.c 		hend  = hbase + htab_size_bytes;
hbase             966 arch/powerpc/platforms/cell/iommu.c 		if ((hbase != _ALIGN_UP(hbase, 1 << IO_SEGMENT_SHIFT)) ||
hbase             976 arch/powerpc/platforms/cell/iommu.c 			if (hbase < dbase || (hend > (dbase + dsize))) {
hbase             991 arch/powerpc/platforms/cell/iommu.c 		if (hbase == 0)
hbase             994 arch/powerpc/platforms/cell/iommu.c 			dbase = hbase;