hart 18 arch/riscv/kernel/cpu.c u32 hart; hart 25 arch/riscv/kernel/cpu.c if (of_property_read_u32(node, "reg", &hart)) { hart 31 arch/riscv/kernel/cpu.c pr_info("CPU with hartid=%d is not available\n", hart); hart 36 arch/riscv/kernel/cpu.c pr_warn("CPU with hartid=%d has no \"riscv,isa\" property\n", hart); hart 40 arch/riscv/kernel/cpu.c pr_warn("CPU with hartid=%d has an invalid ISA of \"%s\"\n", hart, isa); hart 44 arch/riscv/kernel/cpu.c return hart; hart 63 arch/riscv/kernel/smpboot.c int hart; hart 68 arch/riscv/kernel/smpboot.c hart = riscv_of_processor_hartid(dn); hart 69 arch/riscv/kernel/smpboot.c if (hart < 0) hart 72 arch/riscv/kernel/smpboot.c if (hart == cpuid_to_hartid_map(0)) { hart 79 arch/riscv/kernel/smpboot.c cpuid, hart); hart 83 arch/riscv/kernel/smpboot.c cpuid_to_hartid_map(cpuid) = hart;