halg              342 arch/arm/crypto/ghash-ce-glue.c 	.halg.digestsize	= GHASH_DIGEST_SIZE,
halg              343 arch/arm/crypto/ghash-ce-glue.c 	.halg.statesize		= sizeof(struct ghash_desc_ctx),
halg              344 arch/arm/crypto/ghash-ce-glue.c 	.halg.base		= {
halg              305 arch/x86/crypto/ghash-clmulni-intel_glue.c 	.halg = {
halg               37 crypto/ahash.c 			    halg);
halg              574 crypto/ahash.c 	struct crypto_alg *base = &alg->halg.base;
halg              576 crypto/ahash.c 	if (alg->halg.digestsize > HASH_MAX_DIGESTSIZE ||
halg              577 crypto/ahash.c 	    alg->halg.statesize > HASH_MAX_STATESIZE ||
halg              578 crypto/ahash.c 	    alg->halg.statesize == 0)
halg              590 crypto/ahash.c 	struct crypto_alg *base = &alg->halg.base;
halg              603 crypto/ahash.c 	return crypto_unregister_alg(&alg->halg.base);
halg              674 crypto/ahash.c bool crypto_hash_alg_has_setkey(struct hash_alg_common *halg)
halg              676 crypto/ahash.c 	struct crypto_alg *alg = &halg->base;
halg              701 crypto/cryptd.c 	inst->alg.halg.base.cra_flags = CRYPTO_ALG_ASYNC |
halg              705 crypto/cryptd.c 	inst->alg.halg.digestsize = salg->digestsize;
halg              706 crypto/cryptd.c 	inst->alg.halg.statesize = salg->statesize;
halg              707 crypto/cryptd.c 	inst->alg.halg.base.cra_ctxsize = sizeof(struct cryptd_hash_ctx);
halg              709 crypto/cryptd.c 	inst->alg.halg.base.cra_init = cryptd_hash_init_tfm;
halg              710 crypto/cryptd.c 	inst->alg.halg.base.cra_exit = cryptd_hash_exit_tfm;
halg             1260 drivers/crypto/atmel-sha.c 	.halg = {
halg             1284 drivers/crypto/atmel-sha.c 	.halg = {
halg             1310 drivers/crypto/atmel-sha.c 	.halg = {
halg             1336 drivers/crypto/atmel-sha.c 	.halg = {
halg             1360 drivers/crypto/atmel-sha.c 	.halg = {
halg             2091 drivers/crypto/atmel-sha.c 	.halg = {
halg             2116 drivers/crypto/atmel-sha.c 	.halg = {
halg             2141 drivers/crypto/atmel-sha.c 	.halg = {
halg             2166 drivers/crypto/atmel-sha.c 	.halg = {
halg             2191 drivers/crypto/atmel-sha.c 	.halg = {
halg             2637 drivers/crypto/axis/artpec6_crypto.c 		.halg.digestsize = SHA1_DIGEST_SIZE,
halg             2638 drivers/crypto/axis/artpec6_crypto.c 		.halg.statesize = sizeof(struct artpec6_hash_export_state),
halg             2639 drivers/crypto/axis/artpec6_crypto.c 		.halg.base = {
halg             2660 drivers/crypto/axis/artpec6_crypto.c 		.halg.digestsize = SHA256_DIGEST_SIZE,
halg             2661 drivers/crypto/axis/artpec6_crypto.c 		.halg.statesize = sizeof(struct artpec6_hash_export_state),
halg             2662 drivers/crypto/axis/artpec6_crypto.c 		.halg.base = {
halg             2684 drivers/crypto/axis/artpec6_crypto.c 		.halg.digestsize = SHA256_DIGEST_SIZE,
halg             2685 drivers/crypto/axis/artpec6_crypto.c 		.halg.statesize = sizeof(struct artpec6_hash_export_state),
halg             2686 drivers/crypto/axis/artpec6_crypto.c 		.halg.base = {
halg             3846 drivers/crypto/bcm/cipher.c 		      .halg.digestsize = MD5_DIGEST_SIZE,
halg             3847 drivers/crypto/bcm/cipher.c 		      .halg.base = {
halg             3866 drivers/crypto/bcm/cipher.c 		      .halg.digestsize = MD5_DIGEST_SIZE,
halg             3867 drivers/crypto/bcm/cipher.c 		      .halg.base = {
halg             3884 drivers/crypto/bcm/cipher.c 		      .halg.digestsize = SHA1_DIGEST_SIZE,
halg             3885 drivers/crypto/bcm/cipher.c 		      .halg.base = {
halg             3902 drivers/crypto/bcm/cipher.c 		      .halg.digestsize = SHA1_DIGEST_SIZE,
halg             3903 drivers/crypto/bcm/cipher.c 		      .halg.base = {
halg             3920 drivers/crypto/bcm/cipher.c 			.halg.digestsize = SHA224_DIGEST_SIZE,
halg             3921 drivers/crypto/bcm/cipher.c 			.halg.base = {
halg             3938 drivers/crypto/bcm/cipher.c 		      .halg.digestsize = SHA224_DIGEST_SIZE,
halg             3939 drivers/crypto/bcm/cipher.c 		      .halg.base = {
halg             3956 drivers/crypto/bcm/cipher.c 		      .halg.digestsize = SHA256_DIGEST_SIZE,
halg             3957 drivers/crypto/bcm/cipher.c 		      .halg.base = {
halg             3974 drivers/crypto/bcm/cipher.c 		      .halg.digestsize = SHA256_DIGEST_SIZE,
halg             3975 drivers/crypto/bcm/cipher.c 		      .halg.base = {
halg             3993 drivers/crypto/bcm/cipher.c 		      .halg.digestsize = SHA384_DIGEST_SIZE,
halg             3994 drivers/crypto/bcm/cipher.c 		      .halg.base = {
halg             4012 drivers/crypto/bcm/cipher.c 		      .halg.digestsize = SHA384_DIGEST_SIZE,
halg             4013 drivers/crypto/bcm/cipher.c 		      .halg.base = {
halg             4031 drivers/crypto/bcm/cipher.c 		      .halg.digestsize = SHA512_DIGEST_SIZE,
halg             4032 drivers/crypto/bcm/cipher.c 		      .halg.base = {
halg             4050 drivers/crypto/bcm/cipher.c 		      .halg.digestsize = SHA512_DIGEST_SIZE,
halg             4051 drivers/crypto/bcm/cipher.c 		      .halg.base = {
halg             4069 drivers/crypto/bcm/cipher.c 		      .halg.digestsize = SHA3_224_DIGEST_SIZE,
halg             4070 drivers/crypto/bcm/cipher.c 		      .halg.base = {
halg             4088 drivers/crypto/bcm/cipher.c 		      .halg.digestsize = SHA3_224_DIGEST_SIZE,
halg             4089 drivers/crypto/bcm/cipher.c 		      .halg.base = {
halg             4107 drivers/crypto/bcm/cipher.c 		      .halg.digestsize = SHA3_256_DIGEST_SIZE,
halg             4108 drivers/crypto/bcm/cipher.c 		      .halg.base = {
halg             4126 drivers/crypto/bcm/cipher.c 		      .halg.digestsize = SHA3_256_DIGEST_SIZE,
halg             4127 drivers/crypto/bcm/cipher.c 		      .halg.base = {
halg             4145 drivers/crypto/bcm/cipher.c 		      .halg.digestsize = SHA3_384_DIGEST_SIZE,
halg             4146 drivers/crypto/bcm/cipher.c 		      .halg.base = {
halg             4164 drivers/crypto/bcm/cipher.c 		      .halg.digestsize = SHA3_384_DIGEST_SIZE,
halg             4165 drivers/crypto/bcm/cipher.c 		      .halg.base = {
halg             4183 drivers/crypto/bcm/cipher.c 		      .halg.digestsize = SHA3_512_DIGEST_SIZE,
halg             4184 drivers/crypto/bcm/cipher.c 		      .halg.base = {
halg             4202 drivers/crypto/bcm/cipher.c 		      .halg.digestsize = SHA3_512_DIGEST_SIZE,
halg             4203 drivers/crypto/bcm/cipher.c 		      .halg.base = {
halg             4221 drivers/crypto/bcm/cipher.c 		      .halg.digestsize = AES_BLOCK_SIZE,
halg             4222 drivers/crypto/bcm/cipher.c 		      .halg.base = {
halg             4240 drivers/crypto/bcm/cipher.c 		      .halg.digestsize = AES_BLOCK_SIZE,
halg             4241 drivers/crypto/bcm/cipher.c 		      .halg.base = {
halg             4578 drivers/crypto/bcm/cipher.c 	hash->halg.base.cra_module = THIS_MODULE;
halg             4579 drivers/crypto/bcm/cipher.c 	hash->halg.base.cra_priority = hash_pri;
halg             4580 drivers/crypto/bcm/cipher.c 	hash->halg.base.cra_alignmask = 0;
halg             4581 drivers/crypto/bcm/cipher.c 	hash->halg.base.cra_ctxsize = sizeof(struct iproc_ctx_s);
halg             4582 drivers/crypto/bcm/cipher.c 	hash->halg.base.cra_init = ahash_cra_init;
halg             4583 drivers/crypto/bcm/cipher.c 	hash->halg.base.cra_exit = generic_cra_exit;
halg             4584 drivers/crypto/bcm/cipher.c 	hash->halg.base.cra_flags = CRYPTO_ALG_ASYNC;
halg             4585 drivers/crypto/bcm/cipher.c 	hash->halg.statesize = sizeof(struct spu_hash_export_s);
halg             4614 drivers/crypto/bcm/cipher.c 		 hash->halg.base.cra_driver_name);
halg             4848 drivers/crypto/bcm/cipher.c 			cdn = driver_algs[i].alg.hash.halg.base.cra_driver_name;
halg             4388 drivers/crypto/caam/caamalg_qi2.c 			.halg = {
halg             4409 drivers/crypto/caam/caamalg_qi2.c 			.halg = {
halg             4430 drivers/crypto/caam/caamalg_qi2.c 			.halg = {
halg             4451 drivers/crypto/caam/caamalg_qi2.c 			.halg = {
halg             4472 drivers/crypto/caam/caamalg_qi2.c 			.halg = {
halg             4493 drivers/crypto/caam/caamalg_qi2.c 			.halg = {
halg             4513 drivers/crypto/caam/caamalg_qi2.c 	struct hash_alg_common *halg =
halg             4516 drivers/crypto/caam/caamalg_qi2.c 		 container_of(halg, struct ahash_alg, halg);
halg             4588 drivers/crypto/caam/caamalg_qi2.c 	struct ahash_alg *halg;
halg             4596 drivers/crypto/caam/caamalg_qi2.c 	halg = &t_alg->ahash_alg;
halg             4597 drivers/crypto/caam/caamalg_qi2.c 	alg = &halg->halg.base;
halg             5299 drivers/crypto/caam/caamalg_qi2.c 				 t_alg->ahash_alg.halg.base.cra_driver_name,
halg             5318 drivers/crypto/caam/caamalg_qi2.c 				 t_alg->ahash_alg.halg.base.cra_driver_name,
halg             1648 drivers/crypto/caam/caamhash.c 			.halg = {
halg             1669 drivers/crypto/caam/caamhash.c 			.halg = {
halg             1690 drivers/crypto/caam/caamhash.c 			.halg = {
halg             1711 drivers/crypto/caam/caamhash.c 			.halg = {
halg             1732 drivers/crypto/caam/caamhash.c 			.halg = {
halg             1753 drivers/crypto/caam/caamhash.c 			.halg = {
halg             1772 drivers/crypto/caam/caamhash.c 			.halg = {
halg             1791 drivers/crypto/caam/caamhash.c 			.halg = {
halg             1810 drivers/crypto/caam/caamhash.c 	struct hash_alg_common *halg =
halg             1813 drivers/crypto/caam/caamhash.c 		 container_of(halg, struct ahash_alg, halg);
halg             1943 drivers/crypto/caam/caamhash.c 	struct ahash_alg *halg;
halg             1953 drivers/crypto/caam/caamhash.c 	halg = &t_alg->ahash_alg;
halg             1954 drivers/crypto/caam/caamhash.c 	alg = &halg->halg.base;
halg             2025 drivers/crypto/caam/caamhash.c 		    alg->template_ahash.halg.digestsize > md_limit)
halg             2040 drivers/crypto/caam/caamhash.c 				t_alg->ahash_alg.halg.base.cra_driver_name,
halg             2060 drivers/crypto/caam/caamhash.c 				t_alg->ahash_alg.halg.base.cra_driver_name,
halg              353 drivers/crypto/ccp/ccp-crypto-aes-cmac.c 	struct hash_alg_common *halg;
halg              374 drivers/crypto/ccp/ccp-crypto-aes-cmac.c 	halg = &alg->halg;
halg              375 drivers/crypto/ccp/ccp-crypto-aes-cmac.c 	halg->digestsize = AES_BLOCK_SIZE;
halg              376 drivers/crypto/ccp/ccp-crypto-aes-cmac.c 	halg->statesize = sizeof(struct ccp_aes_cmac_exp_ctx);
halg              378 drivers/crypto/ccp/ccp-crypto-aes-cmac.c 	base = &halg->base;
halg              422 drivers/crypto/ccp/ccp-crypto-sha.c 	struct hash_alg_common *halg;
halg              439 drivers/crypto/ccp/ccp-crypto-sha.c 	halg = &alg->halg;
halg              441 drivers/crypto/ccp/ccp-crypto-sha.c 	base = &halg->base;
halg              466 drivers/crypto/ccp/ccp-crypto-sha.c 	struct hash_alg_common *halg;
halg              487 drivers/crypto/ccp/ccp-crypto-sha.c 	halg = &alg->halg;
halg              488 drivers/crypto/ccp/ccp-crypto-sha.c 	halg->digestsize = def->digest_size;
halg              489 drivers/crypto/ccp/ccp-crypto-sha.c 	halg->statesize = sizeof(struct ccp_sha_exp_ctx);
halg              491 drivers/crypto/ccp/ccp-crypto-sha.c 	base = &halg->base;
halg               83 drivers/crypto/ccp/ccp-crypto.h 	ahash_alg = container_of(alg, struct ahash_alg, halg.base);
halg             1125 drivers/crypto/ccree/cc_hash.c 		container_of(hash_alg_common, struct ahash_alg, halg);
halg             1599 drivers/crypto/ccree/cc_hash.c 			.halg = {
halg             1626 drivers/crypto/ccree/cc_hash.c 			.halg = {
halg             1653 drivers/crypto/ccree/cc_hash.c 			.halg = {
halg             1680 drivers/crypto/ccree/cc_hash.c 			.halg = {
halg             1707 drivers/crypto/ccree/cc_hash.c 			.halg = {
halg             1734 drivers/crypto/ccree/cc_hash.c 			.halg = {
halg             1759 drivers/crypto/ccree/cc_hash.c 			.halg = {
halg             1784 drivers/crypto/ccree/cc_hash.c 			.halg = {
halg             1809 drivers/crypto/ccree/cc_hash.c 			.halg = {
halg             1827 drivers/crypto/ccree/cc_hash.c 	struct ahash_alg *halg;
halg             1834 drivers/crypto/ccree/cc_hash.c 	halg = &t_crypto_alg->ahash_alg;
halg             1835 drivers/crypto/ccree/cc_hash.c 	alg = &halg->halg.base;
halg             1843 drivers/crypto/ccree/cc_hash.c 		halg->setkey = NULL;
halg             3788 drivers/crypto/chelsio/chcr_algo.c 			.halg.digestsize = SHA1_DIGEST_SIZE,
halg             3789 drivers/crypto/chelsio/chcr_algo.c 			.halg.base = {
halg             3800 drivers/crypto/chelsio/chcr_algo.c 			.halg.digestsize = SHA256_DIGEST_SIZE,
halg             3801 drivers/crypto/chelsio/chcr_algo.c 			.halg.base = {
halg             3812 drivers/crypto/chelsio/chcr_algo.c 			.halg.digestsize = SHA224_DIGEST_SIZE,
halg             3813 drivers/crypto/chelsio/chcr_algo.c 			.halg.base = {
halg             3824 drivers/crypto/chelsio/chcr_algo.c 			.halg.digestsize = SHA384_DIGEST_SIZE,
halg             3825 drivers/crypto/chelsio/chcr_algo.c 			.halg.base = {
halg             3836 drivers/crypto/chelsio/chcr_algo.c 			.halg.digestsize = SHA512_DIGEST_SIZE,
halg             3837 drivers/crypto/chelsio/chcr_algo.c 			.halg.base = {
halg             3849 drivers/crypto/chelsio/chcr_algo.c 			.halg.digestsize = SHA1_DIGEST_SIZE,
halg             3850 drivers/crypto/chelsio/chcr_algo.c 			.halg.base = {
halg             3861 drivers/crypto/chelsio/chcr_algo.c 			.halg.digestsize = SHA224_DIGEST_SIZE,
halg             3862 drivers/crypto/chelsio/chcr_algo.c 			.halg.base = {
halg             3873 drivers/crypto/chelsio/chcr_algo.c 			.halg.digestsize = SHA256_DIGEST_SIZE,
halg             3874 drivers/crypto/chelsio/chcr_algo.c 			.halg.base = {
halg             3885 drivers/crypto/chelsio/chcr_algo.c 			.halg.digestsize = SHA384_DIGEST_SIZE,
halg             3886 drivers/crypto/chelsio/chcr_algo.c 			.halg.base = {
halg             3897 drivers/crypto/chelsio/chcr_algo.c 			.halg.digestsize = SHA512_DIGEST_SIZE,
halg             3898 drivers/crypto/chelsio/chcr_algo.c 			.halg.base = {
halg             4321 drivers/crypto/chelsio/chcr_algo.c 			a_hash->halg.statesize = SZ_AHASH_REQ_CTX;
halg             4322 drivers/crypto/chelsio/chcr_algo.c 			a_hash->halg.base.cra_priority = CHCR_CRA_PRIORITY;
halg             4323 drivers/crypto/chelsio/chcr_algo.c 			a_hash->halg.base.cra_module = THIS_MODULE;
halg             4324 drivers/crypto/chelsio/chcr_algo.c 			a_hash->halg.base.cra_flags = CRYPTO_ALG_ASYNC;
halg             4325 drivers/crypto/chelsio/chcr_algo.c 			a_hash->halg.base.cra_alignmask = 0;
halg             4326 drivers/crypto/chelsio/chcr_algo.c 			a_hash->halg.base.cra_exit = NULL;
halg             4329 drivers/crypto/chelsio/chcr_algo.c 				a_hash->halg.base.cra_init = chcr_hmac_cra_init;
halg             4330 drivers/crypto/chelsio/chcr_algo.c 				a_hash->halg.base.cra_exit = chcr_hmac_cra_exit;
halg             4333 drivers/crypto/chelsio/chcr_algo.c 				a_hash->halg.base.cra_ctxsize = SZ_AHASH_H_CTX;
halg             4336 drivers/crypto/chelsio/chcr_algo.c 				a_hash->halg.base.cra_ctxsize = SZ_AHASH_CTX;
halg             4337 drivers/crypto/chelsio/chcr_algo.c 				a_hash->halg.base.cra_init = chcr_sha_cra_init;
halg             4340 drivers/crypto/chelsio/chcr_algo.c 			ai = driver_algs[i].alg.hash.halg.base;
halg              763 drivers/crypto/img-hash.c 		.halg = {
halg              789 drivers/crypto/img-hash.c 		.halg = {
halg              815 drivers/crypto/img-hash.c 		.halg = {
halg              841 drivers/crypto/img-hash.c 		.halg = {
halg              857 drivers/crypto/inside-secure/safexcel_hash.c 		.halg = {
halg             1099 drivers/crypto/inside-secure/safexcel_hash.c 		.halg = {
halg             1154 drivers/crypto/inside-secure/safexcel_hash.c 		.halg = {
halg             1209 drivers/crypto/inside-secure/safexcel_hash.c 		.halg = {
halg             1279 drivers/crypto/inside-secure/safexcel_hash.c 		.halg = {
halg             1349 drivers/crypto/inside-secure/safexcel_hash.c 		.halg = {
halg             1404 drivers/crypto/inside-secure/safexcel_hash.c 		.halg = {
halg             1459 drivers/crypto/inside-secure/safexcel_hash.c 		.halg = {
halg             1529 drivers/crypto/inside-secure/safexcel_hash.c 		.halg = {
halg             1599 drivers/crypto/inside-secure/safexcel_hash.c 		.halg = {
halg             1654 drivers/crypto/inside-secure/safexcel_hash.c 		.halg = {
halg             1725 drivers/crypto/inside-secure/safexcel_hash.c 		.halg = {
halg              910 drivers/crypto/marvell/hash.c 	.halg = {
halg              980 drivers/crypto/marvell/hash.c 	.halg = {
halg             1053 drivers/crypto/marvell/hash.c 	.halg = {
halg             1287 drivers/crypto/marvell/hash.c 	.halg = {
halg             1357 drivers/crypto/marvell/hash.c 	.halg = {
halg             1427 drivers/crypto/marvell/hash.c 	.halg = {
halg              927 drivers/crypto/mediatek/mtk-sha.c 	.halg.digestsize	= SHA1_DIGEST_SIZE,
halg              928 drivers/crypto/mediatek/mtk-sha.c 	.halg.statesize = sizeof(struct mtk_sha_reqctx),
halg              929 drivers/crypto/mediatek/mtk-sha.c 	.halg.base	= {
halg              950 drivers/crypto/mediatek/mtk-sha.c 	.halg.digestsize	= SHA224_DIGEST_SIZE,
halg              951 drivers/crypto/mediatek/mtk-sha.c 	.halg.statesize = sizeof(struct mtk_sha_reqctx),
halg              952 drivers/crypto/mediatek/mtk-sha.c 	.halg.base	= {
halg              973 drivers/crypto/mediatek/mtk-sha.c 	.halg.digestsize	= SHA256_DIGEST_SIZE,
halg              974 drivers/crypto/mediatek/mtk-sha.c 	.halg.statesize = sizeof(struct mtk_sha_reqctx),
halg              975 drivers/crypto/mediatek/mtk-sha.c 	.halg.base	= {
halg              997 drivers/crypto/mediatek/mtk-sha.c 	.halg.digestsize	= SHA1_DIGEST_SIZE,
halg              998 drivers/crypto/mediatek/mtk-sha.c 	.halg.statesize = sizeof(struct mtk_sha_reqctx),
halg              999 drivers/crypto/mediatek/mtk-sha.c 	.halg.base	= {
halg             1023 drivers/crypto/mediatek/mtk-sha.c 	.halg.digestsize	= SHA224_DIGEST_SIZE,
halg             1024 drivers/crypto/mediatek/mtk-sha.c 	.halg.statesize = sizeof(struct mtk_sha_reqctx),
halg             1025 drivers/crypto/mediatek/mtk-sha.c 	.halg.base	= {
halg             1049 drivers/crypto/mediatek/mtk-sha.c 	.halg.digestsize	= SHA256_DIGEST_SIZE,
halg             1050 drivers/crypto/mediatek/mtk-sha.c 	.halg.statesize = sizeof(struct mtk_sha_reqctx),
halg             1051 drivers/crypto/mediatek/mtk-sha.c 	.halg.base	= {
halg             1077 drivers/crypto/mediatek/mtk-sha.c 	.halg.digestsize	= SHA384_DIGEST_SIZE,
halg             1078 drivers/crypto/mediatek/mtk-sha.c 	.halg.statesize = sizeof(struct mtk_sha_reqctx),
halg             1079 drivers/crypto/mediatek/mtk-sha.c 	.halg.base	= {
halg             1100 drivers/crypto/mediatek/mtk-sha.c 	.halg.digestsize	= SHA512_DIGEST_SIZE,
halg             1101 drivers/crypto/mediatek/mtk-sha.c 	.halg.statesize = sizeof(struct mtk_sha_reqctx),
halg             1102 drivers/crypto/mediatek/mtk-sha.c 	.halg.base	= {
halg             1124 drivers/crypto/mediatek/mtk-sha.c 	.halg.digestsize	= SHA384_DIGEST_SIZE,
halg             1125 drivers/crypto/mediatek/mtk-sha.c 	.halg.statesize = sizeof(struct mtk_sha_reqctx),
halg             1126 drivers/crypto/mediatek/mtk-sha.c 	.halg.base	= {
halg             1150 drivers/crypto/mediatek/mtk-sha.c 	.halg.digestsize	= SHA512_DIGEST_SIZE,
halg             1151 drivers/crypto/mediatek/mtk-sha.c 	.halg.statesize = sizeof(struct mtk_sha_reqctx),
halg             1152 drivers/crypto/mediatek/mtk-sha.c 	.halg.base	= {
halg              587 drivers/crypto/mxs-dcp.c 		struct hash_alg_common *halg = crypto_hash_alg_common(tfm);
halg              591 drivers/crypto/mxs-dcp.c 		memcpy(sdcp->coh->sha_out_buf, sha_buf, halg->digestsize);
halg              624 drivers/crypto/mxs-dcp.c 	struct hash_alg_common *halg = crypto_hash_alg_common(tfm);
halg              681 drivers/crypto/mxs-dcp.c 		for (i = 0; i < halg->digestsize; i++)
halg              682 drivers/crypto/mxs-dcp.c 			req->result[i] = out_buf[halg->digestsize - i - 1];
halg              729 drivers/crypto/mxs-dcp.c 	struct hash_alg_common *halg = crypto_hash_alg_common(tfm);
halg              737 drivers/crypto/mxs-dcp.c 	if (strcmp(halg->base.cra_name, "sha1") == 0)
halg              915 drivers/crypto/mxs-dcp.c 	.halg	= {
halg              942 drivers/crypto/mxs-dcp.c 	.halg	= {
halg             1118 drivers/crypto/mxs-dcp.c 				dcp_sha1_alg.halg.base.cra_name);
halg             1127 drivers/crypto/mxs-dcp.c 				dcp_sha256_alg.halg.base.cra_name);
halg              264 drivers/crypto/n2_core.c 	ahash_alg = container_of(alg, struct ahash_alg, halg.base);
halg              279 drivers/crypto/n2_core.c 	ahash_alg = container_of(alg, struct ahash_alg, halg.base);
halg             1420 drivers/crypto/n2_core.c 	p->child_alg = n2ahash->alg.halg.base.cra_name;
halg             1428 drivers/crypto/n2_core.c 	base = &ahash->halg.base;
halg             1451 drivers/crypto/n2_core.c 	struct hash_alg_common *halg;
halg             1475 drivers/crypto/n2_core.c 	halg = &ahash->halg;
halg             1476 drivers/crypto/n2_core.c 	halg->digestsize = tmpl->digest_size;
halg             1478 drivers/crypto/n2_core.c 	base = &halg->base;
halg             1457 drivers/crypto/omap-sham.c 	.halg.digestsize	= SHA1_DIGEST_SIZE,
halg             1458 drivers/crypto/omap-sham.c 	.halg.base	= {
halg             1479 drivers/crypto/omap-sham.c 	.halg.digestsize	= MD5_DIGEST_SIZE,
halg             1480 drivers/crypto/omap-sham.c 	.halg.base	= {
halg             1502 drivers/crypto/omap-sham.c 	.halg.digestsize	= SHA1_DIGEST_SIZE,
halg             1503 drivers/crypto/omap-sham.c 	.halg.base	= {
halg             1526 drivers/crypto/omap-sham.c 	.halg.digestsize	= MD5_DIGEST_SIZE,
halg             1527 drivers/crypto/omap-sham.c 	.halg.base	= {
halg             1553 drivers/crypto/omap-sham.c 	.halg.digestsize	= SHA224_DIGEST_SIZE,
halg             1554 drivers/crypto/omap-sham.c 	.halg.base	= {
halg             1574 drivers/crypto/omap-sham.c 	.halg.digestsize	= SHA256_DIGEST_SIZE,
halg             1575 drivers/crypto/omap-sham.c 	.halg.base	= {
halg             1596 drivers/crypto/omap-sham.c 	.halg.digestsize	= SHA224_DIGEST_SIZE,
halg             1597 drivers/crypto/omap-sham.c 	.halg.base	= {
halg             1619 drivers/crypto/omap-sham.c 	.halg.digestsize	= SHA256_DIGEST_SIZE,
halg             1620 drivers/crypto/omap-sham.c 	.halg.base	= {
halg             1644 drivers/crypto/omap-sham.c 	.halg.digestsize	= SHA384_DIGEST_SIZE,
halg             1645 drivers/crypto/omap-sham.c 	.halg.base	= {
halg             1665 drivers/crypto/omap-sham.c 	.halg.digestsize	= SHA512_DIGEST_SIZE,
halg             1666 drivers/crypto/omap-sham.c 	.halg.base	= {
halg             1687 drivers/crypto/omap-sham.c 	.halg.digestsize	= SHA384_DIGEST_SIZE,
halg             1688 drivers/crypto/omap-sham.c 	.halg.base	= {
halg             1710 drivers/crypto/omap-sham.c 	.halg.digestsize	= SHA512_DIGEST_SIZE,
halg             1711 drivers/crypto/omap-sham.c 	.halg.base	= {
halg             2172 drivers/crypto/omap-sham.c 			alg->halg.statesize = sizeof(struct omap_sham_reqctx) +
halg              492 drivers/crypto/qce/sha.c 	alg->halg.digestsize = def->digestsize;
halg              493 drivers/crypto/qce/sha.c 	alg->halg.statesize = def->statesize;
halg              495 drivers/crypto/qce/sha.c 	base = &alg->halg.base;
halg               64 drivers/crypto/qce/sha.h 					     struct ahash_alg, halg);
halg              324 drivers/crypto/rockchip/rk3288_crypto_ahash.c 		.halg = {
halg              354 drivers/crypto/rockchip/rk3288_crypto_ahash.c 		.halg = {
halg              384 drivers/crypto/rockchip/rk3288_crypto_ahash.c 		.halg = {
halg             1767 drivers/crypto/s5p-sss.c 	.halg.statesize = sizeof(struct s5p_hash_reqctx) + BUFLEN,
halg             1768 drivers/crypto/s5p-sss.c 	.halg.digestsize	= SHA1_DIGEST_SIZE,
halg             1769 drivers/crypto/s5p-sss.c 	.halg.base	= {
halg             1792 drivers/crypto/s5p-sss.c 	.halg.statesize = sizeof(struct s5p_hash_reqctx) + BUFLEN,
halg             1793 drivers/crypto/s5p-sss.c 	.halg.digestsize	= MD5_DIGEST_SIZE,
halg             1794 drivers/crypto/s5p-sss.c 	.halg.base	= {
halg             1817 drivers/crypto/s5p-sss.c 	.halg.statesize = sizeof(struct s5p_hash_reqctx) + BUFLEN,
halg             1818 drivers/crypto/s5p-sss.c 	.halg.digestsize	= SHA256_DIGEST_SIZE,
halg             1819 drivers/crypto/s5p-sss.c 	.halg.base	= {
halg             2318 drivers/crypto/s5p-sss.c 					alg->halg.base.cra_driver_name, err);
halg             1246 drivers/crypto/sahara.c 	.halg.digestsize	= SHA1_DIGEST_SIZE,
halg             1247 drivers/crypto/sahara.c 	.halg.statesize         = sizeof(struct sahara_sha_reqctx),
halg             1248 drivers/crypto/sahara.c 	.halg.base	= {
halg             1272 drivers/crypto/sahara.c 	.halg.digestsize	= SHA256_DIGEST_SIZE,
halg             1273 drivers/crypto/sahara.c 	.halg.statesize         = sizeof(struct sahara_sha_reqctx),
halg             1274 drivers/crypto/sahara.c 	.halg.base	= {
halg             1130 drivers/crypto/stm32/stm32-hash.c 		.halg = {
halg             1156 drivers/crypto/stm32/stm32-hash.c 		.halg = {
halg             1181 drivers/crypto/stm32/stm32-hash.c 		.halg = {
halg             1207 drivers/crypto/stm32/stm32-hash.c 		.halg = {
halg             1235 drivers/crypto/stm32/stm32-hash.c 		.halg = {
halg             1261 drivers/crypto/stm32/stm32-hash.c 		.halg = {
halg             1286 drivers/crypto/stm32/stm32-hash.c 		.halg = {
halg             1312 drivers/crypto/stm32/stm32-hash.c 		.halg = {
halg               36 drivers/crypto/sunxi-ss/sun4i-ss-core.c 		.halg = {
halg               62 drivers/crypto/sunxi-ss/sun4i-ss-core.c 		.halg = {
halg              360 drivers/crypto/sunxi-ss/sun4i-ss-core.c 					ss_algs[i].alg.hash.halg.base.cra_name);
halg             2827 drivers/crypto/talitos.c 			.halg.digestsize = MD5_DIGEST_SIZE,
halg             2828 drivers/crypto/talitos.c 			.halg.statesize = sizeof(struct talitos_export_state),
halg             2829 drivers/crypto/talitos.c 			.halg.base = {
halg             2842 drivers/crypto/talitos.c 			.halg.digestsize = SHA1_DIGEST_SIZE,
halg             2843 drivers/crypto/talitos.c 			.halg.statesize = sizeof(struct talitos_export_state),
halg             2844 drivers/crypto/talitos.c 			.halg.base = {
halg             2857 drivers/crypto/talitos.c 			.halg.digestsize = SHA224_DIGEST_SIZE,
halg             2858 drivers/crypto/talitos.c 			.halg.statesize = sizeof(struct talitos_export_state),
halg             2859 drivers/crypto/talitos.c 			.halg.base = {
halg             2872 drivers/crypto/talitos.c 			.halg.digestsize = SHA256_DIGEST_SIZE,
halg             2873 drivers/crypto/talitos.c 			.halg.statesize = sizeof(struct talitos_export_state),
halg             2874 drivers/crypto/talitos.c 			.halg.base = {
halg             2887 drivers/crypto/talitos.c 			.halg.digestsize = SHA384_DIGEST_SIZE,
halg             2888 drivers/crypto/talitos.c 			.halg.statesize = sizeof(struct talitos_export_state),
halg             2889 drivers/crypto/talitos.c 			.halg.base = {
halg             2902 drivers/crypto/talitos.c 			.halg.digestsize = SHA512_DIGEST_SIZE,
halg             2903 drivers/crypto/talitos.c 			.halg.statesize = sizeof(struct talitos_export_state),
halg             2904 drivers/crypto/talitos.c 			.halg.base = {
halg             2917 drivers/crypto/talitos.c 			.halg.digestsize = MD5_DIGEST_SIZE,
halg             2918 drivers/crypto/talitos.c 			.halg.statesize = sizeof(struct talitos_export_state),
halg             2919 drivers/crypto/talitos.c 			.halg.base = {
halg             2932 drivers/crypto/talitos.c 			.halg.digestsize = SHA1_DIGEST_SIZE,
halg             2933 drivers/crypto/talitos.c 			.halg.statesize = sizeof(struct talitos_export_state),
halg             2934 drivers/crypto/talitos.c 			.halg.base = {
halg             2947 drivers/crypto/talitos.c 			.halg.digestsize = SHA224_DIGEST_SIZE,
halg             2948 drivers/crypto/talitos.c 			.halg.statesize = sizeof(struct talitos_export_state),
halg             2949 drivers/crypto/talitos.c 			.halg.base = {
halg             2962 drivers/crypto/talitos.c 			.halg.digestsize = SHA256_DIGEST_SIZE,
halg             2963 drivers/crypto/talitos.c 			.halg.statesize = sizeof(struct talitos_export_state),
halg             2964 drivers/crypto/talitos.c 			.halg.base = {
halg             2977 drivers/crypto/talitos.c 			.halg.digestsize = SHA384_DIGEST_SIZE,
halg             2978 drivers/crypto/talitos.c 			.halg.statesize = sizeof(struct talitos_export_state),
halg             2979 drivers/crypto/talitos.c 			.halg.base = {
halg             2992 drivers/crypto/talitos.c 			.halg.digestsize = SHA512_DIGEST_SIZE,
halg             2993 drivers/crypto/talitos.c 			.halg.statesize = sizeof(struct talitos_export_state),
halg             2994 drivers/crypto/talitos.c 			.halg.base = {
halg             3184 drivers/crypto/talitos.c 		alg = &t_alg->algt.alg.hash.halg.base;
halg             3479 drivers/crypto/talitos.c 				alg = &t_alg->algt.alg.hash.halg.base;
halg             1509 drivers/crypto/ux500/hash/hash_core.c 	ctx->digestsize = hash_alg->hash.halg.digestsize;
halg             1525 drivers/crypto/ux500/hash/hash_core.c 			.halg.digestsize = SHA1_DIGEST_SIZE,
halg             1526 drivers/crypto/ux500/hash/hash_core.c 			.halg.statesize = sizeof(struct hash_ctx),
halg             1527 drivers/crypto/ux500/hash/hash_core.c 			.halg.base = {
halg             1548 drivers/crypto/ux500/hash/hash_core.c 			.halg.digestsize = SHA256_DIGEST_SIZE,
halg             1549 drivers/crypto/ux500/hash/hash_core.c 			.halg.statesize = sizeof(struct hash_ctx),
halg             1550 drivers/crypto/ux500/hash/hash_core.c 			.halg.base = {
halg             1572 drivers/crypto/ux500/hash/hash_core.c 			.halg.digestsize = SHA1_DIGEST_SIZE,
halg             1573 drivers/crypto/ux500/hash/hash_core.c 			.halg.statesize = sizeof(struct hash_ctx),
halg             1574 drivers/crypto/ux500/hash/hash_core.c 			.halg.base = {
halg             1596 drivers/crypto/ux500/hash/hash_core.c 			.halg.digestsize = SHA256_DIGEST_SIZE,
halg             1597 drivers/crypto/ux500/hash/hash_core.c 			.halg.statesize = sizeof(struct hash_ctx),
halg             1598 drivers/crypto/ux500/hash/hash_core.c 			.halg.base = {
halg             1625 drivers/crypto/ux500/hash/hash_core.c 				hash_algs[i].hash.halg.base.cra_driver_name);
halg              139 include/crypto/hash.h 	struct hash_alg_common halg;
halg               88 include/crypto/internal/hash.h bool crypto_hash_alg_has_setkey(struct hash_alg_common *halg);
halg              134 include/crypto/internal/hash.h 			    halg);
halg              146 include/crypto/internal/hash.h 	return container_of(&inst->alg.halg.base, struct crypto_instance, alg);
halg              152 include/crypto/internal/hash.h 	return container_of(&inst->alg, struct ahash_instance, alg.halg.base);
halg              170 include/linux/tpm_eventlog.h 	u16 halg;
halg              226 include/linux/tpm_eventlog.h 		memcpy(&halg, mapping, halg_size);
halg              230 include/linux/tpm_eventlog.h 			if (halg == efispecid->digest_sizes[j].alg_id) {