hal_handle         70 drivers/crypto/qat/qat_common/icp_qat_fw_loader_handle.h 	struct icp_qat_fw_loader_hal_handle *hal_handle;
hal_handle        142 drivers/crypto/qat/qat_common/icp_qat_hal.h 	((ae & handle->hal_handle->ae_mask) << 12))
hal_handle        149 drivers/crypto/qat/qat_common/icp_qat_hal.h 	((ae & handle->hal_handle->ae_mask) << 12))
hal_handle         79 drivers/crypto/qat/qat_common/qat_hal.c #define AE(handle, ae) handle->hal_handle->aes[ae]
hal_handle        320 drivers/crypto/qat/qat_common/qat_hal.c 	ae_reset_csr |= handle->hal_handle->ae_mask << RST_CSR_AE_LSB;
hal_handle        321 drivers/crypto/qat/qat_common/qat_hal.c 	ae_reset_csr |= handle->hal_handle->slice_mask << RST_CSR_QAT_LSB;
hal_handle        396 drivers/crypto/qat/qat_common/qat_hal.c 	for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
hal_handle        439 drivers/crypto/qat/qat_common/qat_hal.c 	for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
hal_handle        492 drivers/crypto/qat/qat_common/qat_hal.c 	ae_reset_csr &= ~(handle->hal_handle->ae_mask << RST_CSR_AE_LSB);
hal_handle        493 drivers/crypto/qat/qat_common/qat_hal.c 	ae_reset_csr &= ~(handle->hal_handle->slice_mask << RST_CSR_QAT_LSB);
hal_handle        499 drivers/crypto/qat/qat_common/qat_hal.c 	} while ((handle->hal_handle->ae_mask |
hal_handle        500 drivers/crypto/qat/qat_common/qat_hal.c 		 (handle->hal_handle->slice_mask << RST_CSR_QAT_LSB)) & csr);
hal_handle        503 drivers/crypto/qat/qat_common/qat_hal.c 	clk_csr |= handle->hal_handle->ae_mask << 0;
hal_handle        504 drivers/crypto/qat/qat_common/qat_hal.c 	clk_csr |= handle->hal_handle->slice_mask << 20;
hal_handle        510 drivers/crypto/qat/qat_common/qat_hal.c 	for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
hal_handle        515 drivers/crypto/qat/qat_common/qat_hal.c 				    handle->hal_handle->upc_mask &
hal_handle        619 drivers/crypto/qat/qat_common/qat_hal.c 	for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
hal_handle        638 drivers/crypto/qat/qat_common/qat_hal.c 	for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
hal_handle        649 drivers/crypto/qat/qat_common/qat_hal.c 				    handle->hal_handle->upc_mask &
hal_handle        659 drivers/crypto/qat/qat_common/qat_hal.c 	for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
hal_handle        675 drivers/crypto/qat/qat_common/qat_hal.c 				    handle->hal_handle->upc_mask &
hal_handle        726 drivers/crypto/qat/qat_common/qat_hal.c 	handle->hal_handle = kzalloc(sizeof(*handle->hal_handle), GFP_KERNEL);
hal_handle        727 drivers/crypto/qat/qat_common/qat_hal.c 	if (!handle->hal_handle)
hal_handle        729 drivers/crypto/qat/qat_common/qat_hal.c 	handle->hal_handle->revision_id = accel_dev->accel_pci_dev.revid;
hal_handle        730 drivers/crypto/qat/qat_common/qat_hal.c 	handle->hal_handle->ae_mask = hw_data->ae_mask;
hal_handle        731 drivers/crypto/qat/qat_common/qat_hal.c 	handle->hal_handle->slice_mask = hw_data->accel_mask;
hal_handle        733 drivers/crypto/qat/qat_common/qat_hal.c 	handle->hal_handle->upc_mask = 0x1ffff;
hal_handle        734 drivers/crypto/qat/qat_common/qat_hal.c 	handle->hal_handle->max_ustore = 0x4000;
hal_handle        738 drivers/crypto/qat/qat_common/qat_hal.c 		handle->hal_handle->aes[ae].free_addr = 0;
hal_handle        739 drivers/crypto/qat/qat_common/qat_hal.c 		handle->hal_handle->aes[ae].free_size =
hal_handle        740 drivers/crypto/qat/qat_common/qat_hal.c 		    handle->hal_handle->max_ustore;
hal_handle        741 drivers/crypto/qat/qat_common/qat_hal.c 		handle->hal_handle->aes[ae].ustore_size =
hal_handle        742 drivers/crypto/qat/qat_common/qat_hal.c 		    handle->hal_handle->max_ustore;
hal_handle        743 drivers/crypto/qat/qat_common/qat_hal.c 		handle->hal_handle->aes[ae].live_ctx_mask =
hal_handle        747 drivers/crypto/qat/qat_common/qat_hal.c 	handle->hal_handle->ae_max_num = max_en_ae_id + 1;
hal_handle        760 drivers/crypto/qat/qat_common/qat_hal.c 	for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
hal_handle        771 drivers/crypto/qat/qat_common/qat_hal.c 	kfree(handle->hal_handle);
hal_handle        781 drivers/crypto/qat/qat_common/qat_hal.c 	kfree(handle->hal_handle);
hal_handle        819 drivers/crypto/qat/qat_common/qat_hal.c 			    handle->hal_handle->upc_mask & upc);
hal_handle        888 drivers/crypto/qat/qat_common/qat_hal.c 	if ((inst_num > handle->hal_handle->max_ustore) || !micro_inst) {
hal_handle        903 drivers/crypto/qat/qat_common/qat_hal.c 	savpc = (savpc & handle->hal_handle->upc_mask) >> 0;
hal_handle        933 drivers/crypto/qat/qat_common/qat_hal.c 		*endpc = ctx_status & handle->hal_handle->upc_mask;
hal_handle        941 drivers/crypto/qat/qat_common/qat_hal.c 			    handle->hal_handle->upc_mask & savpc);
hal_handle       1151 drivers/crypto/qat/qat_common/qat_hal.c 	if ((unsigned int)alloc_inst_size > handle->hal_handle->max_ustore)
hal_handle       1152 drivers/crypto/qat/qat_common/qat_hal.c 		alloc_inst_size = handle->hal_handle->max_ustore;
hal_handle        426 drivers/crypto/qat/qat_common/qat_uclo.c 	for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
hal_handle        459 drivers/crypto/qat/qat_common/qat_uclo.c 	for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
hal_handle        693 drivers/crypto/qat/qat_common/qat_uclo.c 			      (unsigned long *)&handle->hal_handle->ae_mask))
hal_handle        896 drivers/crypto/qat/qat_common/qat_uclo.c 	for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
hal_handle        917 drivers/crypto/qat/qat_common/qat_uclo.c 	for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {
hal_handle        919 drivers/crypto/qat/qat_common/qat_uclo.c 			      (unsigned long *)&handle->hal_handle->ae_mask))
hal_handle        979 drivers/crypto/qat/qat_common/qat_uclo.c 			(PID_MINOR_REV & handle->hal_handle->revision_id);
hal_handle       1000 drivers/crypto/qat/qat_common/qat_uclo.c 	if (qat_uclo_map_ae(handle, handle->hal_handle->ae_max_num)) {
hal_handle       1098 drivers/crypto/qat/qat_common/qat_uclo.c 			 (PID_MINOR_REV & handle->hal_handle->revision_id);
hal_handle       1377 drivers/crypto/qat/qat_common/qat_uclo.c 	for (i = 0; i < handle->hal_handle->ae_max_num; i++) {
hal_handle       1482 drivers/crypto/qat/qat_common/qat_uclo.c 		     (sizeof(handle->hal_handle->ae_mask) * 8));
hal_handle       1506 drivers/crypto/qat/qat_common/qat_uclo.c 	for (a = 0; a < handle->hal_handle->ae_max_num; a++)
hal_handle       1598 drivers/crypto/qat/qat_common/qat_uclo.c 	for (ae = 0; ae < handle->hal_handle->ae_max_num; ae++) {