hal_data 493 drivers/staging/rtl8188eu/hal/bb_cfg.c struct hal_data_8188e *hal_data = adapter->HalData; hal_data 495 drivers/staging/rtl8188eu/hal/bb_cfg.c hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt]; hal_data 513 drivers/staging/rtl8188eu/hal/bb_cfg.c hal_data->pwrGroupCnt++; hal_data 137 drivers/staging/rtl8188eu/hal/phy.c struct hal_data_8188e *hal_data = adapt->HalData; hal_data 145 drivers/staging/rtl8188eu/hal/phy.c cck_pwr[TxCount] = hal_data->Index24G_CCK_Base[TxCount][index]; hal_data 146 drivers/staging/rtl8188eu/hal/phy.c ofdm_pwr[TxCount] = hal_data->Index24G_BW40_Base[RF_PATH_A][index]+ hal_data 147 drivers/staging/rtl8188eu/hal/phy.c hal_data->OFDM_24G_Diff[TxCount][RF_PATH_A]; hal_data 149 drivers/staging/rtl8188eu/hal/phy.c bw20_pwr[TxCount] = hal_data->Index24G_BW40_Base[RF_PATH_A][index]+ hal_data 150 drivers/staging/rtl8188eu/hal/phy.c hal_data->BW20_24G_Diff[TxCount][RF_PATH_A]; hal_data 151 drivers/staging/rtl8188eu/hal/phy.c bw40_pwr[TxCount] = hal_data->Index24G_BW40_Base[TxCount][index]; hal_data 153 drivers/staging/rtl8188eu/hal/phy.c cck_pwr[TxCount] = hal_data->Index24G_CCK_Base[TxCount][index]; hal_data 154 drivers/staging/rtl8188eu/hal/phy.c ofdm_pwr[TxCount] = hal_data->Index24G_BW40_Base[RF_PATH_A][index]+ hal_data 155 drivers/staging/rtl8188eu/hal/phy.c hal_data->BW20_24G_Diff[RF_PATH_A][index]+ hal_data 156 drivers/staging/rtl8188eu/hal/phy.c hal_data->BW20_24G_Diff[TxCount][index]; hal_data 158 drivers/staging/rtl8188eu/hal/phy.c bw20_pwr[TxCount] = hal_data->Index24G_BW40_Base[RF_PATH_A][index]+ hal_data 159 drivers/staging/rtl8188eu/hal/phy.c hal_data->BW20_24G_Diff[TxCount][RF_PATH_A]+ hal_data 160 drivers/staging/rtl8188eu/hal/phy.c hal_data->BW20_24G_Diff[TxCount][index]; hal_data 161 drivers/staging/rtl8188eu/hal/phy.c bw40_pwr[TxCount] = hal_data->Index24G_BW40_Base[TxCount][index]; hal_data 170 drivers/staging/rtl8188eu/hal/phy.c struct hal_data_8188e *hal_data = adapt->HalData; hal_data 172 drivers/staging/rtl8188eu/hal/phy.c hal_data->CurrentCckTxPwrIdx = cck_pwr[0]; hal_data 173 drivers/staging/rtl8188eu/hal/phy.c hal_data->CurrentOfdm24GTxPwrIdx = ofdm_pwr[0]; hal_data 174 drivers/staging/rtl8188eu/hal/phy.c hal_data->CurrentBW2024GTxPwrIdx = bw20_pwr[0]; hal_data 175 drivers/staging/rtl8188eu/hal/phy.c hal_data->CurrentBW4024GTxPwrIdx = bw40_pwr[0]; hal_data 198 drivers/staging/rtl8188eu/hal/phy.c struct hal_data_8188e *hal_data = adapt->HalData; hal_data 210 drivers/staging/rtl8188eu/hal/phy.c switch (hal_data->CurrentChannelBW) { hal_data 219 drivers/staging/rtl8188eu/hal/phy.c (hal_data->nCur40MhzPrimeSC<<5); hal_data 227 drivers/staging/rtl8188eu/hal/phy.c switch (hal_data->CurrentChannelBW) { hal_data 239 drivers/staging/rtl8188eu/hal/phy.c (hal_data->nCur40MhzPrimeSC>>1)); hal_data 241 drivers/staging/rtl8188eu/hal/phy.c hal_data->nCur40MhzPrimeSC); hal_data 243 drivers/staging/rtl8188eu/hal/phy.c (hal_data->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1); hal_data 250 drivers/staging/rtl8188eu/hal/phy.c rtl88eu_phy_rf6052_set_bandwidth(adapt, hal_data->CurrentChannelBW); hal_data 256 drivers/staging/rtl8188eu/hal/phy.c struct hal_data_8188e *hal_data = adapt->HalData; hal_data 257 drivers/staging/rtl8188eu/hal/phy.c enum ht_channel_width tmp_bw = hal_data->CurrentChannelBW; hal_data 259 drivers/staging/rtl8188eu/hal/phy.c hal_data->CurrentChannelBW = bandwidth; hal_data 260 drivers/staging/rtl8188eu/hal/phy.c hal_data->nCur40MhzPrimeSC = offset; hal_data 265 drivers/staging/rtl8188eu/hal/phy.c hal_data->CurrentChannelBW = tmp_bw; hal_data 271 drivers/staging/rtl8188eu/hal/phy.c struct hal_data_8188e *hal_data = adapt->HalData; hal_data 277 drivers/staging/rtl8188eu/hal/phy.c hal_data->RfRegChnlVal[0] = (hal_data->RfRegChnlVal[0] & hal_data 280 drivers/staging/rtl8188eu/hal/phy.c bRFRegOffsetMask, hal_data->RfRegChnlVal[0]); hal_data 285 drivers/staging/rtl8188eu/hal/phy.c struct hal_data_8188e *hal_data = adapt->HalData; hal_data 286 drivers/staging/rtl8188eu/hal/phy.c u8 tmpchannel = hal_data->CurrentChannel; hal_data 291 drivers/staging/rtl8188eu/hal/phy.c hal_data->CurrentChannel = channel; hal_data 296 drivers/staging/rtl8188eu/hal/phy.c hal_data->CurrentChannel = tmpchannel; hal_data 357 drivers/staging/rtl8188eu/hal/phy.c struct hal_data_8188e *hal_data = adapt->HalData; hal_data 379 drivers/staging/rtl8188eu/hal/phy.c struct odm_dm_struct *dm_odm = &hal_data->odmpriv; hal_data 415 drivers/staging/rtl8188eu/hal/phy.c dm_odm->RFCalibrateInfo.ThermalValue = hal_data->EEPROMThermalMeter; hal_data 443 drivers/staging/rtl8188eu/hal/phy.c delta = abs(thermal_val - hal_data->EEPROMThermalMeter); hal_data 460 drivers/staging/rtl8188eu/hal/phy.c delta = abs(hal_data->EEPROMThermalMeter - thermal_val); hal_data 463 drivers/staging/rtl8188eu/hal/phy.c if (thermal_val > hal_data->EEPROMThermalMeter) hal_data 17 drivers/staging/rtl8188eu/hal/rf.c struct hal_data_8188e *hal_data = adapt->HalData; hal_data 21 drivers/staging/rtl8188eu/hal/rf.c hal_data->RfRegChnlVal[0] = ((hal_data->RfRegChnlVal[0] & hal_data 24 drivers/staging/rtl8188eu/hal/rf.c hal_data->RfRegChnlVal[0]); hal_data 27 drivers/staging/rtl8188eu/hal/rf.c hal_data->RfRegChnlVal[0] = ((hal_data->RfRegChnlVal[0] & hal_data 30 drivers/staging/rtl8188eu/hal/rf.c hal_data->RfRegChnlVal[0]); hal_data 39 drivers/staging/rtl8188eu/hal/rf.c struct hal_data_8188e *hal_data = adapt->HalData; hal_data 40 drivers/staging/rtl8188eu/hal/rf.c struct dm_priv *pdmpriv = &hal_data->dmpriv; hal_data 70 drivers/staging/rtl8188eu/hal/rf.c if (hal_data->EEPROMRegulatory == 0) { hal_data 71 drivers/staging/rtl8188eu/hal/rf.c tmpval = hal_data->MCSTxPowerLevelOriginalOffset[0][6] + hal_data 72 drivers/staging/rtl8188eu/hal/rf.c (hal_data->MCSTxPowerLevelOriginalOffset[0][7]<<8); hal_data 75 drivers/staging/rtl8188eu/hal/rf.c tmpval = hal_data->MCSTxPowerLevelOriginalOffset[0][14] + hal_data 76 drivers/staging/rtl8188eu/hal/rf.c (hal_data->MCSTxPowerLevelOriginalOffset[0][15]<<24); hal_data 89 drivers/staging/rtl8188eu/hal/rf.c rtl88eu_dm_txpower_track_adjust(&hal_data->odmpriv, 1, &direction, hal_data 145 drivers/staging/rtl8188eu/hal/rf.c struct hal_data_8188e *hal_data = adapt->HalData; hal_data 146 drivers/staging/rtl8188eu/hal/rf.c struct dm_priv *pdmpriv = &hal_data->dmpriv; hal_data 150 drivers/staging/rtl8188eu/hal/rf.c u8 regulatory = hal_data->EEPROMRegulatory; hal_data 160 drivers/staging/rtl8188eu/hal/rf.c write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] + hal_data 165 drivers/staging/rtl8188eu/hal/rf.c if (hal_data->pwrGroupCnt == 1) hal_data 167 drivers/staging/rtl8188eu/hal/rf.c if (hal_data->pwrGroupCnt >= hal_data->PGMaxGroup) hal_data 170 drivers/staging/rtl8188eu/hal/rf.c write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] + hal_data 182 drivers/staging/rtl8188eu/hal/rf.c pwr_diff = hal_data->TxPwrLegacyHtDiff[rf][channel-1]; hal_data 183 drivers/staging/rtl8188eu/hal/rf.c else if (hal_data->CurrentChannelBW == HT_CHANNEL_WIDTH_20) hal_data 184 drivers/staging/rtl8188eu/hal/rf.c pwr_diff = hal_data->TxPwrHt20Diff[rf][channel-1]; hal_data 186 drivers/staging/rtl8188eu/hal/rf.c if (hal_data->CurrentChannelBW == HT_CHANNEL_WIDTH_40) hal_data 187 drivers/staging/rtl8188eu/hal/rf.c customer_pwr_limit = hal_data->PwrGroupHT40[rf][channel-1]; hal_data 189 drivers/staging/rtl8188eu/hal/rf.c customer_pwr_limit = hal_data->PwrGroupHT20[rf][channel-1]; hal_data 197 drivers/staging/rtl8188eu/hal/rf.c pwr_diff_limit[i] = (u8)((hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][j] & hal_data 211 drivers/staging/rtl8188eu/hal/rf.c write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][j] + hal_data 223 drivers/staging/rtl8188eu/hal/rf_cfg.c struct hal_data_8188e *hal_data = adapt->HalData; hal_data 228 drivers/staging/rtl8188eu/hal/rf_cfg.c pphyreg = &hal_data->PHYRegDef[RF90_PATH_A]; hal_data 37 drivers/staging/rtl8188eu/hal/rtl8188e_dm.c struct hal_data_8188e *hal_data = Adapter->HalData; hal_data 38 drivers/staging/rtl8188eu/hal/rtl8188e_dm.c struct dm_priv *pdmpriv = &hal_data->dmpriv; hal_data 39 drivers/staging/rtl8188eu/hal/rtl8188e_dm.c struct odm_dm_struct *dm_odm = &(hal_data->odmpriv); hal_data 48 drivers/staging/rtl8188eu/hal/rtl8188e_dm.c dm_odm->bIsMPChip = hal_data->VersionID.ChipType == NORMAL_CHIP; hal_data 49 drivers/staging/rtl8188eu/hal/rtl8188e_dm.c dm_odm->PatchID = hal_data->CustomerID; hal_data 52 drivers/staging/rtl8188eu/hal/rtl8188e_dm.c dm_odm->AntDivType = hal_data->TRxAntDivType; hal_data 71 drivers/staging/rtl8188eu/hal/rtl8188e_dm.c struct hal_data_8188e *hal_data = Adapter->HalData; hal_data 72 drivers/staging/rtl8188eu/hal/rtl8188e_dm.c struct odm_dm_struct *dm_odm = &(hal_data->odmpriv); hal_data 73 drivers/staging/rtl8188eu/hal/rtl8188e_dm.c struct dm_priv *pdmpriv = &hal_data->dmpriv; hal_data 86 drivers/staging/rtl8188eu/hal/rtl8188e_dm.c if (hal_data->AntDivCfg) hal_data 99 drivers/staging/rtl8188eu/hal/rtl8188e_dm.c dm_odm->pSecChOffset = &hal_data->nCur40MhzPrimeSC; hal_data 101 drivers/staging/rtl8188eu/hal/rtl8188e_dm.c dm_odm->pBandWidth = (u8 *)&hal_data->CurrentChannelBW; hal_data 102 drivers/staging/rtl8188eu/hal/rtl8188e_dm.c dm_odm->pChannel = &hal_data->CurrentChannel; hal_data 107 drivers/staging/rtl8188eu/hal/rtl8188e_dm.c dm_odm->AntDivType = hal_data->TRxAntDivType; hal_data 188 drivers/staging/rtl8723bs/core/rtw_odm.c struct hal_com_data *hal_data = GET_HAL_DATA(adapter); hal_data 189 drivers/staging/rtl8723bs/core/rtw_odm.c DM_ODM_T *odm = &hal_data->odmpriv; hal_data 1011 drivers/staging/rtl8723bs/hal/hal_com.c struct hal_com_data *hal_data = GET_HAL_DATA(adapter); hal_data 1012 drivers/staging/rtl8723bs/hal/hal_com.c DM_ODM_T *odm = &(hal_data->odmpriv); hal_data 1058 drivers/staging/rtl8723bs/hal/hal_com.c struct dm_priv *dm = &hal_data->dmpriv; hal_data 1091 drivers/staging/rtl8723bs/hal/hal_com.c struct hal_com_data *hal_data = GET_HAL_DATA(adapter); hal_data 1092 drivers/staging/rtl8723bs/hal/hal_com.c DM_ODM_T *odm = &(hal_data->odmpriv); hal_data 1096 drivers/staging/rtl8723bs/hal/hal_com.c *((u16 *)val) = hal_data->BasicRateSet; hal_data 1102 drivers/staging/rtl8723bs/hal/hal_com.c *((u8 *)val) = hal_data->rf_type; hal_data 1122 drivers/staging/rtl8723bs/hal/hal_com.c struct hal_com_data *hal_data = GET_HAL_DATA(adapter); hal_data 1123 drivers/staging/rtl8723bs/hal/hal_com.c DM_ODM_T *odm = &(hal_data->odmpriv); hal_data 1157 drivers/staging/rtl8723bs/hal/hal_com.c struct dm_priv *dm = &hal_data->dmpriv; hal_data 1186 drivers/staging/rtl8723bs/hal/hal_com.c hal_data->bDumpRxPkt = *((u8 *)value); hal_data 1189 drivers/staging/rtl8723bs/hal/hal_com.c hal_data->bDumpTxPkt = *((u8 *)value); hal_data 1192 drivers/staging/rtl8723bs/hal/hal_com.c hal_data->AntDetection = *((u8 *)value); hal_data 1207 drivers/staging/rtl8723bs/hal/hal_com.c struct hal_com_data *hal_data = GET_HAL_DATA(adapter); hal_data 1208 drivers/staging/rtl8723bs/hal/hal_com.c DM_ODM_T *odm = &(hal_data->odmpriv); hal_data 1232 drivers/staging/rtl8723bs/hal/hal_com.c *((u32 *)value) = hal_data->odmpriv.SupportAbility; hal_data 1235 drivers/staging/rtl8723bs/hal/hal_com.c *((u8 *)value) = hal_data->bDumpRxPkt; hal_data 1238 drivers/staging/rtl8723bs/hal/hal_com.c *((u8 *)value) = hal_data->bDumpTxPkt; hal_data 1241 drivers/staging/rtl8723bs/hal/hal_com.c *((u8 *)value) = hal_data->AntDetection; hal_data 1687 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c struct hal_com_data *hal_data = GET_HAL_DATA(adapter); hal_data 1690 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c (hal_data->EEPROMRegulatory != 1)) || hal_data 1709 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c hal_data->Regulation2_4G : hal_data 1710 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c hal_data->Regulation5G; hal_data 1754 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c limits[i] = hal_data->TxPwrLimit_2_4G[i] hal_data 1762 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c hal_data->TxPwrLimit_2_4G[idx_regulation] hal_data 1772 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c limits[i] = hal_data->TxPwrLimit_5G[i] hal_data 1780 drivers/staging/rtl8723bs/hal/hal_com_phycfg.c hal_data->TxPwrLimit_5G[idx_regulation]