h_ratio 46 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->h_ratio[k] = v->viewport_width[k] / v->scaler_rec_out_width[k]; h_ratio 50 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->h_ratio[k] = v->viewport_height[k] / v->scaler_rec_out_width[k]; h_ratio 56 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->h_ratio[k] =dcn_bw_max2(v->viewport_width[k] / v->scaler_rec_out_width[k], v->viewport_height[k] / v->scaler_recout_height[k]); h_ratio 59 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->h_ratio[k] =dcn_bw_max2(v->viewport_height[k] / v->scaler_rec_out_width[k], v->viewport_width[k] / v->scaler_recout_height[k]); h_ratio 61 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->v_ratio[k] = v->h_ratio[k]; h_ratio 67 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->h_ratio[k] = v->h_ratio[k] * v->under_scan_factor; h_ratio 74 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->h_ratio[k] > 1.0) { h_ratio 75 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->acceptable_quality_hta_ps =dcn_bw_min2(v->max_hscl_taps, 2.0 *dcn_bw_ceil2(v->h_ratio[k], 1.0)); h_ratio 77 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c else if (v->h_ratio[k] < 1.0) { h_ratio 132 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->h_ratio[k] > v->max_hscl_ratio || v->v_ratio[k] > v->max_vscl_ratio || v->h_ratio[k] > v->htaps[k] || v->v_ratio[k] > v->vtaps[k] || (v->source_pixel_format[k] != dcn_bw_rgb_sub_64 && v->source_pixel_format[k] != dcn_bw_rgb_sub_32 && v->source_pixel_format[k] != dcn_bw_rgb_sub_16 && (v->h_ratio[k] / 2.0 > v->hta_pschroma[k] || v->v_ratio[k] / 2.0 > v->vta_pschroma[k]))) { h_ratio 323 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->h_ratio[k] > 1.0) { h_ratio 324 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pscl_factor[k] =dcn_bw_min2(v->max_dchub_topscl_throughput, v->max_pscl_tolb_throughput * v->h_ratio[k] /dcn_bw_ceil2(v->htaps[k] / 6.0, 1.0)); h_ratio 331 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_dppclk_using_single_dpp[k] = v->pixel_clock[k] *dcn_bw_max3(v->vtaps[k] / 6.0 *dcn_bw_min2(1.0, v->h_ratio[k]), v->h_ratio[k] * v->v_ratio[k] / v->pscl_factor[k], 1.0); h_ratio 334 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->h_ratio[k] / 2.0 > 1.0) { h_ratio 335 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pscl_factor_chroma[k] =dcn_bw_min2(v->max_dchub_topscl_throughput, v->max_pscl_tolb_throughput * v->h_ratio[k] / 2.0 /dcn_bw_ceil2(v->hta_pschroma[k] / 6.0, 1.0)); h_ratio 340 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->min_dppclk_using_single_dpp[k] = v->pixel_clock[k] *dcn_bw_max5(v->vtaps[k] / 6.0 *dcn_bw_min2(1.0, v->h_ratio[k]), v->h_ratio[k] * v->v_ratio[k] / v->pscl_factor[k], v->vta_pschroma[k] / 6.0 *dcn_bw_min2(1.0, v->h_ratio[k] / 2.0), v->h_ratio[k] * v->v_ratio[k] / 4.0 / v->pscl_factor_chroma[k], 1.0); h_ratio 427 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->number_of_dpp_required_for_lb_size =dcn_bw_ceil2((v->vtaps[k] +dcn_bw_max2(dcn_bw_ceil2(v->v_ratio[k], 1.0) - 2, 0.0)) * v->swath_width_ysingle_dpp[k] /dcn_bw_max2(v->h_ratio[k], 1.0) * v->lb_bit_per_pixel[k] / v->line_buffer_size, 1.0); h_ratio 430 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->number_of_dpp_required_for_lb_size =dcn_bw_max2(dcn_bw_ceil2((v->vtaps[k] +dcn_bw_max2(dcn_bw_ceil2(v->v_ratio[k], 1.0) - 2, 0.0)) * v->swath_width_ysingle_dpp[k] /dcn_bw_max2(v->h_ratio[k], 1.0) * v->lb_bit_per_pixel[k] / v->line_buffer_size, 1.0),dcn_bw_ceil2((v->vta_pschroma[k] +dcn_bw_max2(dcn_bw_ceil2(v->v_ratio[k] / 2.0, 1.0) - 2, 0.0)) * v->swath_width_ysingle_dpp[k] / 2.0 /dcn_bw_max2(v->h_ratio[k] / 2.0, 1.0) * v->lb_bit_per_pixel[k] / v->line_buffer_size, 1.0)); h_ratio 554 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->effective_lb_latency_hiding_source_lines_luma =dcn_bw_min2(v->max_line_buffer_lines,dcn_bw_floor2(v->line_buffer_size / v->lb_bit_per_pixel[k] / (v->swath_width_yper_state[i][j][k] /dcn_bw_max2(v->h_ratio[k], 1.0)), 1.0)) - (v->vtaps[k] - 1.0); h_ratio 555 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->effective_lb_latency_hiding_source_lines_chroma =dcn_bw_min2(v->max_line_buffer_lines,dcn_bw_floor2(v->line_buffer_size / v->lb_bit_per_pixel[k] / (v->swath_width_yper_state[i][j][k] / 2.0 /dcn_bw_max2(v->h_ratio[k] / 2.0, 1.0)), 1.0)) - (v->vta_pschroma[k] - 1.0); h_ratio 596 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->projected_dcfclk_deep_sleep =dcn_bw_max2(v->projected_dcfclk_deep_sleep, 1.1 *dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) / 64.0 * v->h_ratio[k] * v->pixel_clock[k] / v->no_of_dpp[i][j][k]); h_ratio 604 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->projected_dcfclk_deep_sleep =dcn_bw_max2(v->projected_dcfclk_deep_sleep, 1.1 *dcn_bw_ceil2(v->byte_per_pixel_in_dety[k], 1.0) / 32.0 * v->h_ratio[k] * v->pixel_clock[k] / v->no_of_dpp[i][j][k]); h_ratio 610 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->projected_dcfclk_deep_sleep =dcn_bw_max2(v->projected_dcfclk_deep_sleep, 1.1 *dcn_bw_ceil2(v->byte_per_pixel_in_detc[k], 2.0) / 32.0 * v->h_ratio[k] / 2.0 * v->pixel_clock[k] / v->no_of_dpp[i][j][k]); h_ratio 1184 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->h_ratio[k] > 1.0) { h_ratio 1185 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pscl_throughput[k] =dcn_bw_min2(v->max_dchub_topscl_throughput, v->max_pscl_tolb_throughput * v->h_ratio[k] /dcn_bw_ceil2(v->htaps[k] / 6.0, 1.0)); h_ratio 1190 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dppclk_using_single_dpp_luma = v->pixel_clock[k] *dcn_bw_max3(v->vtaps[k] / 6.0 *dcn_bw_min2(1.0, v->h_ratio[k]), v->h_ratio[k] * v->v_ratio[k] / v->pscl_throughput[k], 1.0); h_ratio 1196 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c if (v->h_ratio[k] > 1.0) { h_ratio 1197 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->pscl_throughput_chroma[k] =dcn_bw_min2(v->max_dchub_topscl_throughput, v->max_pscl_tolb_throughput * v->h_ratio[k] / 2.0 /dcn_bw_ceil2(v->hta_pschroma[k] / 6.0, 1.0)); h_ratio 1202 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->dppclk_using_single_dpp_chroma = v->pixel_clock[k] *dcn_bw_max3(v->vta_pschroma[k] / 6.0 *dcn_bw_min2(1.0, v->h_ratio[k] / 2.0), v->h_ratio[k] * v->v_ratio[k] / 4.0 / v->pscl_throughput_chroma[k], 1.0); h_ratio 1297 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->display_pipe_line_delivery_time_luma[k] = v->swath_width_y[k] * v->dpp_per_plane[k] / v->h_ratio[k] / v->pixel_clock[k]; h_ratio 1309 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->display_pipe_line_delivery_time_chroma[k] = v->swath_width_y[k] / 2.0 * v->dpp_per_plane[k] / (v->h_ratio[k] / 2.0) / v->pixel_clock[k]; h_ratio 1783 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->display_pipe_line_delivery_time_luma_prefetch[k] = v->swath_width_y[k] * v->dpp_per_plane[k] / v->h_ratio[k] / v->pixel_clock[k]; h_ratio 1793 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->display_pipe_line_delivery_time_chroma_prefetch[k] = v->swath_width_y[k] * v->dpp_per_plane[k] / v->h_ratio[k] / v->pixel_clock[k]; h_ratio 1826 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->lb_latency_hiding_source_lines_y =dcn_bw_min2(v->max_line_buffer_lines,dcn_bw_floor2(v->line_buffer_size / v->lb_bit_per_pixel[k] / (v->swath_width_y[k] /dcn_bw_max2(v->h_ratio[k], 1.0)), 1.0)) - (v->vtaps[k] - 1.0); h_ratio 1827 drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c v->lb_latency_hiding_source_lines_c =dcn_bw_min2(v->max_line_buffer_lines,dcn_bw_floor2(v->line_buffer_size / v->lb_bit_per_pixel[k] / (v->swath_width_y[k] / 2.0 /dcn_bw_max2(v->h_ratio[k] / 2.0, 1.0)), 1.0)) - (v->vta_pschroma[k] - 1.0); h_ratio 200 drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h float h_ratio[number_of_planes_minus_one + 1]; h_ratio 67 drivers/gpu/drm/exynos/exynos_drm_drv.h unsigned int h_ratio; h_ratio 86 drivers/gpu/drm/exynos/exynos_drm_plane.c exynos_state->h_ratio = (src_w << 16) / crtc_w; h_ratio 95 drivers/gpu/drm/exynos/exynos_drm_plane.c src_x += ((-crtc_x) * exynos_state->h_ratio) >> 16; h_ratio 108 drivers/gpu/drm/exynos/exynos_drm_plane.c exynos_state->src.w = (actual_w * exynos_state->h_ratio) >> 16; h_ratio 216 drivers/gpu/drm/exynos/exynos_drm_plane.c state->h_ratio == (1 << 15)) h_ratio 267 drivers/gpu/drm/exynos/exynos_drm_scaler.c u32 val, h_ratio, v_ratio; h_ratio 270 drivers/gpu/drm/exynos/exynos_drm_scaler.c h_ratio = (src_pos->h << 16) / dst_pos->w; h_ratio 273 drivers/gpu/drm/exynos/exynos_drm_scaler.c h_ratio = (src_pos->w << 16) / dst_pos->w; h_ratio 277 drivers/gpu/drm/exynos/exynos_drm_scaler.c val = SCALER_H_RATIO_SET(h_ratio); h_ratio 578 drivers/gpu/drm/exynos/exynos_mixer.c vp_reg_write(ctx, VP_H_RATIO, state->h_ratio); h_ratio 642 drivers/gpu/drm/exynos/exynos_mixer.c x_ratio = state->h_ratio == (1 << 15); h_ratio 1709 drivers/media/platform/s5p-jpeg/jpeg-core.c int w_ratio, h_ratio, scale_factor, cur_ratio, i; h_ratio 1712 drivers/media/platform/s5p-jpeg/jpeg-core.c h_ratio = ctx->out_q.h / r->height; h_ratio 1714 drivers/media/platform/s5p-jpeg/jpeg-core.c scale_factor = w_ratio > h_ratio ? w_ratio : h_ratio;