h_init_phase_chroma_int  732 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c 	uint32_t h_init_phase_chroma_int = 0;
h_init_phase_chroma_int  775 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c 	h_init_phase_chroma_int = (h_init_phase_chroma >> 19) & 0x1f;
h_init_phase_chroma_int  781 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c 	REG_UPDATE(WBSCL_HORZ_FILTER_INIT_CBCR, WBSCL_H_INIT_INT_CBCR, h_init_phase_chroma_int);