h_div             186 arch/mips/cavium-octeon/octeon-platform.c 	clk_rst_ctl.s.h_div = div;
h_div              85 arch/mips/include/asm/octeon/cvmx-uctlx-defs.h 		uint64_t h_div:4;
h_div             101 arch/mips/include/asm/octeon/cvmx-uctlx-defs.h 		uint64_t h_div:4;
h_div             157 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	enum h_timing_div_mode h_div = H_TIMING_NO_DIV;
h_div             289 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 		h_div = H_TIMING_DIV_BY2;
h_div             292 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 		OTG_H_TIMING_DIV_BY2, h_div);
h_div              68 drivers/gpu/drm/drm_fb_cma_helper.c 	u8 h_div = 1, v_div = 1;
h_div              84 drivers/gpu/drm/drm_fb_cma_helper.c 		h_div = fb->format->hsub;
h_div              88 drivers/gpu/drm/drm_fb_cma_helper.c 	sample_x = (state->src_x >> 16) / h_div;
h_div             522 drivers/media/i2c/ov2640.c #define PER_SIZE_REG_SEQ(x, y, v_div, h_div, pclk_div)	\
h_div             524 drivers/media/i2c/ov2640.c 		 CTRLI_H_DIV_SET(h_div)},		\
h_div             179 drivers/media/platform/vicodec/vicodec-core.c 		unsigned int h_div = (plane_idx == 1 || plane_idx == 2) ?
h_div             196 drivers/media/platform/vicodec/vicodec-core.c 		for (i = 0; i < state->visible_height / h_div; i++) {
h_div             201 drivers/media/platform/vicodec/vicodec-core.c 		cap += cap_stride * (state->coded_height / h_div);
h_div             202 drivers/media/platform/vicodec/vicodec-core.c 		p_ref += ref_stride * (state->coded_height / h_div);