h_border_right   3334 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 	timing_out->h_border_right = 0;
h_border_right    425 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 			- pipe->stream->timing.h_border_right;
h_border_right   3061 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 		pipe_ctx->stream->timing.h_border_right;
h_border_right    399 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 		dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right) / opp_cnt;
h_border_right    500 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 		dsc_cfg.pic_width = stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right;
h_border_right    993 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 	pipe_ctx->plane_res.scl_data.h_active = timing->h_addressable + timing->h_border_left + timing->h_border_right;
h_border_right   2345 drivers/gpu/drm/amd/display/dc/core/dc_resource.c 			- stream->timing.h_border_right + 1);
h_border_right    780 drivers/gpu/drm/amd/display/dc/dc_hw_types.h 	uint32_t h_border_right;
h_border_right    478 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 				hw_crtc_timing.h_addressable - hw_crtc_timing.h_border_right;
h_border_right    514 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 				hw_crtc_timing.h_addressable + hw_crtc_timing.h_border_right,
h_border_right    676 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 				+ timing->h_border_right;
h_border_right   1134 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 			+ stream->timing.h_border_right;
h_border_right    294 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c 	uint32_t hsync_offset = dc_crtc_timing->h_border_right +
h_border_right    325 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c 		patched_crtc_timing.h_border_right;
h_border_right    604 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c 	uint32_t hsync_offset = timing->h_border_right +
h_border_right    666 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c 		timing->h_border_left + timing->h_border_right;
h_border_right   1124 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c 	hsync_offset = timing->h_border_right + timing->h_front_porch;
h_border_right   1145 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c 		timing->h_border_right -
h_border_right   1156 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator.c 		timing->h_border_right -
h_border_right    250 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c 	uint32_t hsync_offset = timing->h_border_right +
h_border_right    290 drivers/gpu/drm/amd/display/dc/dce110/dce110_timing_generator_v.c 		timing->h_border_left + timing->h_border_right;
h_border_right    438 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c 	uint32_t hsync_offset = timing->h_border_right +
h_border_right    469 drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c 			timing->h_border_left + timing->h_border_right;
h_border_right    308 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c 	uint32_t active_width = timing->h_addressable - timing->h_border_right - timing->h_border_right;
h_border_right    186 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 			patched_crtc_timing.h_border_right -
h_border_right    519 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 		timing->h_border_right -
h_border_right   1263 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c 	if (otg_timing->h_border_right != hw_crtc_timing.h_border_right)
h_border_right    439 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c 			hw_crtc_timing.h_addressable - hw_crtc_timing.h_border_right;
h_border_right    471 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c 		hw_crtc_timing.h_addressable + hw_crtc_timing.h_border_right,
h_border_right    860 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 	int width = stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right;
h_border_right   1950 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 				+ timing->h_border_right;
h_border_right    236 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c 	int mpcc_hactive = (timing->h_addressable + timing->h_border_left + timing->h_border_right)
h_border_right   1927 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 				- timing->h_border_right;
h_border_right   2273 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 				+ stream->timing.h_border_right) / opp_cnt;
h_border_right    532 drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c 	pic_width = timing->h_addressable + timing->h_border_left + timing->h_border_right;