h_blank_start 119 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c uint32_t h_blank_start = data->h_active; h_blank_start 125 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c OTG_H_BLANK_START, h_blank_start, h_blank_start 336 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c s.h_blank_start, h_blank_start 449 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c s.h_blank_start, h_blank_start 1245 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c hw_crtc_timing.h_addressable = s.h_total - ((s.h_total - s.h_blank_start) + s.h_blank_end); h_blank_start 1246 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c hw_crtc_timing.h_front_porch = s.h_total + 1 - s.h_blank_start; h_blank_start 1324 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c OTG_H_BLANK_START, &s->h_blank_start, h_blank_start 1348 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c uint32_t h_blank_start; h_blank_start 1364 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c OTG_H_BLANK_START, &h_blank_start, h_blank_start 1368 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c *otg_active_height = h_blank_start - h_blank_end; h_blank_start 537 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.h uint32_t h_blank_start; h_blank_start 352 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c uint32_t h_blank_start = 0; h_blank_start 361 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c REG_GET(OTG_H_BLANK_START_END, OTG_H_BLANK_START, &h_blank_start); h_blank_start 365 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c h_blank_start - 200 - 1, h_blank_start 69 drivers/video/fbdev/bw2.c u8 h_blank_start; h_blank_start 94 drivers/video/fbdev/cg3.c u8 h_blank_start; h_blank_start 661 drivers/video/fbdev/smscufx.c u16 h_total, h_active, h_blank_start, h_blank_end, h_sync_start, h_sync_end; h_blank_start 686 drivers/video/fbdev/smscufx.c h_blank_start = var->xres + var->right_margin; h_blank_start 695 drivers/video/fbdev/smscufx.c temp = ((h_blank_start - 1) << 16) | (h_blank_end - 1);