gvt 43 drivers/gpu/drm/i915/gvt/aperture_gm.c struct intel_gvt *gvt = vgpu->gvt; gvt 44 drivers/gpu/drm/i915/gvt/aperture_gm.c struct drm_i915_private *dev_priv = gvt->dev_priv; gvt 53 drivers/gpu/drm/i915/gvt/aperture_gm.c start = ALIGN(gvt_hidden_gmadr_base(gvt), I915_GTT_PAGE_SIZE); gvt 54 drivers/gpu/drm/i915/gvt/aperture_gm.c end = ALIGN(gvt_hidden_gmadr_end(gvt), I915_GTT_PAGE_SIZE); gvt 59 drivers/gpu/drm/i915/gvt/aperture_gm.c start = ALIGN(gvt_aperture_gmadr_base(gvt), I915_GTT_PAGE_SIZE); gvt 60 drivers/gpu/drm/i915/gvt/aperture_gm.c end = ALIGN(gvt_aperture_gmadr_end(gvt), I915_GTT_PAGE_SIZE); gvt 81 drivers/gpu/drm/i915/gvt/aperture_gm.c struct intel_gvt *gvt = vgpu->gvt; gvt 82 drivers/gpu/drm/i915/gvt/aperture_gm.c struct drm_i915_private *dev_priv = gvt->dev_priv; gvt 109 drivers/gpu/drm/i915/gvt/aperture_gm.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 130 drivers/gpu/drm/i915/gvt/aperture_gm.c struct intel_gvt *gvt = vgpu->gvt; gvt 131 drivers/gpu/drm/i915/gvt/aperture_gm.c struct drm_i915_private *dev_priv = gvt->dev_priv; gvt 165 drivers/gpu/drm/i915/gvt/aperture_gm.c struct intel_gvt *gvt = vgpu->gvt; gvt 166 drivers/gpu/drm/i915/gvt/aperture_gm.c struct drm_i915_private *dev_priv = gvt->dev_priv; gvt 189 drivers/gpu/drm/i915/gvt/aperture_gm.c struct intel_gvt *gvt = vgpu->gvt; gvt 190 drivers/gpu/drm/i915/gvt/aperture_gm.c struct drm_i915_private *dev_priv = gvt->dev_priv; gvt 230 drivers/gpu/drm/i915/gvt/aperture_gm.c struct intel_gvt *gvt = vgpu->gvt; gvt 232 drivers/gpu/drm/i915/gvt/aperture_gm.c gvt->gm.vgpu_allocated_low_gm_size -= vgpu_aperture_sz(vgpu); gvt 233 drivers/gpu/drm/i915/gvt/aperture_gm.c gvt->gm.vgpu_allocated_high_gm_size -= vgpu_hidden_sz(vgpu); gvt 234 drivers/gpu/drm/i915/gvt/aperture_gm.c gvt->fence.vgpu_allocated_fence_num -= vgpu_fence_sz(vgpu); gvt 240 drivers/gpu/drm/i915/gvt/aperture_gm.c struct intel_gvt *gvt = vgpu->gvt; gvt 250 drivers/gpu/drm/i915/gvt/aperture_gm.c max = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE; gvt 251 drivers/gpu/drm/i915/gvt/aperture_gm.c taken = gvt->gm.vgpu_allocated_low_gm_size; gvt 261 drivers/gpu/drm/i915/gvt/aperture_gm.c max = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE; gvt 262 drivers/gpu/drm/i915/gvt/aperture_gm.c taken = gvt->gm.vgpu_allocated_high_gm_size; gvt 272 drivers/gpu/drm/i915/gvt/aperture_gm.c max = gvt_fence_sz(gvt) - HOST_FENCE; gvt 273 drivers/gpu/drm/i915/gvt/aperture_gm.c taken = gvt->fence.vgpu_allocated_fence_num; gvt 282 drivers/gpu/drm/i915/gvt/aperture_gm.c gvt->gm.vgpu_allocated_low_gm_size += MB_TO_BYTES(param->low_gm_sz); gvt 283 drivers/gpu/drm/i915/gvt/aperture_gm.c gvt->gm.vgpu_allocated_high_gm_size += MB_TO_BYTES(param->high_gm_sz); gvt 284 drivers/gpu/drm/i915/gvt/aperture_gm.c gvt->fence.vgpu_allocated_fence_num += param->fence_sz; gvt 318 drivers/gpu/drm/i915/gvt/aperture_gm.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 112 drivers/gpu/drm/i915/gvt/cfg_space.c if (WARN_ON(offset + bytes > vgpu->gvt->device_info.cfg_space_size)) gvt 305 drivers/gpu/drm/i915/gvt/cfg_space.c if (WARN_ON(offset + bytes > vgpu->gvt->device_info.cfg_space_size)) gvt 361 drivers/gpu/drm/i915/gvt/cfg_space.c struct intel_gvt *gvt = vgpu->gvt; gvt 362 drivers/gpu/drm/i915/gvt/cfg_space.c const struct intel_gvt_device_info *info = &gvt->device_info; gvt 365 drivers/gpu/drm/i915/gvt/cfg_space.c memcpy(vgpu_cfg_space(vgpu), gvt->firmware.cfg_space, gvt 380 drivers/gpu/drm/i915/gvt/cfg_space.c gvt_aperture_pa_base(gvt), true); gvt 394 drivers/gpu/drm/i915/gvt/cfg_space.c pci_resource_len(gvt->dev_priv->drm.pdev, 0); gvt 396 drivers/gpu/drm/i915/gvt/cfg_space.c pci_resource_len(gvt->dev_priv->drm.pdev, 2); gvt 502 drivers/gpu/drm/i915/gvt/cmd_parser.c (s->vgpu->gvt->device_info.gmadr_bytes_in_cmd >> 2) gvt 647 drivers/gpu/drm/i915/gvt/cmd_parser.c static inline const struct cmd_info *find_cmd_entry(struct intel_gvt *gvt, gvt 652 drivers/gpu/drm/i915/gvt/cmd_parser.c hash_for_each_possible(gvt->cmd_table, e, hlist, opcode) { gvt 659 drivers/gpu/drm/i915/gvt/cmd_parser.c static inline const struct cmd_info *get_cmd_info(struct intel_gvt *gvt, gvt 668 drivers/gpu/drm/i915/gvt/cmd_parser.c return find_cmd_entry(gvt, opcode, ring_id); gvt 837 drivers/gpu/drm/i915/gvt/cmd_parser.c struct intel_gvt *gvt = s->vgpu->gvt; gvt 841 drivers/gpu/drm/i915/gvt/cmd_parser.c struct drm_i915_private *dev_priv = s->vgpu->gvt->dev_priv; gvt 854 drivers/gpu/drm/i915/gvt/cmd_parser.c if (!intel_gvt_in_force_nonpriv_whitelist(gvt, data) && gvt 883 drivers/gpu/drm/i915/gvt/cmd_parser.c struct intel_gvt *gvt = vgpu->gvt; gvt 886 drivers/gpu/drm/i915/gvt/cmd_parser.c if (offset + 4 > gvt->device_info.mmio_size) { gvt 892 drivers/gpu/drm/i915/gvt/cmd_parser.c if (!intel_gvt_mmio_is_cmd_access(gvt, offset)) { gvt 927 drivers/gpu/drm/i915/gvt/cmd_parser.c if (IS_GEN(gvt->dev_priv, 9) && gvt 928 drivers/gpu/drm/i915/gvt/cmd_parser.c intel_gvt_mmio_is_in_ctx(gvt, offset) && gvt 936 drivers/gpu/drm/i915/gvt/cmd_parser.c if (intel_gvt_mmio_has_mode_mask(s->vgpu->gvt, offset)) gvt 945 drivers/gpu/drm/i915/gvt/cmd_parser.c intel_gvt_mmio_set_cmd_accessed(gvt, offset); gvt 965 drivers/gpu/drm/i915/gvt/cmd_parser.c struct intel_gvt *gvt = s->vgpu->gvt; gvt 980 drivers/gpu/drm/i915/gvt/cmd_parser.c if (IS_BROADWELL(gvt->dev_priv) && s->ring_id != RCS0) { gvt 1002 drivers/gpu/drm/i915/gvt/cmd_parser.c if (IS_BROADWELL(s->vgpu->gvt->dev_priv)) gvt 1023 drivers/gpu/drm/i915/gvt/cmd_parser.c struct intel_gvt *gvt = s->vgpu->gvt; gvt 1024 drivers/gpu/drm/i915/gvt/cmd_parser.c int gmadr_bytes = gvt->device_info.gmadr_bytes_in_cmd; gvt 1030 drivers/gpu/drm/i915/gvt/cmd_parser.c if (IS_BROADWELL(gvt->dev_priv)) gvt 1052 drivers/gpu/drm/i915/gvt/cmd_parser.c int gmadr_bytes = s->vgpu->gvt->device_info.gmadr_bytes_in_cmd; gvt 1110 drivers/gpu/drm/i915/gvt/cmd_parser.c int gmadr_bytes = s->vgpu->gvt->device_info.gmadr_bytes_in_cmd; gvt 1214 drivers/gpu/drm/i915/gvt/cmd_parser.c struct drm_i915_private *dev_priv = s->vgpu->gvt->dev_priv; gvt 1260 drivers/gpu/drm/i915/gvt/cmd_parser.c struct drm_i915_private *dev_priv = s->vgpu->gvt->dev_priv; gvt 1319 drivers/gpu/drm/i915/gvt/cmd_parser.c struct drm_i915_private *dev_priv = s->vgpu->gvt->dev_priv; gvt 1348 drivers/gpu/drm/i915/gvt/cmd_parser.c struct drm_i915_private *dev_priv = s->vgpu->gvt->dev_priv; gvt 1379 drivers/gpu/drm/i915/gvt/cmd_parser.c struct drm_i915_private *dev_priv = s->vgpu->gvt->dev_priv; gvt 1468 drivers/gpu/drm/i915/gvt/cmd_parser.c int gmadr_bytes = vgpu->gvt->device_info.gmadr_bytes_in_cmd; gvt 1489 drivers/gpu/drm/i915/gvt/cmd_parser.c u32 max_surface_size = vgpu->gvt->device_info.max_surface_size; gvt 1533 drivers/gpu/drm/i915/gvt/cmd_parser.c int gmadr_bytes = s->vgpu->gvt->device_info.gmadr_bytes_in_cmd; gvt 1590 drivers/gpu/drm/i915/gvt/cmd_parser.c int gmadr_bytes = s->vgpu->gvt->device_info.gmadr_bytes_in_cmd; gvt 1640 drivers/gpu/drm/i915/gvt/cmd_parser.c int gmadr_bytes = s->vgpu->gvt->device_info.gmadr_bytes_in_cmd; gvt 1754 drivers/gpu/drm/i915/gvt/cmd_parser.c info = get_cmd_info(s->vgpu->gvt, cmd, s->ring_id); gvt 1766 drivers/gpu/drm/i915/gvt/cmd_parser.c info = get_cmd_info(s->vgpu->gvt, cmd, s->ring_id); gvt 1800 drivers/gpu/drm/i915/gvt/cmd_parser.c info = get_cmd_info(s->vgpu->gvt, cmd, s->ring_id); gvt 1858 drivers/gpu/drm/i915/gvt/cmd_parser.c bb->obj = i915_gem_object_create_shmem(s->vgpu->gvt->dev_priv, gvt 2648 drivers/gpu/drm/i915/gvt/cmd_parser.c static void add_cmd_entry(struct intel_gvt *gvt, struct cmd_entry *e) gvt 2650 drivers/gpu/drm/i915/gvt/cmd_parser.c hash_add(gvt->cmd_table, &e->hlist, e->info->opcode); gvt 2667 drivers/gpu/drm/i915/gvt/cmd_parser.c info = get_cmd_info(s->vgpu->gvt, cmd, s->ring_id); gvt 2941 drivers/gpu/drm/i915/gvt/cmd_parser.c obj = i915_gem_object_create_shmem(workload->vgpu->gvt->dev_priv, gvt 3030 drivers/gpu/drm/i915/gvt/cmd_parser.c static const struct cmd_info *find_cmd_entry_any_ring(struct intel_gvt *gvt, gvt 3037 drivers/gpu/drm/i915/gvt/cmd_parser.c info = find_cmd_entry(gvt, opcode, ring); gvt 3044 drivers/gpu/drm/i915/gvt/cmd_parser.c static int init_cmd_table(struct intel_gvt *gvt) gvt 3051 drivers/gpu/drm/i915/gvt/cmd_parser.c gen_type = intel_gvt_get_device_type(gvt); gvt 3062 drivers/gpu/drm/i915/gvt/cmd_parser.c info = find_cmd_entry_any_ring(gvt, gvt 3074 drivers/gpu/drm/i915/gvt/cmd_parser.c add_cmd_entry(gvt, e); gvt 3082 drivers/gpu/drm/i915/gvt/cmd_parser.c static void clean_cmd_table(struct intel_gvt *gvt) gvt 3088 drivers/gpu/drm/i915/gvt/cmd_parser.c hash_for_each_safe(gvt->cmd_table, i, tmp, e, hlist) gvt 3091 drivers/gpu/drm/i915/gvt/cmd_parser.c hash_init(gvt->cmd_table); gvt 3094 drivers/gpu/drm/i915/gvt/cmd_parser.c void intel_gvt_clean_cmd_parser(struct intel_gvt *gvt) gvt 3096 drivers/gpu/drm/i915/gvt/cmd_parser.c clean_cmd_table(gvt); gvt 3099 drivers/gpu/drm/i915/gvt/cmd_parser.c int intel_gvt_init_cmd_parser(struct intel_gvt *gvt) gvt 3103 drivers/gpu/drm/i915/gvt/cmd_parser.c ret = init_cmd_table(gvt); gvt 3105 drivers/gpu/drm/i915/gvt/cmd_parser.c intel_gvt_clean_cmd_parser(gvt); gvt 41 drivers/gpu/drm/i915/gvt/cmd_parser.h void intel_gvt_clean_cmd_parser(struct intel_gvt *gvt); gvt 43 drivers/gpu/drm/i915/gvt/cmd_parser.h int intel_gvt_init_cmd_parser(struct intel_gvt *gvt); gvt 58 drivers/gpu/drm/i915/gvt/debugfs.c static inline int mmio_diff_handler(struct intel_gvt *gvt, gvt 61 drivers/gpu/drm/i915/gvt/debugfs.c struct drm_i915_private *i915 = gvt->dev_priv; gvt 88 drivers/gpu/drm/i915/gvt/debugfs.c struct intel_gvt *gvt = vgpu->gvt; gvt 98 drivers/gpu/drm/i915/gvt/debugfs.c mutex_lock(&gvt->lock); gvt 99 drivers/gpu/drm/i915/gvt/debugfs.c spin_lock_bh(&gvt->scheduler.mmio_context_lock); gvt 101 drivers/gpu/drm/i915/gvt/debugfs.c mmio_hw_access_pre(gvt->dev_priv); gvt 103 drivers/gpu/drm/i915/gvt/debugfs.c intel_gvt_for_each_tracked_mmio(gvt, mmio_diff_handler, ¶m); gvt 104 drivers/gpu/drm/i915/gvt/debugfs.c mmio_hw_access_post(gvt->dev_priv); gvt 106 drivers/gpu/drm/i915/gvt/debugfs.c spin_unlock_bh(&gvt->scheduler.mmio_context_lock); gvt 107 drivers/gpu/drm/i915/gvt/debugfs.c mutex_unlock(&gvt->lock); gvt 145 drivers/gpu/drm/i915/gvt/debugfs.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 198 drivers/gpu/drm/i915/gvt/debugfs.c vgpu->debugfs = debugfs_create_dir(name, vgpu->gvt->debugfs_root); gvt 221 drivers/gpu/drm/i915/gvt/debugfs.c void intel_gvt_debugfs_init(struct intel_gvt *gvt) gvt 223 drivers/gpu/drm/i915/gvt/debugfs.c struct drm_minor *minor = gvt->dev_priv->drm.primary; gvt 225 drivers/gpu/drm/i915/gvt/debugfs.c gvt->debugfs_root = debugfs_create_dir("gvt", minor->debugfs_root); gvt 227 drivers/gpu/drm/i915/gvt/debugfs.c debugfs_create_ulong("num_tracked_mmio", 0444, gvt->debugfs_root, gvt 228 drivers/gpu/drm/i915/gvt/debugfs.c &gvt->mmio.num_tracked_mmio); gvt 235 drivers/gpu/drm/i915/gvt/debugfs.c void intel_gvt_debugfs_clean(struct intel_gvt *gvt) gvt 237 drivers/gpu/drm/i915/gvt/debugfs.c debugfs_remove_recursive(gvt->debugfs_root); gvt 238 drivers/gpu/drm/i915/gvt/debugfs.c gvt->debugfs_root = NULL; gvt 60 drivers/gpu/drm/i915/gvt/display.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 72 drivers/gpu/drm/i915/gvt/display.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 171 drivers/gpu/drm/i915/gvt/display.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 400 drivers/gpu/drm/i915/gvt/display.c void intel_gvt_check_vblank_emulation(struct intel_gvt *gvt) gvt 402 drivers/gpu/drm/i915/gvt/display.c struct intel_gvt_irq *irq = &gvt->irq; gvt 407 drivers/gpu/drm/i915/gvt/display.c mutex_lock(&gvt->lock); gvt 408 drivers/gpu/drm/i915/gvt/display.c for_each_active_vgpu(gvt, vgpu, id) { gvt 426 drivers/gpu/drm/i915/gvt/display.c mutex_unlock(&gvt->lock); gvt 431 drivers/gpu/drm/i915/gvt/display.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 463 drivers/gpu/drm/i915/gvt/display.c for_each_pipe(vgpu->gvt->dev_priv, pipe) gvt 475 drivers/gpu/drm/i915/gvt/display.c void intel_gvt_emulate_vblank(struct intel_gvt *gvt) gvt 480 drivers/gpu/drm/i915/gvt/display.c mutex_lock(&gvt->lock); gvt 481 drivers/gpu/drm/i915/gvt/display.c for_each_active_vgpu(gvt, vgpu, id) gvt 483 drivers/gpu/drm/i915/gvt/display.c mutex_unlock(&gvt->lock); gvt 496 drivers/gpu/drm/i915/gvt/display.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 526 drivers/gpu/drm/i915/gvt/display.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 548 drivers/gpu/drm/i915/gvt/display.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 200 drivers/gpu/drm/i915/gvt/display.h void intel_gvt_emulate_vblank(struct intel_gvt *gvt); gvt 201 drivers/gpu/drm/i915/gvt/display.h void intel_gvt_check_vblank_emulation(struct intel_gvt *gvt); gvt 363 drivers/gpu/drm/i915/gvt/dmabuf.c struct drm_device *dev = &vgpu->gvt->dev_priv->drm; gvt 469 drivers/gpu/drm/i915/gvt/dmabuf.c struct drm_device *dev = &vgpu->gvt->dev_priv->drm; gvt 138 drivers/gpu/drm/i915/gvt/edid.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 42 drivers/gpu/drm/i915/gvt/execlist.c #define execlist_ring_mmio(gvt, ring_id, offset) \ gvt 43 drivers/gpu/drm/i915/gvt/execlist.c (gvt->dev_priv->engine[ring_id]->mmio_base + (offset)) gvt 97 drivers/gpu/drm/i915/gvt/execlist.c u32 status_reg = execlist_ring_mmio(vgpu->gvt, gvt 136 drivers/gpu/drm/i915/gvt/execlist.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 138 drivers/gpu/drm/i915/gvt/execlist.c ctx_status_ptr_reg = execlist_ring_mmio(vgpu->gvt, ring_id, gvt 140 drivers/gpu/drm/i915/gvt/execlist.c ctx_status_buf_reg = execlist_ring_mmio(vgpu->gvt, ring_id, gvt 265 drivers/gpu/drm/i915/gvt/execlist.c u32 status_reg = execlist_ring_mmio(vgpu->gvt, ring_id, gvt 521 drivers/gpu/drm/i915/gvt/execlist.c ctx_status_ptr_reg = execlist_ring_mmio(vgpu->gvt, ring_id, gvt 532 drivers/gpu/drm/i915/gvt/execlist.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 547 drivers/gpu/drm/i915/gvt/execlist.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 149 drivers/gpu/drm/i915/gvt/fb_decoder.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 206 drivers/gpu/drm/i915/gvt/fb_decoder.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 337 drivers/gpu/drm/i915/gvt/fb_decoder.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 69 drivers/gpu/drm/i915/gvt/firmware.c static int mmio_snapshot_handler(struct intel_gvt *gvt, u32 offset, void *data) gvt 71 drivers/gpu/drm/i915/gvt/firmware.c struct drm_i915_private *i915 = gvt->dev_priv; gvt 78 drivers/gpu/drm/i915/gvt/firmware.c static int expose_firmware_sysfs(struct intel_gvt *gvt) gvt 80 drivers/gpu/drm/i915/gvt/firmware.c struct intel_gvt_device_info *info = &gvt->device_info; gvt 81 drivers/gpu/drm/i915/gvt/firmware.c struct pci_dev *pdev = gvt->dev_priv->drm.pdev; gvt 107 drivers/gpu/drm/i915/gvt/firmware.c memcpy(gvt->firmware.cfg_space, p, info->cfg_space_size); gvt 112 drivers/gpu/drm/i915/gvt/firmware.c intel_gvt_for_each_tracked_mmio(gvt, mmio_snapshot_handler, p); gvt 114 drivers/gpu/drm/i915/gvt/firmware.c memcpy(gvt->firmware.mmio, p, info->mmio_size); gvt 130 drivers/gpu/drm/i915/gvt/firmware.c static void clean_firmware_sysfs(struct intel_gvt *gvt) gvt 132 drivers/gpu/drm/i915/gvt/firmware.c struct pci_dev *pdev = gvt->dev_priv->drm.pdev; gvt 143 drivers/gpu/drm/i915/gvt/firmware.c void intel_gvt_free_firmware(struct intel_gvt *gvt) gvt 145 drivers/gpu/drm/i915/gvt/firmware.c if (!gvt->firmware.firmware_loaded) gvt 146 drivers/gpu/drm/i915/gvt/firmware.c clean_firmware_sysfs(gvt); gvt 148 drivers/gpu/drm/i915/gvt/firmware.c kfree(gvt->firmware.cfg_space); gvt 149 drivers/gpu/drm/i915/gvt/firmware.c kfree(gvt->firmware.mmio); gvt 152 drivers/gpu/drm/i915/gvt/firmware.c static int verify_firmware(struct intel_gvt *gvt, gvt 155 drivers/gpu/drm/i915/gvt/firmware.c struct intel_gvt_device_info *info = &gvt->device_info; gvt 156 drivers/gpu/drm/i915/gvt/firmware.c struct drm_i915_private *dev_priv = gvt->dev_priv; gvt 208 drivers/gpu/drm/i915/gvt/firmware.c int intel_gvt_load_firmware(struct intel_gvt *gvt) gvt 210 drivers/gpu/drm/i915/gvt/firmware.c struct intel_gvt_device_info *info = &gvt->device_info; gvt 211 drivers/gpu/drm/i915/gvt/firmware.c struct drm_i915_private *dev_priv = gvt->dev_priv; gvt 213 drivers/gpu/drm/i915/gvt/firmware.c struct intel_gvt_firmware *firmware = &gvt->firmware; gvt 255 drivers/gpu/drm/i915/gvt/firmware.c ret = verify_firmware(gvt, fw); gvt 275 drivers/gpu/drm/i915/gvt/firmware.c expose_firmware_sysfs(gvt); gvt 90 drivers/gpu/drm/i915/gvt/gtt.c if (WARN(!gvt_gmadr_is_valid(vgpu->gvt, h_addr), gvt 94 drivers/gpu/drm/i915/gvt/gtt.c if (gvt_gmadr_is_aperture(vgpu->gvt, h_addr)) gvt 96 drivers/gpu/drm/i915/gvt/gtt.c + (h_addr - gvt_aperture_gmadr_base(vgpu->gvt)); gvt 99 drivers/gpu/drm/i915/gvt/gtt.c + (h_addr - gvt_hidden_gmadr_base(vgpu->gvt)); gvt 305 drivers/gpu/drm/i915/gvt/gtt.c const struct intel_gvt_device_info *info = &vgpu->gvt->device_info; gvt 318 drivers/gpu/drm/i915/gvt/gtt.c e->val64 = read_pte64(vgpu->gvt->dev_priv, index); gvt 330 drivers/gpu/drm/i915/gvt/gtt.c const struct intel_gvt_device_info *info = &vgpu->gvt->device_info; gvt 343 drivers/gpu/drm/i915/gvt/gtt.c write_pte64(vgpu->gvt->dev_priv, index, e->val64); gvt 553 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops; gvt 580 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops; gvt 602 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops; gvt 614 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops; gvt 625 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops; gvt 635 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *pte_ops = mm->vgpu->gvt->gtt.pte_ops; gvt 651 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt *gvt = spt->vgpu->gvt; gvt 652 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops; gvt 680 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt *gvt = spt->vgpu->gvt; gvt 681 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops; gvt 737 drivers/gpu/drm/i915/gvt/gtt.c struct device *kdev = &spt->vgpu->gvt->dev_priv->drm.pdev->dev; gvt 816 drivers/gpu/drm/i915/gvt/gtt.c static int reclaim_one_ppgtt_mm(struct intel_gvt *gvt); gvt 822 drivers/gpu/drm/i915/gvt/gtt.c struct device *kdev = &vgpu->gvt->dev_priv->drm.pdev->dev; gvt 830 drivers/gpu/drm/i915/gvt/gtt.c if (reclaim_one_ppgtt_mm(vgpu->gvt)) gvt 900 drivers/gpu/drm/i915/gvt/gtt.c ((spt)->vgpu->gvt->device_info.gtt_entry_size_shift) gvt 909 drivers/gpu/drm/i915/gvt/gtt.c spt->vgpu->gvt->gtt.pte_ops->test_present(e)) gvt 915 drivers/gpu/drm/i915/gvt/gtt.c spt->vgpu->gvt->gtt.pte_ops->test_present(e)) gvt 943 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; gvt 978 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; gvt 1047 drivers/gpu/drm/i915/gvt/gtt.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 1066 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; gvt 1130 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *ops = s->vgpu->gvt->gtt.pte_ops; gvt 1153 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; gvt 1156 drivers/gpu/drm/i915/gvt/gtt.c if (!HAS_PAGE_SIZES(vgpu->gvt->dev_priv, I915_GTT_PAGE_SIZE_2M)) gvt 1170 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; gvt 1217 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; gvt 1248 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops; gvt 1301 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt *gvt = vgpu->gvt; gvt 1302 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops; gvt 1324 drivers/gpu/drm/i915/gvt/gtt.c ops->set_pfn(&se, gvt->gtt.scratch_mfn); gvt 1345 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; gvt 1424 drivers/gpu/drm/i915/gvt/gtt.c const struct intel_gvt_device_info *info = &vgpu->gvt->device_info; gvt 1425 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt *gvt = vgpu->gvt; gvt 1426 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops; gvt 1467 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt *gvt = vgpu->gvt; gvt 1478 drivers/gpu/drm/i915/gvt/gtt.c list_move_tail(&oos_page->list, &gvt->gtt.oos_page_free_list_head); gvt 1486 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt *gvt = spt->vgpu->gvt; gvt 1498 drivers/gpu/drm/i915/gvt/gtt.c list_move_tail(&oos_page->list, &gvt->gtt.oos_page_use_list_head); gvt 1523 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt *gvt = spt->vgpu->gvt; gvt 1524 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt *gtt = &gvt->gtt; gvt 1597 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; gvt 1714 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; gvt 1715 drivers/gpu/drm/i915/gvt/gtt.c const struct intel_gvt_device_info *info = &vgpu->gvt->device_info; gvt 1777 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt *gvt = vgpu->gvt; gvt 1778 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt *gtt = &gvt->gtt; gvt 1807 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt *gvt = vgpu->gvt; gvt 1808 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt *gtt = &gvt->gtt; gvt 1881 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt *gvt = vgpu->gvt; gvt 1913 drivers/gpu/drm/i915/gvt/gtt.c mutex_lock(&gvt->gtt.ppgtt_mm_lock); gvt 1914 drivers/gpu/drm/i915/gvt/gtt.c list_add_tail(&mm->ppgtt_mm.lru_list, &gvt->gtt.ppgtt_mm_lru_list_head); gvt 1915 drivers/gpu/drm/i915/gvt/gtt.c mutex_unlock(&gvt->gtt.ppgtt_mm_lock); gvt 1931 drivers/gpu/drm/i915/gvt/gtt.c nr_entries = gvt_ggtt_gm_sz(vgpu->gvt) >> I915_GTT_PAGE_SHIFT; gvt 1934 drivers/gpu/drm/i915/gvt/gtt.c vgpu->gvt->device_info.gtt_entry_size)); gvt 1960 drivers/gpu/drm/i915/gvt/gtt.c mutex_lock(&mm->vgpu->gvt->gtt.ppgtt_mm_lock); gvt 1962 drivers/gpu/drm/i915/gvt/gtt.c mutex_unlock(&mm->vgpu->gvt->gtt.ppgtt_mm_lock); gvt 2005 drivers/gpu/drm/i915/gvt/gtt.c mutex_lock(&mm->vgpu->gvt->gtt.ppgtt_mm_lock); gvt 2007 drivers/gpu/drm/i915/gvt/gtt.c &mm->vgpu->gvt->gtt.ppgtt_mm_lru_list_head); gvt 2008 drivers/gpu/drm/i915/gvt/gtt.c mutex_unlock(&mm->vgpu->gvt->gtt.ppgtt_mm_lock); gvt 2014 drivers/gpu/drm/i915/gvt/gtt.c static int reclaim_one_ppgtt_mm(struct intel_gvt *gvt) gvt 2019 drivers/gpu/drm/i915/gvt/gtt.c mutex_lock(&gvt->gtt.ppgtt_mm_lock); gvt 2021 drivers/gpu/drm/i915/gvt/gtt.c list_for_each_safe(pos, n, &gvt->gtt.ppgtt_mm_lru_list_head) { gvt 2028 drivers/gpu/drm/i915/gvt/gtt.c mutex_unlock(&gvt->gtt.ppgtt_mm_lock); gvt 2032 drivers/gpu/drm/i915/gvt/gtt.c mutex_unlock(&gvt->gtt.ppgtt_mm_lock); gvt 2043 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; gvt 2071 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt *gvt = vgpu->gvt; gvt 2072 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *pte_ops = gvt->gtt.pte_ops; gvt 2073 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_gma_ops *gma_ops = gvt->gtt.gma_ops; gvt 2146 drivers/gpu/drm/i915/gvt/gtt.c const struct intel_gvt_device_info *info = &vgpu->gvt->device_info; gvt 2183 drivers/gpu/drm/i915/gvt/gtt.c const struct intel_gvt_device_info *info = &vgpu->gvt->device_info; gvt 2197 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops; gvt 2201 drivers/gpu/drm/i915/gvt/gtt.c if (pfn != vgpu->gvt->gtt.scratch_mfn) gvt 2209 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt *gvt = vgpu->gvt; gvt 2210 drivers/gpu/drm/i915/gvt/gtt.c const struct intel_gvt_device_info *info = &gvt->device_info; gvt 2212 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops; gvt 2290 drivers/gpu/drm/i915/gvt/gtt.c ops->set_pfn(&m, gvt->gtt.scratch_mfn); gvt 2302 drivers/gpu/drm/i915/gvt/gtt.c ops->set_pfn(&m, gvt->gtt.scratch_mfn); gvt 2306 drivers/gpu/drm/i915/gvt/gtt.c ops->set_pfn(&m, gvt->gtt.scratch_mfn); gvt 2317 drivers/gpu/drm/i915/gvt/gtt.c ggtt_invalidate(gvt->dev_priv); gvt 2336 drivers/gpu/drm/i915/gvt/gtt.c const struct intel_gvt_device_info *info = &vgpu->gvt->device_info; gvt 2351 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; gvt 2353 drivers/gpu/drm/i915/gvt/gtt.c vgpu->gvt->device_info.gtt_entry_size_shift; gvt 2356 drivers/gpu/drm/i915/gvt/gtt.c struct device *dev = &vgpu->gvt->dev_priv->drm.pdev->dev; gvt 2413 drivers/gpu/drm/i915/gvt/gtt.c struct device *dev = &vgpu->gvt->dev_priv->drm.pdev->dev; gvt 2531 drivers/gpu/drm/i915/gvt/gtt.c static void clean_spt_oos(struct intel_gvt *gvt) gvt 2533 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt *gtt = &gvt->gtt; gvt 2548 drivers/gpu/drm/i915/gvt/gtt.c static int setup_spt_oos(struct intel_gvt *gvt) gvt 2550 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt *gtt = &gvt->gtt; gvt 2581 drivers/gpu/drm/i915/gvt/gtt.c clean_spt_oos(gvt); gvt 2681 drivers/gpu/drm/i915/gvt/gtt.c int intel_gvt_init_gtt(struct intel_gvt *gvt) gvt 2685 drivers/gpu/drm/i915/gvt/gtt.c struct device *dev = &gvt->dev_priv->drm.pdev->dev; gvt 2690 drivers/gpu/drm/i915/gvt/gtt.c gvt->gtt.pte_ops = &gen8_gtt_pte_ops; gvt 2691 drivers/gpu/drm/i915/gvt/gtt.c gvt->gtt.gma_ops = &gen8_gtt_gma_ops; gvt 2707 drivers/gpu/drm/i915/gvt/gtt.c gvt->gtt.scratch_page = virt_to_page(page); gvt 2708 drivers/gpu/drm/i915/gvt/gtt.c gvt->gtt.scratch_mfn = (unsigned long)(daddr >> I915_GTT_PAGE_SHIFT); gvt 2711 drivers/gpu/drm/i915/gvt/gtt.c ret = setup_spt_oos(gvt); gvt 2715 drivers/gpu/drm/i915/gvt/gtt.c __free_page(gvt->gtt.scratch_page); gvt 2719 drivers/gpu/drm/i915/gvt/gtt.c INIT_LIST_HEAD(&gvt->gtt.ppgtt_mm_lru_list_head); gvt 2720 drivers/gpu/drm/i915/gvt/gtt.c mutex_init(&gvt->gtt.ppgtt_mm_lock); gvt 2732 drivers/gpu/drm/i915/gvt/gtt.c void intel_gvt_clean_gtt(struct intel_gvt *gvt) gvt 2734 drivers/gpu/drm/i915/gvt/gtt.c struct device *dev = &gvt->dev_priv->drm.pdev->dev; gvt 2735 drivers/gpu/drm/i915/gvt/gtt.c dma_addr_t daddr = (dma_addr_t)(gvt->gtt.scratch_mfn << gvt 2740 drivers/gpu/drm/i915/gvt/gtt.c __free_page(gvt->gtt.scratch_page); gvt 2743 drivers/gpu/drm/i915/gvt/gtt.c clean_spt_oos(gvt); gvt 2761 drivers/gpu/drm/i915/gvt/gtt.c mutex_lock(&vgpu->gvt->gtt.ppgtt_mm_lock); gvt 2763 drivers/gpu/drm/i915/gvt/gtt.c mutex_unlock(&vgpu->gvt->gtt.ppgtt_mm_lock); gvt 2781 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt *gvt = vgpu->gvt; gvt 2782 drivers/gpu/drm/i915/gvt/gtt.c struct drm_i915_private *dev_priv = gvt->dev_priv; gvt 2783 drivers/gpu/drm/i915/gvt/gtt.c struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops; gvt 2789 drivers/gpu/drm/i915/gvt/gtt.c pte_ops->set_pfn(&entry, gvt->gtt.scratch_mfn); gvt 213 drivers/gpu/drm/i915/gvt/gtt.h int intel_gvt_init_gtt(struct intel_gvt *gvt); gvt 215 drivers/gpu/drm/i915/gvt/gtt.h void intel_gvt_clean_gtt(struct intel_gvt *gvt); gvt 49 drivers/gpu/drm/i915/gvt/gvt.c static struct intel_vgpu_type *intel_gvt_find_vgpu_type(struct intel_gvt *gvt, gvt 55 drivers/gpu/drm/i915/gvt/gvt.c &gvt->dev_priv->drm.pdev->dev); gvt 57 drivers/gpu/drm/i915/gvt/gvt.c for (i = 0; i < gvt->num_types; i++) { gvt 58 drivers/gpu/drm/i915/gvt/gvt.c t = &gvt->types[i]; gvt 72 drivers/gpu/drm/i915/gvt/gvt.c void *gvt = kdev_to_i915(dev)->gvt; gvt 74 drivers/gpu/drm/i915/gvt/gvt.c type = intel_gvt_find_vgpu_type(gvt, kobject_name(kobj)); gvt 93 drivers/gpu/drm/i915/gvt/gvt.c void *gvt = kdev_to_i915(dev)->gvt; gvt 95 drivers/gpu/drm/i915/gvt/gvt.c type = intel_gvt_find_vgpu_type(gvt, kobject_name(kobj)); gvt 131 drivers/gpu/drm/i915/gvt/gvt.c static bool intel_gvt_init_vgpu_type_groups(struct intel_gvt *gvt) gvt 137 drivers/gpu/drm/i915/gvt/gvt.c for (i = 0; i < gvt->num_types; i++) { gvt 138 drivers/gpu/drm/i915/gvt/gvt.c type = &gvt->types[i]; gvt 160 drivers/gpu/drm/i915/gvt/gvt.c static void intel_gvt_cleanup_vgpu_type_groups(struct intel_gvt *gvt) gvt 165 drivers/gpu/drm/i915/gvt/gvt.c for (i = 0; i < gvt->num_types; i++) { gvt 191 drivers/gpu/drm/i915/gvt/gvt.c static void init_device_info(struct intel_gvt *gvt) gvt 193 drivers/gpu/drm/i915/gvt/gvt.c struct intel_gvt_device_info *info = &gvt->device_info; gvt 194 drivers/gpu/drm/i915/gvt/gvt.c struct pci_dev *pdev = gvt->dev_priv->drm.pdev; gvt 210 drivers/gpu/drm/i915/gvt/gvt.c struct intel_gvt *gvt = (struct intel_gvt *)data; gvt 216 drivers/gpu/drm/i915/gvt/gvt.c ret = wait_event_interruptible(gvt->service_thread_wq, gvt 217 drivers/gpu/drm/i915/gvt/gvt.c kthread_should_stop() || gvt->service_request); gvt 226 drivers/gpu/drm/i915/gvt/gvt.c (void *)&gvt->service_request)) gvt 227 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_emulate_vblank(gvt); gvt 230 drivers/gpu/drm/i915/gvt/gvt.c (void *)&gvt->service_request) || gvt 232 drivers/gpu/drm/i915/gvt/gvt.c (void *)&gvt->service_request)) { gvt 233 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_schedule(gvt); gvt 240 drivers/gpu/drm/i915/gvt/gvt.c static void clean_service_thread(struct intel_gvt *gvt) gvt 242 drivers/gpu/drm/i915/gvt/gvt.c kthread_stop(gvt->service_thread); gvt 245 drivers/gpu/drm/i915/gvt/gvt.c static int init_service_thread(struct intel_gvt *gvt) gvt 247 drivers/gpu/drm/i915/gvt/gvt.c init_waitqueue_head(&gvt->service_thread_wq); gvt 249 drivers/gpu/drm/i915/gvt/gvt.c gvt->service_thread = kthread_run(gvt_service_thread, gvt 250 drivers/gpu/drm/i915/gvt/gvt.c gvt, "gvt_service_thread"); gvt 251 drivers/gpu/drm/i915/gvt/gvt.c if (IS_ERR(gvt->service_thread)) { gvt 253 drivers/gpu/drm/i915/gvt/gvt.c return PTR_ERR(gvt->service_thread); gvt 268 drivers/gpu/drm/i915/gvt/gvt.c struct intel_gvt *gvt = to_gvt(dev_priv); gvt 270 drivers/gpu/drm/i915/gvt/gvt.c if (WARN_ON(!gvt)) gvt 273 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_destroy_idle_vgpu(gvt->idle_vgpu); gvt 274 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_cleanup_vgpu_type_groups(gvt); gvt 275 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_clean_vgpu_types(gvt); gvt 277 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_debugfs_clean(gvt); gvt 278 drivers/gpu/drm/i915/gvt/gvt.c clean_service_thread(gvt); gvt 279 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_clean_cmd_parser(gvt); gvt 280 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_clean_sched_policy(gvt); gvt 281 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_clean_workload_scheduler(gvt); gvt 282 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_clean_gtt(gvt); gvt 283 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_clean_irq(gvt); gvt 284 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_free_firmware(gvt); gvt 285 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_clean_mmio_info(gvt); gvt 286 drivers/gpu/drm/i915/gvt/gvt.c idr_destroy(&gvt->vgpu_idr); gvt 288 drivers/gpu/drm/i915/gvt/gvt.c kfree(dev_priv->gvt); gvt 289 drivers/gpu/drm/i915/gvt/gvt.c dev_priv->gvt = NULL; gvt 305 drivers/gpu/drm/i915/gvt/gvt.c struct intel_gvt *gvt; gvt 309 drivers/gpu/drm/i915/gvt/gvt.c if (WARN_ON(dev_priv->gvt)) gvt 312 drivers/gpu/drm/i915/gvt/gvt.c gvt = kzalloc(sizeof(struct intel_gvt), GFP_KERNEL); gvt 313 drivers/gpu/drm/i915/gvt/gvt.c if (!gvt) gvt 318 drivers/gpu/drm/i915/gvt/gvt.c idr_init(&gvt->vgpu_idr); gvt 319 drivers/gpu/drm/i915/gvt/gvt.c spin_lock_init(&gvt->scheduler.mmio_context_lock); gvt 320 drivers/gpu/drm/i915/gvt/gvt.c mutex_init(&gvt->lock); gvt 321 drivers/gpu/drm/i915/gvt/gvt.c mutex_init(&gvt->sched_lock); gvt 322 drivers/gpu/drm/i915/gvt/gvt.c gvt->dev_priv = dev_priv; gvt 324 drivers/gpu/drm/i915/gvt/gvt.c init_device_info(gvt); gvt 326 drivers/gpu/drm/i915/gvt/gvt.c ret = intel_gvt_setup_mmio_info(gvt); gvt 330 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_init_engine_mmio_context(gvt); gvt 332 drivers/gpu/drm/i915/gvt/gvt.c ret = intel_gvt_load_firmware(gvt); gvt 336 drivers/gpu/drm/i915/gvt/gvt.c ret = intel_gvt_init_irq(gvt); gvt 340 drivers/gpu/drm/i915/gvt/gvt.c ret = intel_gvt_init_gtt(gvt); gvt 344 drivers/gpu/drm/i915/gvt/gvt.c ret = intel_gvt_init_workload_scheduler(gvt); gvt 348 drivers/gpu/drm/i915/gvt/gvt.c ret = intel_gvt_init_sched_policy(gvt); gvt 352 drivers/gpu/drm/i915/gvt/gvt.c ret = intel_gvt_init_cmd_parser(gvt); gvt 356 drivers/gpu/drm/i915/gvt/gvt.c ret = init_service_thread(gvt); gvt 360 drivers/gpu/drm/i915/gvt/gvt.c ret = intel_gvt_init_vgpu_types(gvt); gvt 364 drivers/gpu/drm/i915/gvt/gvt.c ret = intel_gvt_init_vgpu_type_groups(gvt); gvt 370 drivers/gpu/drm/i915/gvt/gvt.c vgpu = intel_gvt_create_idle_vgpu(gvt); gvt 376 drivers/gpu/drm/i915/gvt/gvt.c gvt->idle_vgpu = vgpu; gvt 378 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_debugfs_init(gvt); gvt 381 drivers/gpu/drm/i915/gvt/gvt.c dev_priv->gvt = gvt; gvt 387 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_clean_vgpu_types(gvt); gvt 389 drivers/gpu/drm/i915/gvt/gvt.c clean_service_thread(gvt); gvt 391 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_clean_cmd_parser(gvt); gvt 393 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_clean_sched_policy(gvt); gvt 395 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_clean_workload_scheduler(gvt); gvt 397 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_clean_gtt(gvt); gvt 399 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_clean_irq(gvt); gvt 401 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_free_firmware(gvt); gvt 403 drivers/gpu/drm/i915/gvt/gvt.c intel_gvt_clean_mmio_info(gvt); gvt 405 drivers/gpu/drm/i915/gvt/gvt.c idr_destroy(&gvt->vgpu_idr); gvt 406 drivers/gpu/drm/i915/gvt/gvt.c kfree(gvt); gvt 414 drivers/gpu/drm/i915/gvt/gvt.c void *gvt; gvt 429 drivers/gpu/drm/i915/gvt/gvt.c gvt = (void *)kdev_to_i915(intel_gvt_host.dev)->gvt; gvt 431 drivers/gpu/drm/i915/gvt/gvt.c ret = intel_gvt_hypervisor_host_init(intel_gvt_host.dev, gvt, gvt 169 drivers/gpu/drm/i915/gvt/gvt.h struct intel_gvt *gvt; gvt 348 drivers/gpu/drm/i915/gvt/gvt.h return i915->gvt; gvt 361 drivers/gpu/drm/i915/gvt/gvt.h static inline void intel_gvt_request_service(struct intel_gvt *gvt, gvt 364 drivers/gpu/drm/i915/gvt/gvt.h set_bit(service, (void *)&gvt->service_request); gvt 365 drivers/gpu/drm/i915/gvt/gvt.h wake_up(&gvt->service_thread_wq); gvt 368 drivers/gpu/drm/i915/gvt/gvt.h void intel_gvt_free_firmware(struct intel_gvt *gvt); gvt 369 drivers/gpu/drm/i915/gvt/gvt.h int intel_gvt_load_firmware(struct intel_gvt *gvt); gvt 380 drivers/gpu/drm/i915/gvt/gvt.h #define gvt_aperture_sz(gvt) (gvt->dev_priv->ggtt.mappable_end) gvt 381 drivers/gpu/drm/i915/gvt/gvt.h #define gvt_aperture_pa_base(gvt) (gvt->dev_priv->ggtt.gmadr.start) gvt 383 drivers/gpu/drm/i915/gvt/gvt.h #define gvt_ggtt_gm_sz(gvt) (gvt->dev_priv->ggtt.vm.total) gvt 384 drivers/gpu/drm/i915/gvt/gvt.h #define gvt_ggtt_sz(gvt) \ gvt 385 drivers/gpu/drm/i915/gvt/gvt.h ((gvt->dev_priv->ggtt.vm.total >> PAGE_SHIFT) << 3) gvt 386 drivers/gpu/drm/i915/gvt/gvt.h #define gvt_hidden_sz(gvt) (gvt_ggtt_gm_sz(gvt) - gvt_aperture_sz(gvt)) gvt 388 drivers/gpu/drm/i915/gvt/gvt.h #define gvt_aperture_gmadr_base(gvt) (0) gvt 389 drivers/gpu/drm/i915/gvt/gvt.h #define gvt_aperture_gmadr_end(gvt) (gvt_aperture_gmadr_base(gvt) \ gvt 390 drivers/gpu/drm/i915/gvt/gvt.h + gvt_aperture_sz(gvt) - 1) gvt 392 drivers/gpu/drm/i915/gvt/gvt.h #define gvt_hidden_gmadr_base(gvt) (gvt_aperture_gmadr_base(gvt) \ gvt 393 drivers/gpu/drm/i915/gvt/gvt.h + gvt_aperture_sz(gvt)) gvt 394 drivers/gpu/drm/i915/gvt/gvt.h #define gvt_hidden_gmadr_end(gvt) (gvt_hidden_gmadr_base(gvt) \ gvt 395 drivers/gpu/drm/i915/gvt/gvt.h + gvt_hidden_sz(gvt) - 1) gvt 397 drivers/gpu/drm/i915/gvt/gvt.h #define gvt_fence_sz(gvt) ((gvt)->dev_priv->ggtt.num_fences) gvt 406 drivers/gpu/drm/i915/gvt/gvt.h (gvt_aperture_pa_base(vgpu->gvt) + vgpu_aperture_offset(vgpu)) gvt 454 drivers/gpu/drm/i915/gvt/gvt.h #define for_each_active_vgpu(gvt, vgpu, id) \ gvt 455 drivers/gpu/drm/i915/gvt/gvt.h idr_for_each_entry((&(gvt)->vgpu_idr), (vgpu), (id)) \ gvt 478 drivers/gpu/drm/i915/gvt/gvt.h int intel_gvt_init_vgpu_types(struct intel_gvt *gvt); gvt 479 drivers/gpu/drm/i915/gvt/gvt.h void intel_gvt_clean_vgpu_types(struct intel_gvt *gvt); gvt 481 drivers/gpu/drm/i915/gvt/gvt.h struct intel_vgpu *intel_gvt_create_idle_vgpu(struct intel_gvt *gvt); gvt 483 drivers/gpu/drm/i915/gvt/gvt.h struct intel_vgpu *intel_gvt_create_vgpu(struct intel_gvt *gvt, gvt 506 drivers/gpu/drm/i915/gvt/gvt.h #define gvt_gmadr_is_aperture(gvt, gmadr) \ gvt 507 drivers/gpu/drm/i915/gvt/gvt.h ((gmadr >= gvt_aperture_gmadr_base(gvt)) && \ gvt 508 drivers/gpu/drm/i915/gvt/gvt.h (gmadr <= gvt_aperture_gmadr_end(gvt))) gvt 510 drivers/gpu/drm/i915/gvt/gvt.h #define gvt_gmadr_is_hidden(gvt, gmadr) \ gvt 511 drivers/gpu/drm/i915/gvt/gvt.h ((gmadr >= gvt_hidden_gmadr_base(gvt)) && \ gvt 512 drivers/gpu/drm/i915/gvt/gvt.h (gmadr <= gvt_hidden_gmadr_end(gvt))) gvt 514 drivers/gpu/drm/i915/gvt/gvt.h #define gvt_gmadr_is_valid(gvt, gmadr) \ gvt 515 drivers/gpu/drm/i915/gvt/gvt.h (gvt_gmadr_is_aperture(gvt, gmadr) || \ gvt 516 drivers/gpu/drm/i915/gvt/gvt.h gvt_gmadr_is_hidden(gvt, gmadr)) gvt 571 drivers/gpu/drm/i915/gvt/gvt.h struct intel_vgpu_type *(*gvt_find_vgpu_type)(struct intel_gvt *gvt, gvt 606 drivers/gpu/drm/i915/gvt/gvt.h struct intel_gvt *gvt, unsigned int offset) gvt 608 drivers/gpu/drm/i915/gvt/gvt.h gvt->mmio.mmio_attribute[offset >> 2] |= F_ACCESSED; gvt 618 drivers/gpu/drm/i915/gvt/gvt.h struct intel_gvt *gvt, unsigned int offset) gvt 620 drivers/gpu/drm/i915/gvt/gvt.h return gvt->mmio.mmio_attribute[offset >> 2] & F_CMD_ACCESS; gvt 630 drivers/gpu/drm/i915/gvt/gvt.h struct intel_gvt *gvt, unsigned int offset) gvt 632 drivers/gpu/drm/i915/gvt/gvt.h return gvt->mmio.mmio_attribute[offset >> 2] & F_UNALIGN; gvt 642 drivers/gpu/drm/i915/gvt/gvt.h struct intel_gvt *gvt, unsigned int offset) gvt 644 drivers/gpu/drm/i915/gvt/gvt.h gvt->mmio.mmio_attribute[offset >> 2] |= F_CMD_ACCESSED; gvt 657 drivers/gpu/drm/i915/gvt/gvt.h struct intel_gvt *gvt, unsigned int offset) gvt 659 drivers/gpu/drm/i915/gvt/gvt.h return gvt->mmio.mmio_attribute[offset >> 2] & F_MODE_MASK; gvt 672 drivers/gpu/drm/i915/gvt/gvt.h struct intel_gvt *gvt, unsigned int offset) gvt 674 drivers/gpu/drm/i915/gvt/gvt.h return gvt->mmio.mmio_attribute[offset >> 2] & F_IN_CTX; gvt 684 drivers/gpu/drm/i915/gvt/gvt.h struct intel_gvt *gvt, unsigned int offset) gvt 686 drivers/gpu/drm/i915/gvt/gvt.h gvt->mmio.mmio_attribute[offset >> 2] |= F_IN_CTX; gvt 691 drivers/gpu/drm/i915/gvt/gvt.h void intel_gvt_debugfs_init(struct intel_gvt *gvt); gvt 692 drivers/gpu/drm/i915/gvt/gvt.h void intel_gvt_debugfs_clean(struct intel_gvt *gvt); gvt 50 drivers/gpu/drm/i915/gvt/handlers.c unsigned long intel_gvt_get_device_type(struct intel_gvt *gvt) gvt 52 drivers/gpu/drm/i915/gvt/handlers.c if (IS_BROADWELL(gvt->dev_priv)) gvt 54 drivers/gpu/drm/i915/gvt/handlers.c else if (IS_SKYLAKE(gvt->dev_priv)) gvt 56 drivers/gpu/drm/i915/gvt/handlers.c else if (IS_KABYLAKE(gvt->dev_priv)) gvt 58 drivers/gpu/drm/i915/gvt/handlers.c else if (IS_BROXTON(gvt->dev_priv)) gvt 60 drivers/gpu/drm/i915/gvt/handlers.c else if (IS_COFFEELAKE(gvt->dev_priv)) gvt 66 drivers/gpu/drm/i915/gvt/handlers.c bool intel_gvt_match_device(struct intel_gvt *gvt, gvt 69 drivers/gpu/drm/i915/gvt/handlers.c return intel_gvt_get_device_type(gvt) & device; gvt 84 drivers/gpu/drm/i915/gvt/handlers.c static struct intel_gvt_mmio_info *find_mmio_info(struct intel_gvt *gvt, gvt 89 drivers/gpu/drm/i915/gvt/handlers.c hash_for_each_possible(gvt->mmio.mmio_info_table, e, node, offset) { gvt 96 drivers/gpu/drm/i915/gvt/handlers.c static int new_mmio_info(struct intel_gvt *gvt, gvt 104 drivers/gpu/drm/i915/gvt/handlers.c if (!intel_gvt_match_device(gvt, device)) gvt 119 drivers/gpu/drm/i915/gvt/handlers.c p = find_mmio_info(gvt, info->offset); gvt 136 drivers/gpu/drm/i915/gvt/handlers.c gvt->mmio.mmio_attribute[info->offset / 4] = flags; gvt 138 drivers/gpu/drm/i915/gvt/handlers.c hash_add(gvt->mmio.mmio_info_table, &info->node, info->offset); gvt 139 drivers/gpu/drm/i915/gvt/handlers.c gvt->mmio.num_tracked_mmio++; gvt 152 drivers/gpu/drm/i915/gvt/handlers.c int intel_gvt_render_mmio_to_ring_id(struct intel_gvt *gvt, gvt 159 drivers/gpu/drm/i915/gvt/handlers.c for_each_engine(engine, gvt->dev_priv, id) { gvt 220 drivers/gpu/drm/i915/gvt/handlers.c if (INTEL_GEN(vgpu->gvt->dev_priv) <= 10) { gvt 256 drivers/gpu/drm/i915/gvt/handlers.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 286 drivers/gpu/drm/i915/gvt/handlers.c if (INTEL_GEN(vgpu->gvt->dev_priv) >= 9) { gvt 344 drivers/gpu/drm/i915/gvt/handlers.c engine_mask &= INTEL_INFO(vgpu->gvt->dev_priv)->engine_mask; gvt 454 drivers/gpu/drm/i915/gvt/handlers.c intel_gvt_check_vblank_emulation(vgpu->gvt); gvt 512 drivers/gpu/drm/i915/gvt/handlers.c int ring_id = intel_gvt_render_mmio_to_ring_id(vgpu->gvt, offset); gvt 514 drivers/gpu/drm/i915/gvt/handlers.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 754 drivers/gpu/drm/i915/gvt/handlers.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 795 drivers/gpu/drm/i915/gvt/handlers.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 819 drivers/gpu/drm/i915/gvt/handlers.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 919 drivers/gpu/drm/i915/gvt/handlers.c if ((INTEL_GEN(vgpu->gvt->dev_priv) >= 9) gvt 923 drivers/gpu/drm/i915/gvt/handlers.c } else if (IS_BROADWELL(vgpu->gvt->dev_priv) && gvt 1239 drivers/gpu/drm/i915/gvt/handlers.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 1422 drivers/gpu/drm/i915/gvt/handlers.c if (IS_SKYLAKE(vgpu->gvt->dev_priv) gvt 1423 drivers/gpu/drm/i915/gvt/handlers.c || IS_KABYLAKE(vgpu->gvt->dev_priv) gvt 1424 drivers/gpu/drm/i915/gvt/handlers.c || IS_COFFEELAKE(vgpu->gvt->dev_priv)) { gvt 1434 drivers/gpu/drm/i915/gvt/handlers.c } else if (IS_BROXTON(vgpu->gvt->dev_priv)) { gvt 1447 drivers/gpu/drm/i915/gvt/handlers.c if (IS_SKYLAKE(vgpu->gvt->dev_priv) gvt 1448 drivers/gpu/drm/i915/gvt/handlers.c || IS_KABYLAKE(vgpu->gvt->dev_priv) gvt 1449 drivers/gpu/drm/i915/gvt/handlers.c || IS_COFFEELAKE(vgpu->gvt->dev_priv)) gvt 1473 drivers/gpu/drm/i915/gvt/handlers.c int ring_id = intel_gvt_render_mmio_to_ring_id(vgpu->gvt, offset); gvt 1502 drivers/gpu/drm/i915/gvt/handlers.c if (IS_BROXTON(vgpu->gvt->dev_priv)) gvt 1638 drivers/gpu/drm/i915/gvt/handlers.c struct intel_gvt *gvt = vgpu->gvt; gvt 1639 drivers/gpu/drm/i915/gvt/handlers.c struct drm_i915_private *dev_priv = gvt->dev_priv; gvt 1643 drivers/gpu/drm/i915/gvt/handlers.c ring_id = intel_gvt_render_mmio_to_ring_id(gvt, offset); gvt 1653 drivers/gpu/drm/i915/gvt/handlers.c if (ring_id < 0 || vgpu == gvt->scheduler.engine_owner[ring_id] || gvt 1667 drivers/gpu/drm/i915/gvt/handlers.c int ring_id = intel_gvt_render_mmio_to_ring_id(vgpu->gvt, offset); gvt 1694 drivers/gpu/drm/i915/gvt/handlers.c int ring_id = intel_gvt_render_mmio_to_ring_id(vgpu->gvt, offset); gvt 1699 drivers/gpu/drm/i915/gvt/handlers.c if (IS_COFFEELAKE(vgpu->gvt->dev_priv)) gvt 1708 drivers/gpu/drm/i915/gvt/handlers.c if (IS_COFFEELAKE(vgpu->gvt->dev_priv) && gvt 1811 drivers/gpu/drm/i915/gvt/handlers.c ret = new_mmio_info(gvt, i915_mmio_reg_offset(reg), \ gvt 1859 drivers/gpu/drm/i915/gvt/handlers.c static int init_generic_mmio_info(struct intel_gvt *gvt) gvt 1861 drivers/gpu/drm/i915/gvt/handlers.c struct drm_i915_private *dev_priv = gvt->dev_priv; gvt 2674 drivers/gpu/drm/i915/gvt/handlers.c static int init_broadwell_mmio_info(struct intel_gvt *gvt) gvt 2676 drivers/gpu/drm/i915/gvt/handlers.c struct drm_i915_private *dev_priv = gvt->dev_priv; gvt 2863 drivers/gpu/drm/i915/gvt/handlers.c static int init_skl_mmio_info(struct intel_gvt *gvt) gvt 2865 drivers/gpu/drm/i915/gvt/handlers.c struct drm_i915_private *dev_priv = gvt->dev_priv; gvt 3112 drivers/gpu/drm/i915/gvt/handlers.c static int init_bxt_mmio_info(struct intel_gvt *gvt) gvt 3114 drivers/gpu/drm/i915/gvt/handlers.c struct drm_i915_private *dev_priv = gvt->dev_priv; gvt 3287 drivers/gpu/drm/i915/gvt/handlers.c static struct gvt_mmio_block *find_mmio_block(struct intel_gvt *gvt, gvt 3290 drivers/gpu/drm/i915/gvt/handlers.c unsigned long device = intel_gvt_get_device_type(gvt); gvt 3291 drivers/gpu/drm/i915/gvt/handlers.c struct gvt_mmio_block *block = gvt->mmio.mmio_block; gvt 3292 drivers/gpu/drm/i915/gvt/handlers.c int num = gvt->mmio.num_mmio_block; gvt 3313 drivers/gpu/drm/i915/gvt/handlers.c void intel_gvt_clean_mmio_info(struct intel_gvt *gvt) gvt 3319 drivers/gpu/drm/i915/gvt/handlers.c hash_for_each_safe(gvt->mmio.mmio_info_table, i, tmp, e, node) gvt 3322 drivers/gpu/drm/i915/gvt/handlers.c vfree(gvt->mmio.mmio_attribute); gvt 3323 drivers/gpu/drm/i915/gvt/handlers.c gvt->mmio.mmio_attribute = NULL; gvt 3347 drivers/gpu/drm/i915/gvt/handlers.c int intel_gvt_setup_mmio_info(struct intel_gvt *gvt) gvt 3349 drivers/gpu/drm/i915/gvt/handlers.c struct intel_gvt_device_info *info = &gvt->device_info; gvt 3350 drivers/gpu/drm/i915/gvt/handlers.c struct drm_i915_private *dev_priv = gvt->dev_priv; gvt 3351 drivers/gpu/drm/i915/gvt/handlers.c int size = info->mmio_size / 4 * sizeof(*gvt->mmio.mmio_attribute); gvt 3354 drivers/gpu/drm/i915/gvt/handlers.c gvt->mmio.mmio_attribute = vzalloc(size); gvt 3355 drivers/gpu/drm/i915/gvt/handlers.c if (!gvt->mmio.mmio_attribute) gvt 3358 drivers/gpu/drm/i915/gvt/handlers.c ret = init_generic_mmio_info(gvt); gvt 3363 drivers/gpu/drm/i915/gvt/handlers.c ret = init_broadwell_mmio_info(gvt); gvt 3369 drivers/gpu/drm/i915/gvt/handlers.c ret = init_broadwell_mmio_info(gvt); gvt 3372 drivers/gpu/drm/i915/gvt/handlers.c ret = init_skl_mmio_info(gvt); gvt 3376 drivers/gpu/drm/i915/gvt/handlers.c ret = init_broadwell_mmio_info(gvt); gvt 3379 drivers/gpu/drm/i915/gvt/handlers.c ret = init_skl_mmio_info(gvt); gvt 3382 drivers/gpu/drm/i915/gvt/handlers.c ret = init_bxt_mmio_info(gvt); gvt 3387 drivers/gpu/drm/i915/gvt/handlers.c gvt->mmio.mmio_block = mmio_blocks; gvt 3388 drivers/gpu/drm/i915/gvt/handlers.c gvt->mmio.num_mmio_block = ARRAY_SIZE(mmio_blocks); gvt 3392 drivers/gpu/drm/i915/gvt/handlers.c intel_gvt_clean_mmio_info(gvt); gvt 3405 drivers/gpu/drm/i915/gvt/handlers.c int intel_gvt_for_each_tracked_mmio(struct intel_gvt *gvt, gvt 3406 drivers/gpu/drm/i915/gvt/handlers.c int (*handler)(struct intel_gvt *gvt, u32 offset, void *data), gvt 3409 drivers/gpu/drm/i915/gvt/handlers.c struct gvt_mmio_block *block = gvt->mmio.mmio_block; gvt 3413 drivers/gpu/drm/i915/gvt/handlers.c hash_for_each(gvt->mmio.mmio_info_table, i, e, node) { gvt 3414 drivers/gpu/drm/i915/gvt/handlers.c ret = handler(gvt, e->offset, data); gvt 3419 drivers/gpu/drm/i915/gvt/handlers.c for (i = 0; i < gvt->mmio.num_mmio_block; i++, block++) { gvt 3421 drivers/gpu/drm/i915/gvt/handlers.c ret = handler(gvt, gvt 3500 drivers/gpu/drm/i915/gvt/handlers.c bool intel_gvt_in_force_nonpriv_whitelist(struct intel_gvt *gvt, gvt 3520 drivers/gpu/drm/i915/gvt/handlers.c struct intel_gvt *gvt = vgpu->gvt; gvt 3532 drivers/gpu/drm/i915/gvt/handlers.c mmio_block = find_mmio_block(gvt, offset); gvt 3543 drivers/gpu/drm/i915/gvt/handlers.c mmio_info = find_mmio_info(gvt, offset); gvt 3556 drivers/gpu/drm/i915/gvt/handlers.c if (intel_gvt_mmio_has_mode_mask(gvt, mmio_info->offset)) { gvt 3574 drivers/gpu/drm/i915/gvt/handlers.c if (intel_gvt_mmio_has_mode_mask(gvt, mmio_info->offset)) { gvt 47 drivers/gpu/drm/i915/gvt/hypercall.h int (*host_init)(struct device *dev, void *gvt, const void *ops); gvt 147 drivers/gpu/drm/i915/gvt/interrupt.c struct intel_gvt *gvt, gvt 150 drivers/gpu/drm/i915/gvt/interrupt.c struct intel_gvt_irq *irq = &gvt->irq; gvt 178 drivers/gpu/drm/i915/gvt/interrupt.c struct intel_gvt *gvt = vgpu->gvt; gvt 179 drivers/gpu/drm/i915/gvt/interrupt.c struct intel_gvt_irq_ops *ops = gvt->irq.ops; gvt 208 drivers/gpu/drm/i915/gvt/interrupt.c struct intel_gvt *gvt = vgpu->gvt; gvt 209 drivers/gpu/drm/i915/gvt/interrupt.c struct intel_gvt_irq_ops *ops = gvt->irq.ops; gvt 247 drivers/gpu/drm/i915/gvt/interrupt.c struct intel_gvt *gvt = vgpu->gvt; gvt 248 drivers/gpu/drm/i915/gvt/interrupt.c struct intel_gvt_irq_ops *ops = gvt->irq.ops; gvt 257 drivers/gpu/drm/i915/gvt/interrupt.c info = regbase_to_irq_info(gvt, ier_to_regbase(reg)); gvt 285 drivers/gpu/drm/i915/gvt/interrupt.c struct intel_gvt_irq_info *info = regbase_to_irq_info(vgpu->gvt, gvt 322 drivers/gpu/drm/i915/gvt/interrupt.c struct intel_gvt_irq *irq = &vgpu->gvt->irq; gvt 466 drivers/gpu/drm/i915/gvt/interrupt.c struct intel_gvt_irq *irq = &vgpu->gvt->irq; gvt 494 drivers/gpu/drm/i915/gvt/interrupt.c struct intel_gvt *gvt = irq_to_gvt(irq); gvt 539 drivers/gpu/drm/i915/gvt/interrupt.c if (HAS_ENGINE(gvt->dev_priv, VCS1)) { gvt 571 drivers/gpu/drm/i915/gvt/interrupt.c if (IS_BROADWELL(gvt->dev_priv)) { gvt 584 drivers/gpu/drm/i915/gvt/interrupt.c } else if (INTEL_GEN(gvt->dev_priv) >= 9) { gvt 621 drivers/gpu/drm/i915/gvt/interrupt.c struct intel_gvt *gvt = vgpu->gvt; gvt 622 drivers/gpu/drm/i915/gvt/interrupt.c struct intel_gvt_irq *irq = &gvt->irq; gvt 624 drivers/gpu/drm/i915/gvt/interrupt.c struct intel_gvt_irq_ops *ops = gvt->irq.ops; gvt 649 drivers/gpu/drm/i915/gvt/interrupt.c struct intel_gvt *gvt; gvt 653 drivers/gpu/drm/i915/gvt/interrupt.c gvt = container_of(irq, struct intel_gvt, irq); gvt 655 drivers/gpu/drm/i915/gvt/interrupt.c intel_gvt_request_service(gvt, INTEL_GVT_REQUEST_EMULATE_VBLANK); gvt 668 drivers/gpu/drm/i915/gvt/interrupt.c void intel_gvt_clean_irq(struct intel_gvt *gvt) gvt 670 drivers/gpu/drm/i915/gvt/interrupt.c struct intel_gvt_irq *irq = &gvt->irq; gvt 687 drivers/gpu/drm/i915/gvt/interrupt.c int intel_gvt_init_irq(struct intel_gvt *gvt) gvt 689 drivers/gpu/drm/i915/gvt/interrupt.c struct intel_gvt_irq *irq = &gvt->irq; gvt 214 drivers/gpu/drm/i915/gvt/interrupt.h int intel_gvt_init_irq(struct intel_gvt *gvt); gvt 215 drivers/gpu/drm/i915/gvt/interrupt.h void intel_gvt_clean_irq(struct intel_gvt *gvt); gvt 190 drivers/gpu/drm/i915/gvt/kvmgt.c struct device *dev = &vgpu->gvt->dev_priv->drm.pdev->dev; gvt 213 drivers/gpu/drm/i915/gvt/kvmgt.c struct device *dev = &vgpu->gvt->dev_priv->drm.pdev->dev; gvt 651 drivers/gpu/drm/i915/gvt/kvmgt.c void *gvt; gvt 655 drivers/gpu/drm/i915/gvt/kvmgt.c gvt = kdev_to_i915(pdev)->gvt; gvt 657 drivers/gpu/drm/i915/gvt/kvmgt.c type = intel_gvt_ops->gvt_find_vgpu_type(gvt, kobject_name(kobj)); gvt 665 drivers/gpu/drm/i915/gvt/kvmgt.c vgpu = intel_gvt_ops->vgpu_create(gvt, type); gvt 916 drivers/gpu/drm/i915/gvt/kvmgt.c aperture_va = io_mapping_map_wc(&vgpu->gvt->dev_priv->ggtt.iomap, gvt 985 drivers/gpu/drm/i915/gvt/kvmgt.c struct intel_gvt *gvt = vgpu->gvt; gvt 995 drivers/gpu/drm/i915/gvt/kvmgt.c return (offset >= gvt->device_info.gtt_start_offset && gvt 996 drivers/gpu/drm/i915/gvt/kvmgt.c offset < gvt->device_info.gtt_start_offset + gvt_ggtt_sz(gvt)) ? gvt 1178 drivers/gpu/drm/i915/gvt/kvmgt.c pgoff = (gvt_aperture_pa_base(vgpu->gvt) >> PAGE_SHIFT) + pgoff; gvt 1323 drivers/gpu/drm/i915/gvt/kvmgt.c info.size = vgpu->gvt->device_info.cfg_space_size; gvt 1349 drivers/gpu/drm/i915/gvt/kvmgt.c info.size = gvt_aperture_sz(vgpu->gvt); gvt 1615 drivers/gpu/drm/i915/gvt/kvmgt.c static int kvmgt_host_init(struct device *dev, void *gvt, const void *ops) gvt 1742 drivers/gpu/drm/i915/gvt/kvmgt.c mutex_lock(&vgpu->gvt->lock); gvt 1743 drivers/gpu/drm/i915/gvt/kvmgt.c for_each_active_vgpu(vgpu->gvt, itr, id) { gvt 1754 drivers/gpu/drm/i915/gvt/kvmgt.c mutex_unlock(&vgpu->gvt->lock); gvt 53 drivers/gpu/drm/i915/gvt/mmio.c #define reg_is_mmio(gvt, reg) \ gvt 54 drivers/gpu/drm/i915/gvt/mmio.c (reg >= 0 && reg < gvt->device_info.mmio_size) gvt 56 drivers/gpu/drm/i915/gvt/mmio.c #define reg_is_gtt(gvt, reg) \ gvt 57 drivers/gpu/drm/i915/gvt/mmio.c (reg >= gvt->device_info.gtt_start_offset \ gvt 58 drivers/gpu/drm/i915/gvt/mmio.c && reg < gvt->device_info.gtt_start_offset + gvt_ggtt_sz(gvt)) gvt 63 drivers/gpu/drm/i915/gvt/mmio.c struct intel_gvt *gvt = NULL; gvt 70 drivers/gpu/drm/i915/gvt/mmio.c gvt = vgpu->gvt; gvt 73 drivers/gpu/drm/i915/gvt/mmio.c if (reg_is_mmio(gvt, offset)) { gvt 80 drivers/gpu/drm/i915/gvt/mmio.c } else if (reg_is_gtt(gvt, offset)) { gvt 81 drivers/gpu/drm/i915/gvt/mmio.c offset -= gvt->device_info.gtt_start_offset; gvt 105 drivers/gpu/drm/i915/gvt/mmio.c struct intel_gvt *gvt = vgpu->gvt; gvt 120 drivers/gpu/drm/i915/gvt/mmio.c if (reg_is_gtt(gvt, offset)) { gvt 125 drivers/gpu/drm/i915/gvt/mmio.c if (WARN_ON(!reg_is_gtt(gvt, offset + bytes - 1))) gvt 135 drivers/gpu/drm/i915/gvt/mmio.c if (WARN_ON_ONCE(!reg_is_mmio(gvt, offset))) { gvt 140 drivers/gpu/drm/i915/gvt/mmio.c if (WARN_ON(!reg_is_mmio(gvt, offset + bytes - 1))) gvt 143 drivers/gpu/drm/i915/gvt/mmio.c if (!intel_gvt_mmio_is_unalign(gvt, offset)) { gvt 152 drivers/gpu/drm/i915/gvt/mmio.c intel_gvt_mmio_set_accessed(gvt, offset); gvt 177 drivers/gpu/drm/i915/gvt/mmio.c struct intel_gvt *gvt = vgpu->gvt; gvt 193 drivers/gpu/drm/i915/gvt/mmio.c if (reg_is_gtt(gvt, offset)) { gvt 198 drivers/gpu/drm/i915/gvt/mmio.c if (WARN_ON(!reg_is_gtt(gvt, offset + bytes - 1))) gvt 208 drivers/gpu/drm/i915/gvt/mmio.c if (WARN_ON_ONCE(!reg_is_mmio(gvt, offset))) { gvt 217 drivers/gpu/drm/i915/gvt/mmio.c intel_gvt_mmio_set_accessed(gvt, offset); gvt 236 drivers/gpu/drm/i915/gvt/mmio.c struct intel_gvt *gvt = vgpu->gvt; gvt 237 drivers/gpu/drm/i915/gvt/mmio.c const struct intel_gvt_device_info *info = &gvt->device_info; gvt 238 drivers/gpu/drm/i915/gvt/mmio.c void *mmio = gvt->firmware.mmio; gvt 248 drivers/gpu/drm/i915/gvt/mmio.c if (IS_BROXTON(vgpu->gvt->dev_priv)) { gvt 295 drivers/gpu/drm/i915/gvt/mmio.c const struct intel_gvt_device_info *info = &vgpu->gvt->device_info; gvt 70 drivers/gpu/drm/i915/gvt/mmio.h int intel_gvt_render_mmio_to_ring_id(struct intel_gvt *gvt, gvt 72 drivers/gpu/drm/i915/gvt/mmio.h unsigned long intel_gvt_get_device_type(struct intel_gvt *gvt); gvt 73 drivers/gpu/drm/i915/gvt/mmio.h bool intel_gvt_match_device(struct intel_gvt *gvt, unsigned long device); gvt 75 drivers/gpu/drm/i915/gvt/mmio.h int intel_gvt_setup_mmio_info(struct intel_gvt *gvt); gvt 76 drivers/gpu/drm/i915/gvt/mmio.h void intel_gvt_clean_mmio_info(struct intel_gvt *gvt); gvt 77 drivers/gpu/drm/i915/gvt/mmio.h int intel_gvt_for_each_tracked_mmio(struct intel_gvt *gvt, gvt 78 drivers/gpu/drm/i915/gvt/mmio.h int (*handler)(struct intel_gvt *gvt, u32 offset, void *data), gvt 97 drivers/gpu/drm/i915/gvt/mmio.h bool intel_gvt_in_force_nonpriv_whitelist(struct intel_gvt *gvt, gvt 161 drivers/gpu/drm/i915/gvt/mmio_context.c struct intel_gvt *gvt = dev_priv->gvt; gvt 163 drivers/gpu/drm/i915/gvt/mmio_context.c u32 cnt = gvt->engine_mmio_list.mocs_mmio_offset_list_cnt; gvt 164 drivers/gpu/drm/i915/gvt/mmio_context.c u32 *regs = gvt->engine_mmio_list.mocs_mmio_offset_list; gvt 198 drivers/gpu/drm/i915/gvt/mmio_context.c struct intel_gvt *gvt = vgpu->gvt; gvt 200 drivers/gpu/drm/i915/gvt/mmio_context.c int count = gvt->engine_mmio_list.ctx_mmio_count[ring_id]; gvt 214 drivers/gpu/drm/i915/gvt/mmio_context.c for (mmio = gvt->engine_mmio_list.mmio; gvt 348 drivers/gpu/drm/i915/gvt/mmio_context.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 351 drivers/gpu/drm/i915/gvt/mmio_context.c u32 *regs = vgpu->gvt->engine_mmio_list.tlb_mmio_offset_list; gvt 352 drivers/gpu/drm/i915/gvt/mmio_context.c u32 cnt = vgpu->gvt->engine_mmio_list.tlb_mmio_offset_list_cnt; gvt 407 drivers/gpu/drm/i915/gvt/mmio_context.c dev_priv = pre ? pre->gvt->dev_priv : next->gvt->dev_priv; gvt 476 drivers/gpu/drm/i915/gvt/mmio_context.c dev_priv = pre ? pre->gvt->dev_priv : next->gvt->dev_priv; gvt 480 drivers/gpu/drm/i915/gvt/mmio_context.c for (mmio = dev_priv->gvt->engine_mmio_list.mmio; gvt 561 drivers/gpu/drm/i915/gvt/mmio_context.c dev_priv = pre ? pre->gvt->dev_priv : next->gvt->dev_priv; gvt 578 drivers/gpu/drm/i915/gvt/mmio_context.c void intel_gvt_init_engine_mmio_context(struct intel_gvt *gvt) gvt 582 drivers/gpu/drm/i915/gvt/mmio_context.c if (INTEL_GEN(gvt->dev_priv) >= 9) { gvt 583 drivers/gpu/drm/i915/gvt/mmio_context.c gvt->engine_mmio_list.mmio = gen9_engine_mmio_list; gvt 584 drivers/gpu/drm/i915/gvt/mmio_context.c gvt->engine_mmio_list.tlb_mmio_offset_list = gen8_tlb_mmio_offset_list; gvt 585 drivers/gpu/drm/i915/gvt/mmio_context.c gvt->engine_mmio_list.tlb_mmio_offset_list_cnt = ARRAY_SIZE(gen8_tlb_mmio_offset_list); gvt 586 drivers/gpu/drm/i915/gvt/mmio_context.c gvt->engine_mmio_list.mocs_mmio_offset_list = gen9_mocs_mmio_offset_list; gvt 587 drivers/gpu/drm/i915/gvt/mmio_context.c gvt->engine_mmio_list.mocs_mmio_offset_list_cnt = ARRAY_SIZE(gen9_mocs_mmio_offset_list); gvt 589 drivers/gpu/drm/i915/gvt/mmio_context.c gvt->engine_mmio_list.mmio = gen8_engine_mmio_list; gvt 590 drivers/gpu/drm/i915/gvt/mmio_context.c gvt->engine_mmio_list.tlb_mmio_offset_list = gen8_tlb_mmio_offset_list; gvt 591 drivers/gpu/drm/i915/gvt/mmio_context.c gvt->engine_mmio_list.tlb_mmio_offset_list_cnt = ARRAY_SIZE(gen8_tlb_mmio_offset_list); gvt 594 drivers/gpu/drm/i915/gvt/mmio_context.c for (mmio = gvt->engine_mmio_list.mmio; gvt 597 drivers/gpu/drm/i915/gvt/mmio_context.c gvt->engine_mmio_list.ctx_mmio_count[mmio->ring_id]++; gvt 598 drivers/gpu/drm/i915/gvt/mmio_context.c intel_gvt_mmio_set_in_ctx(gvt, mmio->reg.reg); gvt 50 drivers/gpu/drm/i915/gvt/mmio_context.h void intel_gvt_init_engine_mmio_context(struct intel_gvt *gvt); gvt 53 drivers/gpu/drm/i915/gvt/mpt.h void *gvt, const void *ops) gvt 58 drivers/gpu/drm/i915/gvt/mpt.h return intel_gvt_host.mpt->host_init(dev, gvt, ops); gvt 118 drivers/gpu/drm/i915/gvt/mpt.h unsigned long offset = vgpu->gvt->device_info.msi_cap_offset; gvt 42 drivers/gpu/drm/i915/gvt/sched_policy.c for_each_engine(engine, vgpu->gvt->dev_priv, i) { gvt 68 drivers/gpu/drm/i915/gvt/sched_policy.c struct intel_gvt *gvt; gvt 80 drivers/gpu/drm/i915/gvt/sched_policy.c if (!vgpu || vgpu == vgpu->gvt->idle_vgpu) gvt 132 drivers/gpu/drm/i915/gvt/sched_policy.c static void try_to_schedule_next_vgpu(struct intel_gvt *gvt) gvt 134 drivers/gpu/drm/i915/gvt/sched_policy.c struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler; gvt 155 drivers/gpu/drm/i915/gvt/sched_policy.c for_each_engine(engine, gvt->dev_priv, i) { gvt 172 drivers/gpu/drm/i915/gvt/sched_policy.c for_each_engine(engine, gvt->dev_priv, i) gvt 213 drivers/gpu/drm/i915/gvt/sched_policy.c struct intel_gvt *gvt = sched_data->gvt; gvt 214 drivers/gpu/drm/i915/gvt/sched_policy.c struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler; gvt 233 drivers/gpu/drm/i915/gvt/sched_policy.c scheduler->next_vgpu = gvt->idle_vgpu; gvt 237 drivers/gpu/drm/i915/gvt/sched_policy.c try_to_schedule_next_vgpu(gvt); gvt 240 drivers/gpu/drm/i915/gvt/sched_policy.c void intel_gvt_schedule(struct intel_gvt *gvt) gvt 242 drivers/gpu/drm/i915/gvt/sched_policy.c struct gvt_sched_data *sched_data = gvt->scheduler.sched_data; gvt 245 drivers/gpu/drm/i915/gvt/sched_policy.c mutex_lock(&gvt->sched_lock); gvt 249 drivers/gpu/drm/i915/gvt/sched_policy.c (void *)&gvt->service_request)) { gvt 256 drivers/gpu/drm/i915/gvt/sched_policy.c clear_bit(INTEL_GVT_REQUEST_EVENT_SCHED, (void *)&gvt->service_request); gvt 258 drivers/gpu/drm/i915/gvt/sched_policy.c vgpu_update_timeslice(gvt->scheduler.current_vgpu, cur_time); gvt 261 drivers/gpu/drm/i915/gvt/sched_policy.c mutex_unlock(&gvt->sched_lock); gvt 270 drivers/gpu/drm/i915/gvt/sched_policy.c intel_gvt_request_service(data->gvt, INTEL_GVT_REQUEST_SCHED); gvt 277 drivers/gpu/drm/i915/gvt/sched_policy.c static int tbs_sched_init(struct intel_gvt *gvt) gvt 280 drivers/gpu/drm/i915/gvt/sched_policy.c &gvt->scheduler; gvt 292 drivers/gpu/drm/i915/gvt/sched_policy.c data->gvt = gvt; gvt 299 drivers/gpu/drm/i915/gvt/sched_policy.c static void tbs_sched_clean(struct intel_gvt *gvt) gvt 302 drivers/gpu/drm/i915/gvt/sched_policy.c &gvt->scheduler; gvt 330 drivers/gpu/drm/i915/gvt/sched_policy.c struct intel_gvt *gvt = vgpu->gvt; gvt 331 drivers/gpu/drm/i915/gvt/sched_policy.c struct gvt_sched_data *sched_data = gvt->scheduler.sched_data; gvt 337 drivers/gpu/drm/i915/gvt/sched_policy.c if (idr_is_empty(&gvt->vgpu_idr)) gvt 343 drivers/gpu/drm/i915/gvt/sched_policy.c struct gvt_sched_data *sched_data = vgpu->gvt->scheduler.sched_data; gvt 380 drivers/gpu/drm/i915/gvt/sched_policy.c int intel_gvt_init_sched_policy(struct intel_gvt *gvt) gvt 384 drivers/gpu/drm/i915/gvt/sched_policy.c mutex_lock(&gvt->sched_lock); gvt 385 drivers/gpu/drm/i915/gvt/sched_policy.c gvt->scheduler.sched_ops = &tbs_schedule_ops; gvt 386 drivers/gpu/drm/i915/gvt/sched_policy.c ret = gvt->scheduler.sched_ops->init(gvt); gvt 387 drivers/gpu/drm/i915/gvt/sched_policy.c mutex_unlock(&gvt->sched_lock); gvt 392 drivers/gpu/drm/i915/gvt/sched_policy.c void intel_gvt_clean_sched_policy(struct intel_gvt *gvt) gvt 394 drivers/gpu/drm/i915/gvt/sched_policy.c mutex_lock(&gvt->sched_lock); gvt 395 drivers/gpu/drm/i915/gvt/sched_policy.c gvt->scheduler.sched_ops->clean(gvt); gvt 396 drivers/gpu/drm/i915/gvt/sched_policy.c mutex_unlock(&gvt->sched_lock); gvt 410 drivers/gpu/drm/i915/gvt/sched_policy.c mutex_lock(&vgpu->gvt->sched_lock); gvt 411 drivers/gpu/drm/i915/gvt/sched_policy.c ret = vgpu->gvt->scheduler.sched_ops->init_vgpu(vgpu); gvt 412 drivers/gpu/drm/i915/gvt/sched_policy.c mutex_unlock(&vgpu->gvt->sched_lock); gvt 419 drivers/gpu/drm/i915/gvt/sched_policy.c mutex_lock(&vgpu->gvt->sched_lock); gvt 420 drivers/gpu/drm/i915/gvt/sched_policy.c vgpu->gvt->scheduler.sched_ops->clean_vgpu(vgpu); gvt 421 drivers/gpu/drm/i915/gvt/sched_policy.c mutex_unlock(&vgpu->gvt->sched_lock); gvt 428 drivers/gpu/drm/i915/gvt/sched_policy.c mutex_lock(&vgpu->gvt->sched_lock); gvt 431 drivers/gpu/drm/i915/gvt/sched_policy.c vgpu->gvt->scheduler.sched_ops->start_schedule(vgpu); gvt 433 drivers/gpu/drm/i915/gvt/sched_policy.c mutex_unlock(&vgpu->gvt->sched_lock); gvt 436 drivers/gpu/drm/i915/gvt/sched_policy.c void intel_gvt_kick_schedule(struct intel_gvt *gvt) gvt 438 drivers/gpu/drm/i915/gvt/sched_policy.c mutex_lock(&gvt->sched_lock); gvt 439 drivers/gpu/drm/i915/gvt/sched_policy.c intel_gvt_request_service(gvt, INTEL_GVT_REQUEST_EVENT_SCHED); gvt 440 drivers/gpu/drm/i915/gvt/sched_policy.c mutex_unlock(&gvt->sched_lock); gvt 446 drivers/gpu/drm/i915/gvt/sched_policy.c &vgpu->gvt->scheduler; gvt 449 drivers/gpu/drm/i915/gvt/sched_policy.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 456 drivers/gpu/drm/i915/gvt/sched_policy.c mutex_lock(&vgpu->gvt->sched_lock); gvt 478 drivers/gpu/drm/i915/gvt/sched_policy.c mutex_unlock(&vgpu->gvt->sched_lock); gvt 38 drivers/gpu/drm/i915/gvt/sched_policy.h int (*init)(struct intel_gvt *gvt); gvt 39 drivers/gpu/drm/i915/gvt/sched_policy.h void (*clean)(struct intel_gvt *gvt); gvt 46 drivers/gpu/drm/i915/gvt/sched_policy.h void intel_gvt_schedule(struct intel_gvt *gvt); gvt 48 drivers/gpu/drm/i915/gvt/sched_policy.h int intel_gvt_init_sched_policy(struct intel_gvt *gvt); gvt 50 drivers/gpu/drm/i915/gvt/sched_policy.h void intel_gvt_clean_sched_policy(struct intel_gvt *gvt); gvt 60 drivers/gpu/drm/i915/gvt/sched_policy.h void intel_gvt_kick_schedule(struct intel_gvt *gvt); gvt 86 drivers/gpu/drm/i915/gvt/scheduler.c struct drm_i915_private *dev_priv = workload->vgpu->gvt->dev_priv; gvt 129 drivers/gpu/drm/i915/gvt/scheduler.c struct intel_gvt *gvt = vgpu->gvt; gvt 180 drivers/gpu/drm/i915/gvt/scheduler.c context_page_num = gvt->dev_priv->engine[ring_id]->context_size; gvt 184 drivers/gpu/drm/i915/gvt/scheduler.c if (IS_BROADWELL(gvt->dev_priv) && ring_id == RCS0) gvt 214 drivers/gpu/drm/i915/gvt/scheduler.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 230 drivers/gpu/drm/i915/gvt/scheduler.c struct intel_gvt *gvt = container_of(nb, struct intel_gvt, gvt 232 drivers/gpu/drm/i915/gvt/scheduler.c struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler; gvt 392 drivers/gpu/drm/i915/gvt/scheduler.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 422 drivers/gpu/drm/i915/gvt/scheduler.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 455 drivers/gpu/drm/i915/gvt/scheduler.c struct intel_gvt *gvt = workload->vgpu->gvt; gvt 456 drivers/gpu/drm/i915/gvt/scheduler.c const int gmadr_bytes = gvt->device_info.gmadr_bytes_in_cmd; gvt 578 drivers/gpu/drm/i915/gvt/scheduler.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 588 drivers/gpu/drm/i915/gvt/scheduler.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 692 drivers/gpu/drm/i915/gvt/scheduler.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 742 drivers/gpu/drm/i915/gvt/scheduler.c struct intel_gvt *gvt, int ring_id) gvt 744 drivers/gpu/drm/i915/gvt/scheduler.c struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler; gvt 747 drivers/gpu/drm/i915/gvt/scheduler.c mutex_lock(&gvt->sched_lock); gvt 794 drivers/gpu/drm/i915/gvt/scheduler.c mutex_unlock(&gvt->sched_lock); gvt 802 drivers/gpu/drm/i915/gvt/scheduler.c struct intel_gvt *gvt = vgpu->gvt; gvt 809 drivers/gpu/drm/i915/gvt/scheduler.c struct drm_i915_private *dev_priv = gvt->dev_priv; gvt 837 drivers/gpu/drm/i915/gvt/scheduler.c if (IS_BROADWELL(gvt->dev_priv) && rq->engine->id == RCS0) gvt 888 drivers/gpu/drm/i915/gvt/scheduler.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 904 drivers/gpu/drm/i915/gvt/scheduler.c static void complete_current_workload(struct intel_gvt *gvt, int ring_id) gvt 906 drivers/gpu/drm/i915/gvt/scheduler.c struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler; gvt 915 drivers/gpu/drm/i915/gvt/scheduler.c mutex_lock(&gvt->sched_lock); gvt 978 drivers/gpu/drm/i915/gvt/scheduler.c if (gvt->scheduler.need_reschedule) gvt 979 drivers/gpu/drm/i915/gvt/scheduler.c intel_gvt_request_service(gvt, INTEL_GVT_REQUEST_EVENT_SCHED); gvt 981 drivers/gpu/drm/i915/gvt/scheduler.c mutex_unlock(&gvt->sched_lock); gvt 986 drivers/gpu/drm/i915/gvt/scheduler.c struct intel_gvt *gvt; gvt 993 drivers/gpu/drm/i915/gvt/scheduler.c struct intel_gvt *gvt = p->gvt; gvt 995 drivers/gpu/drm/i915/gvt/scheduler.c struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler; gvt 999 drivers/gpu/drm/i915/gvt/scheduler.c bool need_force_wake = (INTEL_GEN(gvt->dev_priv) >= 9); gvt 1001 drivers/gpu/drm/i915/gvt/scheduler.c struct intel_runtime_pm *rpm = &gvt->dev_priv->runtime_pm; gvt 1010 drivers/gpu/drm/i915/gvt/scheduler.c workload = pick_next_workload(gvt, ring_id); gvt 1031 drivers/gpu/drm/i915/gvt/scheduler.c intel_uncore_forcewake_get(&gvt->dev_priv->uncore, gvt 1057 drivers/gpu/drm/i915/gvt/scheduler.c complete_current_workload(gvt, ring_id); gvt 1060 drivers/gpu/drm/i915/gvt/scheduler.c intel_uncore_forcewake_put(&gvt->dev_priv->uncore, gvt 1073 drivers/gpu/drm/i915/gvt/scheduler.c struct intel_gvt *gvt = vgpu->gvt; gvt 1074 drivers/gpu/drm/i915/gvt/scheduler.c struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler; gvt 1084 drivers/gpu/drm/i915/gvt/scheduler.c void intel_gvt_clean_workload_scheduler(struct intel_gvt *gvt) gvt 1086 drivers/gpu/drm/i915/gvt/scheduler.c struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler; gvt 1092 drivers/gpu/drm/i915/gvt/scheduler.c for_each_engine(engine, gvt->dev_priv, i) { gvt 1095 drivers/gpu/drm/i915/gvt/scheduler.c &gvt->shadow_ctx_notifier_block[i]); gvt 1100 drivers/gpu/drm/i915/gvt/scheduler.c int intel_gvt_init_workload_scheduler(struct intel_gvt *gvt) gvt 1102 drivers/gpu/drm/i915/gvt/scheduler.c struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler; gvt 1112 drivers/gpu/drm/i915/gvt/scheduler.c for_each_engine(engine, gvt->dev_priv, i) { gvt 1121 drivers/gpu/drm/i915/gvt/scheduler.c param->gvt = gvt; gvt 1132 drivers/gpu/drm/i915/gvt/scheduler.c gvt->shadow_ctx_notifier_block[i].notifier_call = gvt 1135 drivers/gpu/drm/i915/gvt/scheduler.c &gvt->shadow_ctx_notifier_block[i]); gvt 1139 drivers/gpu/drm/i915/gvt/scheduler.c intel_gvt_clean_workload_scheduler(gvt); gvt 1179 drivers/gpu/drm/i915/gvt/scheduler.c for_each_engine(engine, vgpu->gvt->dev_priv, id) gvt 1236 drivers/gpu/drm/i915/gvt/scheduler.c struct drm_i915_private *i915 = vgpu->gvt->dev_priv; gvt 1483 drivers/gpu/drm/i915/gvt/scheduler.c struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; gvt 1628 drivers/gpu/drm/i915/gvt/scheduler.c intel_gvt_kick_schedule(workload->vgpu->gvt); gvt 1629 drivers/gpu/drm/i915/gvt/scheduler.c wake_up(&workload->vgpu->gvt->scheduler.waitq[workload->ring_id]); gvt 137 drivers/gpu/drm/i915/gvt/scheduler.h int intel_gvt_init_workload_scheduler(struct intel_gvt *gvt); gvt 139 drivers/gpu/drm/i915/gvt/scheduler.h void intel_gvt_clean_workload_scheduler(struct intel_gvt *gvt); gvt 40 drivers/gpu/drm/i915/gvt/trace.h #define TRACE_SYSTEM gvt gvt 106 drivers/gpu/drm/i915/gvt/vgpu.c int intel_gvt_init_vgpu_types(struct intel_gvt *gvt) gvt 124 drivers/gpu/drm/i915/gvt/vgpu.c low_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE; gvt 125 drivers/gpu/drm/i915/gvt/vgpu.c high_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE; gvt 128 drivers/gpu/drm/i915/gvt/vgpu.c gvt->types = kcalloc(num_types, sizeof(struct intel_vgpu_type), gvt 130 drivers/gpu/drm/i915/gvt/vgpu.c if (!gvt->types) gvt 138 drivers/gpu/drm/i915/gvt/vgpu.c gvt->types[i].low_gm_size = vgpu_types[i].low_mm; gvt 139 drivers/gpu/drm/i915/gvt/vgpu.c gvt->types[i].high_gm_size = vgpu_types[i].high_mm; gvt 140 drivers/gpu/drm/i915/gvt/vgpu.c gvt->types[i].fence = vgpu_types[i].fence; gvt 146 drivers/gpu/drm/i915/gvt/vgpu.c gvt->types[i].weight = vgpu_types[i].weight; gvt 147 drivers/gpu/drm/i915/gvt/vgpu.c gvt->types[i].resolution = vgpu_types[i].edid; gvt 148 drivers/gpu/drm/i915/gvt/vgpu.c gvt->types[i].avail_instance = min(low_avail / vgpu_types[i].low_mm, gvt 151 drivers/gpu/drm/i915/gvt/vgpu.c if (IS_GEN(gvt->dev_priv, 8)) gvt 152 drivers/gpu/drm/i915/gvt/vgpu.c sprintf(gvt->types[i].name, "GVTg_V4_%s", gvt 154 drivers/gpu/drm/i915/gvt/vgpu.c else if (IS_GEN(gvt->dev_priv, 9)) gvt 155 drivers/gpu/drm/i915/gvt/vgpu.c sprintf(gvt->types[i].name, "GVTg_V5_%s", gvt 159 drivers/gpu/drm/i915/gvt/vgpu.c i, gvt->types[i].name, gvt 160 drivers/gpu/drm/i915/gvt/vgpu.c gvt->types[i].avail_instance, gvt 161 drivers/gpu/drm/i915/gvt/vgpu.c gvt->types[i].low_gm_size, gvt 162 drivers/gpu/drm/i915/gvt/vgpu.c gvt->types[i].high_gm_size, gvt->types[i].fence, gvt 163 drivers/gpu/drm/i915/gvt/vgpu.c gvt->types[i].weight, gvt 164 drivers/gpu/drm/i915/gvt/vgpu.c vgpu_edid_str(gvt->types[i].resolution)); gvt 167 drivers/gpu/drm/i915/gvt/vgpu.c gvt->num_types = i; gvt 171 drivers/gpu/drm/i915/gvt/vgpu.c void intel_gvt_clean_vgpu_types(struct intel_gvt *gvt) gvt 173 drivers/gpu/drm/i915/gvt/vgpu.c kfree(gvt->types); gvt 176 drivers/gpu/drm/i915/gvt/vgpu.c static void intel_gvt_update_vgpu_types(struct intel_gvt *gvt) gvt 185 drivers/gpu/drm/i915/gvt/vgpu.c low_gm_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE - gvt 186 drivers/gpu/drm/i915/gvt/vgpu.c gvt->gm.vgpu_allocated_low_gm_size; gvt 187 drivers/gpu/drm/i915/gvt/vgpu.c high_gm_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE - gvt 188 drivers/gpu/drm/i915/gvt/vgpu.c gvt->gm.vgpu_allocated_high_gm_size; gvt 189 drivers/gpu/drm/i915/gvt/vgpu.c fence_avail = gvt_fence_sz(gvt) - HOST_FENCE - gvt 190 drivers/gpu/drm/i915/gvt/vgpu.c gvt->fence.vgpu_allocated_fence_num; gvt 192 drivers/gpu/drm/i915/gvt/vgpu.c for (i = 0; i < gvt->num_types; i++) { gvt 193 drivers/gpu/drm/i915/gvt/vgpu.c low_gm_min = low_gm_avail / gvt->types[i].low_gm_size; gvt 194 drivers/gpu/drm/i915/gvt/vgpu.c high_gm_min = high_gm_avail / gvt->types[i].high_gm_size; gvt 195 drivers/gpu/drm/i915/gvt/vgpu.c fence_min = fence_avail / gvt->types[i].fence; gvt 196 drivers/gpu/drm/i915/gvt/vgpu.c gvt->types[i].avail_instance = min(min(low_gm_min, high_gm_min), gvt 200 drivers/gpu/drm/i915/gvt/vgpu.c i, gvt->types[i].name, gvt 201 drivers/gpu/drm/i915/gvt/vgpu.c gvt->types[i].avail_instance, gvt->types[i].low_gm_size, gvt 202 drivers/gpu/drm/i915/gvt/vgpu.c gvt->types[i].high_gm_size, gvt->types[i].fence); gvt 215 drivers/gpu/drm/i915/gvt/vgpu.c mutex_lock(&vgpu->gvt->lock); gvt 217 drivers/gpu/drm/i915/gvt/vgpu.c mutex_unlock(&vgpu->gvt->lock); gvt 273 drivers/gpu/drm/i915/gvt/vgpu.c struct intel_gvt *gvt = vgpu->gvt; gvt 281 drivers/gpu/drm/i915/gvt/vgpu.c mutex_lock(&gvt->lock); gvt 282 drivers/gpu/drm/i915/gvt/vgpu.c idr_remove(&gvt->vgpu_idr, vgpu->id); gvt 283 drivers/gpu/drm/i915/gvt/vgpu.c mutex_unlock(&gvt->lock); gvt 299 drivers/gpu/drm/i915/gvt/vgpu.c mutex_lock(&gvt->lock); gvt 300 drivers/gpu/drm/i915/gvt/vgpu.c if (idr_is_empty(&gvt->vgpu_idr)) gvt 301 drivers/gpu/drm/i915/gvt/vgpu.c intel_gvt_clean_irq(gvt); gvt 302 drivers/gpu/drm/i915/gvt/vgpu.c intel_gvt_update_vgpu_types(gvt); gvt 303 drivers/gpu/drm/i915/gvt/vgpu.c mutex_unlock(&gvt->lock); gvt 319 drivers/gpu/drm/i915/gvt/vgpu.c struct intel_vgpu *intel_gvt_create_idle_vgpu(struct intel_gvt *gvt) gvt 330 drivers/gpu/drm/i915/gvt/vgpu.c vgpu->gvt = gvt; gvt 365 drivers/gpu/drm/i915/gvt/vgpu.c static struct intel_vgpu *__intel_gvt_create_vgpu(struct intel_gvt *gvt, gvt 379 drivers/gpu/drm/i915/gvt/vgpu.c ret = idr_alloc(&gvt->vgpu_idr, vgpu, IDLE_VGPU_IDR + 1, GVT_MAX_VGPU, gvt 386 drivers/gpu/drm/i915/gvt/vgpu.c vgpu->gvt = gvt; gvt 436 drivers/gpu/drm/i915/gvt/vgpu.c if (IS_SKYLAKE(gvt->dev_priv) || IS_KABYLAKE(gvt->dev_priv)) gvt 460 drivers/gpu/drm/i915/gvt/vgpu.c idr_remove(&gvt->vgpu_idr, vgpu->id); gvt 476 drivers/gpu/drm/i915/gvt/vgpu.c struct intel_vgpu *intel_gvt_create_vgpu(struct intel_gvt *gvt, gvt 494 drivers/gpu/drm/i915/gvt/vgpu.c mutex_lock(&gvt->lock); gvt 495 drivers/gpu/drm/i915/gvt/vgpu.c vgpu = __intel_gvt_create_vgpu(gvt, ¶m); gvt 498 drivers/gpu/drm/i915/gvt/vgpu.c intel_gvt_update_vgpu_types(gvt); gvt 499 drivers/gpu/drm/i915/gvt/vgpu.c mutex_unlock(&gvt->lock); gvt 535 drivers/gpu/drm/i915/gvt/vgpu.c struct intel_gvt *gvt = vgpu->gvt; gvt 536 drivers/gpu/drm/i915/gvt/vgpu.c struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler; gvt 1318 drivers/gpu/drm/i915/i915_drv.h struct intel_gvt *gvt; gvt 2230 drivers/gpu/drm/i915/i915_drv.h return dev_priv->gvt;