gtt_offset       2805 drivers/gpu/drm/i915/display/intel_display.c 	u32 gtt_offset = 0;
gtt_offset       2895 drivers/gpu/drm/i915/display/intel_display.c 					 gtt_offset * tile_size, 0);
gtt_offset       2897 drivers/gpu/drm/i915/display/intel_display.c 		gtt_offset += info->plane[i].width * info->plane[i].height;
gtt_offset        612 drivers/gpu/drm/i915/gem/i915_gem_stolen.c 					       resource_size_t gtt_offset,
gtt_offset        627 drivers/gpu/drm/i915/gem/i915_gem_stolen.c 			 &stolen_offset, &gtt_offset, &size);
gtt_offset        659 drivers/gpu/drm/i915/gem/i915_gem_stolen.c 	if (gtt_offset == I915_GTT_OFFSET_NONE)
gtt_offset        678 drivers/gpu/drm/i915/gem/i915_gem_stolen.c 				   size, gtt_offset, obj->cache_level,
gtt_offset         32 drivers/gpu/drm/i915/gem/i915_gem_stolen.h 					       resource_size_t gtt_offset,
gtt_offset        389 drivers/gpu/drm/i915/gt/intel_engine.h gen8_emit_ggtt_write_rcs(u32 *cs, u32 value, u32 gtt_offset, u32 flags)
gtt_offset        392 drivers/gpu/drm/i915/gt/intel_engine.h 	GEM_BUG_ON(!IS_ALIGNED(gtt_offset, 8));
gtt_offset        400 drivers/gpu/drm/i915/gt/intel_engine.h 	*cs++ = gtt_offset;
gtt_offset        410 drivers/gpu/drm/i915/gt/intel_engine.h gen8_emit_ggtt_write(u32 *cs, u32 value, u32 gtt_offset, u32 flags)
gtt_offset        413 drivers/gpu/drm/i915/gt/intel_engine.h 	GEM_BUG_ON(gtt_offset & (1 << 5));
gtt_offset        415 drivers/gpu/drm/i915/gt/intel_engine.h 	GEM_BUG_ON(!IS_ALIGNED(gtt_offset, 8));
gtt_offset        418 drivers/gpu/drm/i915/gt/intel_engine.h 	*cs++ = gtt_offset | MI_FLUSH_DW_USE_GTT;
gtt_offset        501 drivers/gpu/drm/i915/i915_gpu_error.c 		u64 start = ee->batchbuffer->gtt_offset;
gtt_offset        573 drivers/gpu/drm/i915/i915_gpu_error.c 			   upper_32_bits(obj->gtt_offset),
gtt_offset        574 drivers/gpu/drm/i915/i915_gpu_error.c 			   lower_32_bits(obj->gtt_offset));
gtt_offset        751 drivers/gpu/drm/i915/i915_gpu_error.c 				   upper_32_bits(obj->gtt_offset),
gtt_offset        752 drivers/gpu/drm/i915/i915_gpu_error.c 				   lower_32_bits(obj->gtt_offset));
gtt_offset        985 drivers/gpu/drm/i915/i915_gpu_error.c 	dst->gtt_offset = vma->node.start;
gtt_offset        128 drivers/gpu/drm/i915/i915_gpu_error.h 			u64 gtt_offset;
gtt_offset        527 drivers/gpu/drm/i915/i915_perf.c 		u32 gtt_offset = i915_ggtt_offset(vma);
gtt_offset        533 drivers/gpu/drm/i915/i915_perf.c 		if (hw_tail >= gtt_offset &&
gtt_offset        534 drivers/gpu/drm/i915/i915_perf.c 		    hw_tail < (gtt_offset + OA_BUFFER_SIZE)) {
gtt_offset        661 drivers/gpu/drm/i915/i915_perf.c 	u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);
gtt_offset        692 drivers/gpu/drm/i915/i915_perf.c 	head -= gtt_offset;
gtt_offset        693 drivers/gpu/drm/i915/i915_perf.c 	tail -= gtt_offset;
gtt_offset        831 drivers/gpu/drm/i915/i915_perf.c 		head += gtt_offset;
gtt_offset        949 drivers/gpu/drm/i915/i915_perf.c 	u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);
gtt_offset        978 drivers/gpu/drm/i915/i915_perf.c 	head -= gtt_offset;
gtt_offset        979 drivers/gpu/drm/i915/i915_perf.c 	tail -= gtt_offset;
gtt_offset       1044 drivers/gpu/drm/i915/i915_perf.c 		head += gtt_offset;
gtt_offset       1396 drivers/gpu/drm/i915/i915_perf.c 	u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);
gtt_offset       1405 drivers/gpu/drm/i915/i915_perf.c 		   gtt_offset | GEN7_OASTATUS2_MEM_SELECT_GGTT); /* head */
gtt_offset       1406 drivers/gpu/drm/i915/i915_perf.c 	stream->oa_buffer.head = gtt_offset;
gtt_offset       1408 drivers/gpu/drm/i915/i915_perf.c 	I915_WRITE(GEN7_OABUFFER, gtt_offset);
gtt_offset       1410 drivers/gpu/drm/i915/i915_perf.c 	I915_WRITE(GEN7_OASTATUS1, gtt_offset | OABUFFER_SIZE_16M); /* tail */
gtt_offset       1446 drivers/gpu/drm/i915/i915_perf.c 	u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);
gtt_offset       1452 drivers/gpu/drm/i915/i915_perf.c 	I915_WRITE(GEN8_OAHEADPTR, gtt_offset);
gtt_offset       1453 drivers/gpu/drm/i915/i915_perf.c 	stream->oa_buffer.head = gtt_offset;
gtt_offset       1465 drivers/gpu/drm/i915/i915_perf.c 	I915_WRITE(GEN8_OABUFFER, gtt_offset |
gtt_offset       1467 drivers/gpu/drm/i915/i915_perf.c 	I915_WRITE(GEN8_OATAILPTR, gtt_offset & GEN8_OATAILPTR_MASK);