gt_iir            244 drivers/gpu/drm/i915/gt/intel_gt_irq.c void gen5_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
gt_iir            246 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	if (gt_iir & GT_RENDER_USER_INTERRUPT)
gt_iir            248 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	if (gt_iir & ILK_BSD_USER_INTERRUPT)
gt_iir            270 drivers/gpu/drm/i915/gt/intel_gt_irq.c void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
gt_iir            272 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	if (gt_iir & GT_RENDER_USER_INTERRUPT)
gt_iir            274 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	if (gt_iir & GT_BSD_USER_INTERRUPT)
gt_iir            276 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	if (gt_iir & GT_BLT_USER_INTERRUPT)
gt_iir            279 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	if (gt_iir & (GT_BLT_CS_ERROR_INTERRUPT |
gt_iir            282 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		DRM_DEBUG("Command parser error, gt_iir 0x%08x\n", gt_iir);
gt_iir            284 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	if (gt_iir & GT_PARITY_ERROR(gt->i915))
gt_iir            285 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		gen7_parity_error_irq_handler(gt, gt_iir);
gt_iir            288 drivers/gpu/drm/i915/gt/intel_gt_irq.c void gen8_gt_irq_ack(struct intel_gt *gt, u32 master_ctl, u32 gt_iir[4])
gt_iir            293 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		gt_iir[0] = raw_reg_read(regs, GEN8_GT_IIR(0));
gt_iir            294 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		if (likely(gt_iir[0]))
gt_iir            295 drivers/gpu/drm/i915/gt/intel_gt_irq.c 			raw_reg_write(regs, GEN8_GT_IIR(0), gt_iir[0]);
gt_iir            299 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		gt_iir[1] = raw_reg_read(regs, GEN8_GT_IIR(1));
gt_iir            300 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		if (likely(gt_iir[1]))
gt_iir            301 drivers/gpu/drm/i915/gt/intel_gt_irq.c 			raw_reg_write(regs, GEN8_GT_IIR(1), gt_iir[1]);
gt_iir            305 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		gt_iir[2] = raw_reg_read(regs, GEN8_GT_IIR(2));
gt_iir            306 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		if (likely(gt_iir[2]))
gt_iir            307 drivers/gpu/drm/i915/gt/intel_gt_irq.c 			raw_reg_write(regs, GEN8_GT_IIR(2), gt_iir[2]);
gt_iir            311 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		gt_iir[3] = raw_reg_read(regs, GEN8_GT_IIR(3));
gt_iir            312 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		if (likely(gt_iir[3]))
gt_iir            313 drivers/gpu/drm/i915/gt/intel_gt_irq.c 			raw_reg_write(regs, GEN8_GT_IIR(3), gt_iir[3]);
gt_iir            317 drivers/gpu/drm/i915/gt/intel_gt_irq.c void gen8_gt_irq_handler(struct intel_gt *gt, u32 master_ctl, u32 gt_iir[4])
gt_iir            321 drivers/gpu/drm/i915/gt/intel_gt_irq.c 			       gt_iir[0] >> GEN8_RCS_IRQ_SHIFT);
gt_iir            323 drivers/gpu/drm/i915/gt/intel_gt_irq.c 			       gt_iir[0] >> GEN8_BCS_IRQ_SHIFT);
gt_iir            328 drivers/gpu/drm/i915/gt/intel_gt_irq.c 			       gt_iir[1] >> GEN8_VCS0_IRQ_SHIFT);
gt_iir            330 drivers/gpu/drm/i915/gt/intel_gt_irq.c 			       gt_iir[1] >> GEN8_VCS1_IRQ_SHIFT);
gt_iir            335 drivers/gpu/drm/i915/gt/intel_gt_irq.c 			       gt_iir[3] >> GEN8_VECS_IRQ_SHIFT);
gt_iir            339 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		gen6_rps_irq_handler(gt->i915, gt_iir[2]);
gt_iir            340 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		guc_irq_handler(&gt->uc.guc, gt_iir[2] >> 16);
gt_iir             30 drivers/gpu/drm/i915/gt/intel_gt_irq.h void gen5_gt_irq_handler(struct intel_gt *gt, u32 gt_iir);
gt_iir             37 drivers/gpu/drm/i915/gt/intel_gt_irq.h void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir);
gt_iir             39 drivers/gpu/drm/i915/gt/intel_gt_irq.h void gen8_gt_irq_ack(struct intel_gt *gt, u32 master_ctl, u32 gt_iir[4]);
gt_iir             41 drivers/gpu/drm/i915/gt/intel_gt_irq.h void gen8_gt_irq_handler(struct intel_gt *gt, u32 master_ctl, u32 gt_iir[4]);
gt_iir           1952 drivers/gpu/drm/i915/i915_irq.c 		u32 iir, gt_iir, pm_iir;
gt_iir           1957 drivers/gpu/drm/i915/i915_irq.c 		gt_iir = I915_READ(GTIIR);
gt_iir           1961 drivers/gpu/drm/i915/i915_irq.c 		if (gt_iir == 0 && pm_iir == 0 && iir == 0)
gt_iir           1983 drivers/gpu/drm/i915/i915_irq.c 		if (gt_iir)
gt_iir           1984 drivers/gpu/drm/i915/i915_irq.c 			I915_WRITE(GTIIR, gt_iir);
gt_iir           2009 drivers/gpu/drm/i915/i915_irq.c 		if (gt_iir)
gt_iir           2010 drivers/gpu/drm/i915/i915_irq.c 			gen6_gt_irq_handler(&dev_priv->gt, gt_iir);
gt_iir           2040 drivers/gpu/drm/i915/i915_irq.c 		u32 gt_iir[4];
gt_iir           2068 drivers/gpu/drm/i915/i915_irq.c 		gen8_gt_irq_ack(&dev_priv->gt, master_ctl, gt_iir);
gt_iir           2092 drivers/gpu/drm/i915/i915_irq.c 		gen8_gt_irq_handler(&dev_priv->gt, master_ctl, gt_iir);
gt_iir           2492 drivers/gpu/drm/i915/i915_irq.c 	u32 de_iir, gt_iir, de_ier, sde_ier = 0;
gt_iir           2517 drivers/gpu/drm/i915/i915_irq.c 	gt_iir = I915_READ(GTIIR);
gt_iir           2518 drivers/gpu/drm/i915/i915_irq.c 	if (gt_iir) {
gt_iir           2519 drivers/gpu/drm/i915/i915_irq.c 		I915_WRITE(GTIIR, gt_iir);
gt_iir           2522 drivers/gpu/drm/i915/i915_irq.c 			gen6_gt_irq_handler(&dev_priv->gt, gt_iir);
gt_iir           2524 drivers/gpu/drm/i915/i915_irq.c 			gen5_gt_irq_handler(&dev_priv->gt, gt_iir);
gt_iir           2828 drivers/gpu/drm/i915/i915_irq.c 	u32 gt_iir[4];
gt_iir           2840 drivers/gpu/drm/i915/i915_irq.c 	gen8_gt_irq_ack(&dev_priv->gt, master_ctl, gt_iir);
gt_iir           2851 drivers/gpu/drm/i915/i915_irq.c 	gen8_gt_irq_handler(&dev_priv->gt, master_ctl, gt_iir);