gt                192 arch/arm/include/asm/assembler.h 	.irp	c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo
gt                449 arch/arm/include/asm/assembler.h 	.irp	c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo
gt                214 drivers/gpu/drm/gma500/framebuffer.c 					struct gtt_range *gt)
gt                231 drivers/gpu/drm/gma500/framebuffer.c 	fb->base.obj[0] = &gt->gem;
gt                255 drivers/gpu/drm/gma500/framebuffer.c 			 struct gtt_range *gt)
gt                264 drivers/gpu/drm/gma500/framebuffer.c 	ret = psb_framebuffer_init(dev, fb, mode_cmd, gt);
gt                332 drivers/gpu/drm/gma500/gma_display.c 	struct gtt_range *gt;
gt                349 drivers/gpu/drm/gma500/gma_display.c 			gt = container_of(gma_crtc->cursor_obj,
gt                351 drivers/gpu/drm/gma500/gma_display.c 			psb_gtt_unpin(gt);
gt                376 drivers/gpu/drm/gma500/gma_display.c 	gt = container_of(obj, struct gtt_range, gem);
gt                379 drivers/gpu/drm/gma500/gma_display.c 	ret = psb_gtt_pin(gt);
gt                393 drivers/gpu/drm/gma500/gma_display.c 		if (gt->npage > 4)
gt                396 drivers/gpu/drm/gma500/gma_display.c 			cursor_pages = gt->npage;
gt                401 drivers/gpu/drm/gma500/gma_display.c 			tmp_src = kmap(gt->pages[i]);
gt                403 drivers/gpu/drm/gma500/gma_display.c 			kunmap(gt->pages[i]);
gt                409 drivers/gpu/drm/gma500/gma_display.c 		addr = gt->offset;
gt                426 drivers/gpu/drm/gma500/gma_display.c 		gt = container_of(gma_crtc->cursor_obj, struct gtt_range, gem);
gt                427 drivers/gpu/drm/gma500/gma_display.c 		psb_gtt_unpin(gt);
gt                484 drivers/gpu/drm/gma500/gma_display.c 	struct gtt_range *gt;
gt                490 drivers/gpu/drm/gma500/gma_display.c 		gt = to_gtt_range(crtc->primary->fb->obj[0]);
gt                491 drivers/gpu/drm/gma500/gma_display.c 		psb_gtt_unpin(gt);
gt                194 drivers/gpu/drm/gma500/gtt.c static int psb_gtt_attach_pages(struct gtt_range *gt)
gt                198 drivers/gpu/drm/gma500/gtt.c 	WARN_ON(gt->pages);
gt                200 drivers/gpu/drm/gma500/gtt.c 	pages = drm_gem_get_pages(&gt->gem);
gt                204 drivers/gpu/drm/gma500/gtt.c 	gt->npage = gt->gem.size / PAGE_SIZE;
gt                205 drivers/gpu/drm/gma500/gtt.c 	gt->pages = pages;
gt                219 drivers/gpu/drm/gma500/gtt.c static void psb_gtt_detach_pages(struct gtt_range *gt)
gt                221 drivers/gpu/drm/gma500/gtt.c 	drm_gem_put_pages(&gt->gem, gt->pages, true, false);
gt                222 drivers/gpu/drm/gma500/gtt.c 	gt->pages = NULL;
gt                235 drivers/gpu/drm/gma500/gtt.c int psb_gtt_pin(struct gtt_range *gt)
gt                238 drivers/gpu/drm/gma500/gtt.c 	struct drm_device *dev = gt->gem.dev;
gt                244 drivers/gpu/drm/gma500/gtt.c 	if (gt->in_gart == 0 && gt->stolen == 0) {
gt                245 drivers/gpu/drm/gma500/gtt.c 		ret = psb_gtt_attach_pages(gt);
gt                248 drivers/gpu/drm/gma500/gtt.c 		ret = psb_gtt_insert(dev, gt, 0);
gt                250 drivers/gpu/drm/gma500/gtt.c 			psb_gtt_detach_pages(gt);
gt                254 drivers/gpu/drm/gma500/gtt.c 				     gt->pages, (gpu_base + gt->offset),
gt                255 drivers/gpu/drm/gma500/gtt.c 				     gt->npage, 0, 0, PSB_MMU_CACHED_MEMORY);
gt                257 drivers/gpu/drm/gma500/gtt.c 	gt->in_gart++;
gt                274 drivers/gpu/drm/gma500/gtt.c void psb_gtt_unpin(struct gtt_range *gt)
gt                276 drivers/gpu/drm/gma500/gtt.c 	struct drm_device *dev = gt->gem.dev;
gt                291 drivers/gpu/drm/gma500/gtt.c 	WARN_ON(!gt->in_gart);
gt                293 drivers/gpu/drm/gma500/gtt.c 	gt->in_gart--;
gt                294 drivers/gpu/drm/gma500/gtt.c 	if (gt->in_gart == 0 && gt->stolen == 0) {
gt                296 drivers/gpu/drm/gma500/gtt.c 				     (gpu_base + gt->offset), gt->npage, 0, 0);
gt                297 drivers/gpu/drm/gma500/gtt.c 		psb_gtt_remove(dev, gt);
gt                298 drivers/gpu/drm/gma500/gtt.c 		psb_gtt_detach_pages(gt);
gt                328 drivers/gpu/drm/gma500/gtt.c 	struct gtt_range *gt;
gt                343 drivers/gpu/drm/gma500/gtt.c 	gt = kzalloc(sizeof(struct gtt_range), GFP_KERNEL);
gt                344 drivers/gpu/drm/gma500/gtt.c 	if (gt == NULL)
gt                346 drivers/gpu/drm/gma500/gtt.c 	gt->resource.name = name;
gt                347 drivers/gpu/drm/gma500/gtt.c 	gt->stolen = backed;
gt                348 drivers/gpu/drm/gma500/gtt.c 	gt->in_gart = backed;
gt                349 drivers/gpu/drm/gma500/gtt.c 	gt->roll = 0;
gt                351 drivers/gpu/drm/gma500/gtt.c 	gt->gem.dev = dev;
gt                352 drivers/gpu/drm/gma500/gtt.c 	ret = allocate_resource(dev_priv->gtt_mem, &gt->resource,
gt                355 drivers/gpu/drm/gma500/gtt.c 		gt->offset = gt->resource.start - r->start;
gt                356 drivers/gpu/drm/gma500/gtt.c 		return gt;
gt                358 drivers/gpu/drm/gma500/gtt.c 	kfree(gt);
gt                370 drivers/gpu/drm/gma500/gtt.c void psb_gtt_free_range(struct drm_device *dev, struct gtt_range *gt)
gt                373 drivers/gpu/drm/gma500/gtt.c 	if (gt->mmapping) {
gt                374 drivers/gpu/drm/gma500/gtt.c 		psb_gtt_unpin(gt);
gt                375 drivers/gpu/drm/gma500/gtt.c 		gt->mmapping = 0;
gt                377 drivers/gpu/drm/gma500/gtt.c 	WARN_ON(gt->in_gart && !gt->stolen);
gt                378 drivers/gpu/drm/gma500/gtt.c 	release_resource(&gt->resource);
gt                379 drivers/gpu/drm/gma500/gtt.c 	kfree(gt);
gt                 48 drivers/gpu/drm/gma500/gtt.h extern void psb_gtt_kref_put(struct gtt_range *gt);
gt                 49 drivers/gpu/drm/gma500/gtt.h extern void psb_gtt_free_range(struct drm_device *dev, struct gtt_range *gt);
gt                 50 drivers/gpu/drm/gma500/gtt.h extern int psb_gtt_pin(struct gtt_range *gt);
gt                 51 drivers/gpu/drm/gma500/gtt.h extern void psb_gtt_unpin(struct gtt_range *gt);
gt                 53 drivers/gpu/drm/gma500/gtt.h 					struct gtt_range *gt, int roll);
gt               4278 drivers/gpu/drm/i915/display/intel_display.c 	set_bit(I915_RESET_MODESET, &dev_priv->gt.reset.flags);
gt               4280 drivers/gpu/drm/i915/display/intel_display.c 	wake_up_bit(&dev_priv->gt.reset.flags, I915_RESET_MODESET);
gt               4284 drivers/gpu/drm/i915/display/intel_display.c 		intel_gt_set_wedged(&dev_priv->gt);
gt               4330 drivers/gpu/drm/i915/display/intel_display.c 	if (!test_bit(I915_RESET_MODESET, &dev_priv->gt.reset.flags))
gt               4370 drivers/gpu/drm/i915/display/intel_display.c 	clear_bit_unlock(I915_RESET_MODESET, &dev_priv->gt.reset.flags);
gt               13890 drivers/gpu/drm/i915/display/intel_display.c 		prepare_to_wait(bit_waitqueue(&dev_priv->gt.reset.flags,
gt               13896 drivers/gpu/drm/i915/display/intel_display.c 		    test_bit(I915_RESET_MODESET, &dev_priv->gt.reset.flags))
gt               13902 drivers/gpu/drm/i915/display/intel_display.c 	finish_wait(bit_waitqueue(&dev_priv->gt.reset.flags,
gt                284 drivers/gpu/drm/i915/gem/i915_gem_context.c 	const struct intel_gt *gt = &ctx->i915->gt;
gt                294 drivers/gpu/drm/i915/gem/i915_gem_context.c 	for_each_engine(engine, gt, id) {
gt                558 drivers/gpu/drm/i915/gem/i915_gem_context.c 		timeline = intel_timeline_create(&dev_priv->gt, NULL);
gt               2090 drivers/gpu/drm/i915/gem/i915_gem_context.c 	ret = intel_gt_terminally_wedged(&i915->gt);
gt                942 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 	intel_gt_chipset_flush(cache->rq->engine->gt);
gt                968 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 		intel_gt_flush_ggtt_writes(ggtt->vm.gt);
gt               1026 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 		intel_gt_flush_ggtt_writes(ggtt->vm.gt);
gt               1906 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 	intel_gt_chipset_flush(eb->engine->gt);
gt               2213 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 	err = intel_gt_terminally_wedged(ce->engine->gt);
gt                248 drivers/gpu/drm/i915/gem/i915_gem_mman.c 	ret = intel_gt_reset_trylock(ggtt->vm.gt, &srcu);
gt                332 drivers/gpu/drm/i915/gem/i915_gem_mman.c 	intel_gt_reset_unlock(ggtt->vm.gt, srcu);
gt                345 drivers/gpu/drm/i915/gem/i915_gem_mman.c 		if (!intel_gt_is_wedged(ggtt->vm.gt))
gt                271 drivers/gpu/drm/i915/gem/i915_gem_object.c 			intel_gt_flush_ggtt_writes(vma->vm->gt);
gt                 80 drivers/gpu/drm/i915/gem/i915_gem_object_blt.c 	intel_gt_chipset_flush(ce->vm->gt);
gt                279 drivers/gpu/drm/i915/gem/i915_gem_object_blt.c 	intel_gt_chipset_flush(ce->vm->gt);
gt                 78 drivers/gpu/drm/i915/gem/i915_gem_phys.c 	intel_gt_chipset_flush(&to_i915(obj->base.dev)->gt);
gt                 54 drivers/gpu/drm/i915/gem/i915_gem_pm.c 	intel_wakeref_lock(&i915->gt.wakeref);
gt                 55 drivers/gpu/drm/i915/gem/i915_gem_pm.c 	park = (!intel_wakeref_is_active(&i915->gt.wakeref) &&
gt                 57 drivers/gpu/drm/i915/gem/i915_gem_pm.c 	intel_wakeref_unlock(&i915->gt.wakeref);
gt                107 drivers/gpu/drm/i915/gem/i915_gem_pm.c static bool switch_to_kernel_context_sync(struct intel_gt *gt)
gt                109 drivers/gpu/drm/i915/gem/i915_gem_pm.c 	bool result = !intel_gt_is_wedged(gt);
gt                112 drivers/gpu/drm/i915/gem/i915_gem_pm.c 		if (i915_gem_wait_for_idle(gt->i915,
gt                118 drivers/gpu/drm/i915/gem/i915_gem_pm.c 				dev_err(gt->i915->drm.dev,
gt                127 drivers/gpu/drm/i915/gem/i915_gem_pm.c 			intel_gt_set_wedged(gt);
gt                130 drivers/gpu/drm/i915/gem/i915_gem_pm.c 	} while (i915_retire_requests(gt->i915) && result);
gt                132 drivers/gpu/drm/i915/gem/i915_gem_pm.c 	if (intel_gt_pm_wait_for_idle(gt))
gt                140 drivers/gpu/drm/i915/gem/i915_gem_pm.c 	return switch_to_kernel_context_sync(&i915->gt);
gt                161 drivers/gpu/drm/i915/gem/i915_gem_pm.c 	switch_to_kernel_context_sync(&i915->gt);
gt                165 drivers/gpu/drm/i915/gem/i915_gem_pm.c 	cancel_delayed_work_sync(&i915->gt.hangcheck.work);
gt                169 drivers/gpu/drm/i915/gem/i915_gem_pm.c 	intel_uc_suspend(&i915->gt.uc);
gt                252 drivers/gpu/drm/i915/gem/i915_gem_pm.c 	if (intel_gt_resume(&i915->gt))
gt                255 drivers/gpu/drm/i915/gem/i915_gem_pm.c 	intel_uc_resume(&i915->gt.uc);
gt                267 drivers/gpu/drm/i915/gem/i915_gem_pm.c 	if (!intel_gt_is_wedged(&i915->gt)) {
gt                270 drivers/gpu/drm/i915/gem/i915_gem_pm.c 		intel_gt_set_wedged(&i915->gt);
gt                281 drivers/gpu/drm/i915/gem/i915_gem_pm.c 	blocking_notifier_chain_register(&i915->gt.pm_notifications,
gt                 44 drivers/gpu/drm/i915/gem/i915_gem_throttle.c 	ret = intel_gt_terminally_wedged(&to_i915(dev)->gt);
gt                938 drivers/gpu/drm/i915/gem/selftests/huge_pages.c 	struct i915_address_space *vm = ctx->vm ?: &engine->gt->ggtt->vm;
gt               1672 drivers/gpu/drm/i915/gem/selftests/huge_pages.c 	if (intel_gt_is_wedged(&i915->gt))
gt                112 drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c 	if (intel_gt_is_wedged(&i915->gt))
gt                249 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c 	return !intel_gt_is_wedged(&i915->gt);
gt                254 drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c 	if (intel_gt_is_wedged(&i915->gt))
gt                 87 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 			intel_gt_set_wedged(&i915->gt);
gt                131 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 				intel_gt_set_wedged(&i915->gt);
gt                174 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 	struct i915_address_space *vm = ctx->vm ?: &engine->gt->ggtt->vm;
gt                730 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 	ret = igt_spinner_init(*spin, ce->engine->gt);
gt                946 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 		igt_global_reset_lock(&i915->gt);
gt               1007 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 		igt_global_reset_unlock(&i915->gt);
gt               1624 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 	if (intel_gt_is_wedged(&i915->gt))
gt                147 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c 		intel_gt_flush_ggtt_writes(&to_i915(obj->base.dev)->gt);
gt                390 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c 	intel_gt_pm_get(&i915->gt);
gt                398 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c 	intel_gt_pm_put(&i915->gt);
gt                430 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c 	GEM_BUG_ON(!i915->gt.awake);
gt                484 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c 		if (intel_gt_is_wedged(&i915->gt))
gt                218 drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c 	if (intel_gt_is_wedged(&i915->gt))
gt                111 drivers/gpu/drm/i915/gem/selftests/igt_gem_utils.c 	struct i915_address_space *vm = ctx->vm ?: &engine->gt->ggtt->vm;
gt                 38 drivers/gpu/drm/i915/gt/intel_breadcrumbs.c 	spin_lock(&engine->gt->irq_lock);
gt                 40 drivers/gpu/drm/i915/gt/intel_breadcrumbs.c 	spin_unlock(&engine->gt->irq_lock);
gt                 49 drivers/gpu/drm/i915/gt/intel_breadcrumbs.c 	spin_lock(&engine->gt->irq_lock);
gt                 51 drivers/gpu/drm/i915/gt/intel_breadcrumbs.c 	spin_unlock(&engine->gt->irq_lock);
gt                227 drivers/gpu/drm/i915/gt/intel_context.c 	ce->vm = i915_vm_get(ctx->vm ?: &engine->gt->ggtt->vm);
gt                434 drivers/gpu/drm/i915/gt/intel_engine.h bool intel_engines_are_idle(struct intel_gt *gt);
gt                436 drivers/gpu/drm/i915/gt/intel_engine.h void intel_engines_reset_default_submission(struct intel_gt *gt);
gt                272 drivers/gpu/drm/i915/gt/intel_engine_cs.c static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id)
gt                286 drivers/gpu/drm/i915/gt/intel_engine_cs.c 	if (GEM_DEBUG_WARN_ON(gt->engine_class[info->class][info->instance]))
gt                297 drivers/gpu/drm/i915/gt/intel_engine_cs.c 	engine->i915 = gt->i915;
gt                298 drivers/gpu/drm/i915/gt/intel_engine_cs.c 	engine->gt = gt;
gt                299 drivers/gpu/drm/i915/gt/intel_engine_cs.c 	engine->uncore = gt->uncore;
gt                301 drivers/gpu/drm/i915/gt/intel_engine_cs.c 	engine->mmio_base = __engine_mmio_base(gt->i915, info->mmio_bases);
gt                313 drivers/gpu/drm/i915/gt/intel_engine_cs.c 	engine->context_size = intel_engine_context_size(gt->i915,
gt                318 drivers/gpu/drm/i915/gt/intel_engine_cs.c 		DRIVER_CAPS(gt->i915)->has_logical_contexts = true;
gt                330 drivers/gpu/drm/i915/gt/intel_engine_cs.c 	gt->engine_class[info->class][info->instance] = engine;
gt                333 drivers/gpu/drm/i915/gt/intel_engine_cs.c 	gt->i915->engine[id] = engine;
gt                417 drivers/gpu/drm/i915/gt/intel_engine_cs.c 		err = intel_engine_setup(&i915->gt, i);
gt                434 drivers/gpu/drm/i915/gt/intel_engine_cs.c 	intel_gt_check_and_clear_faults(&i915->gt);
gt                557 drivers/gpu/drm/i915/gt/intel_engine_cs.c 	vma = i915_vma_instance(obj, &engine->gt->ggtt->vm, NULL);
gt                672 drivers/gpu/drm/i915/gt/intel_engine_cs.c 	GEM_BUG_ON(!engine->gt->scratch);
gt                679 drivers/gpu/drm/i915/gt/intel_engine_cs.c 				engine->gt,
gt               1044 drivers/gpu/drm/i915/gt/intel_engine_cs.c 	if (intel_gt_is_wedged(engine->gt))
gt               1080 drivers/gpu/drm/i915/gt/intel_engine_cs.c bool intel_engines_are_idle(struct intel_gt *gt)
gt               1089 drivers/gpu/drm/i915/gt/intel_engine_cs.c 	if (intel_gt_is_wedged(gt))
gt               1093 drivers/gpu/drm/i915/gt/intel_engine_cs.c 	if (!READ_ONCE(gt->awake))
gt               1096 drivers/gpu/drm/i915/gt/intel_engine_cs.c 	for_each_engine(engine, gt->i915, id) {
gt               1104 drivers/gpu/drm/i915/gt/intel_engine_cs.c void intel_engines_reset_default_submission(struct intel_gt *gt)
gt               1109 drivers/gpu/drm/i915/gt/intel_engine_cs.c 	for_each_engine(engine, gt->i915, id)
gt               1371 drivers/gpu/drm/i915/gt/intel_engine_cs.c 	if (intel_gt_is_wedged(engine->gt))
gt                 23 drivers/gpu/drm/i915/gt/intel_engine_pm.c 	intel_gt_pm_get(engine->gt);
gt                 84 drivers/gpu/drm/i915/gt/intel_engine_pm.c 	if (intel_gt_is_wedged(engine->gt))
gt                161 drivers/gpu/drm/i915/gt/intel_engine_pm.c 	intel_gt_pm_put(engine->gt);
gt                289 drivers/gpu/drm/i915/gt/intel_engine_types.h 	struct intel_gt *gt;
gt                146 drivers/gpu/drm/i915/gt/intel_engine_user.c 	struct intel_gt *gt;
gt                176 drivers/gpu/drm/i915/gt/intel_engine_user.c 	if (engine->gt != ring->gt || engine->class != ring->class) {
gt                177 drivers/gpu/drm/i915/gt/intel_engine_user.c 		ring->gt = engine->gt;
gt                186 drivers/gpu/drm/i915/gt/intel_engine_user.c 	GEM_BUG_ON(idx >= ARRAY_SIZE(ring->gt->engine));
gt                187 drivers/gpu/drm/i915/gt/intel_engine_user.c 	ring->gt->engine[idx] = engine;
gt                 11 drivers/gpu/drm/i915/gt/intel_gt.c void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915)
gt                 13 drivers/gpu/drm/i915/gt/intel_gt.c 	gt->i915 = i915;
gt                 14 drivers/gpu/drm/i915/gt/intel_gt.c 	gt->uncore = &i915->uncore;
gt                 16 drivers/gpu/drm/i915/gt/intel_gt.c 	spin_lock_init(&gt->irq_lock);
gt                 18 drivers/gpu/drm/i915/gt/intel_gt.c 	INIT_LIST_HEAD(&gt->closed_vma);
gt                 19 drivers/gpu/drm/i915/gt/intel_gt.c 	spin_lock_init(&gt->closed_lock);
gt                 21 drivers/gpu/drm/i915/gt/intel_gt.c 	intel_gt_init_hangcheck(gt);
gt                 22 drivers/gpu/drm/i915/gt/intel_gt.c 	intel_gt_init_reset(gt);
gt                 23 drivers/gpu/drm/i915/gt/intel_gt.c 	intel_gt_pm_init_early(gt);
gt                 24 drivers/gpu/drm/i915/gt/intel_gt.c 	intel_uc_init_early(&gt->uc);
gt                 29 drivers/gpu/drm/i915/gt/intel_gt.c 	i915->gt.ggtt = &i915->ggtt;
gt                 54 drivers/gpu/drm/i915/gt/intel_gt.c intel_gt_clear_error_registers(struct intel_gt *gt,
gt                 57 drivers/gpu/drm/i915/gt/intel_gt.c 	struct drm_i915_private *i915 = gt->i915;
gt                 58 drivers/gpu/drm/i915/gt/intel_gt.c 	struct intel_uncore *uncore = gt->uncore;
gt                 97 drivers/gpu/drm/i915/gt/intel_gt.c static void gen6_check_faults(struct intel_gt *gt)
gt                103 drivers/gpu/drm/i915/gt/intel_gt.c 	for_each_engine(engine, gt->i915, id) {
gt                120 drivers/gpu/drm/i915/gt/intel_gt.c static void gen8_check_faults(struct intel_gt *gt)
gt                122 drivers/gpu/drm/i915/gt/intel_gt.c 	struct intel_uncore *uncore = gt->uncore;
gt                126 drivers/gpu/drm/i915/gt/intel_gt.c 	if (INTEL_GEN(gt->i915) >= 12) {
gt                162 drivers/gpu/drm/i915/gt/intel_gt.c void intel_gt_check_and_clear_faults(struct intel_gt *gt)
gt                164 drivers/gpu/drm/i915/gt/intel_gt.c 	struct drm_i915_private *i915 = gt->i915;
gt                168 drivers/gpu/drm/i915/gt/intel_gt.c 		gen8_check_faults(gt);
gt                170 drivers/gpu/drm/i915/gt/intel_gt.c 		gen6_check_faults(gt);
gt                174 drivers/gpu/drm/i915/gt/intel_gt.c 	intel_gt_clear_error_registers(gt, ALL_ENGINES);
gt                177 drivers/gpu/drm/i915/gt/intel_gt.c void intel_gt_flush_ggtt_writes(struct intel_gt *gt)
gt                179 drivers/gpu/drm/i915/gt/intel_gt.c 	struct drm_i915_private *i915 = gt->i915;
gt                206 drivers/gpu/drm/i915/gt/intel_gt.c 	intel_gt_chipset_flush(gt);
gt                209 drivers/gpu/drm/i915/gt/intel_gt.c 		struct intel_uncore *uncore = gt->uncore;
gt                218 drivers/gpu/drm/i915/gt/intel_gt.c void intel_gt_chipset_flush(struct intel_gt *gt)
gt                221 drivers/gpu/drm/i915/gt/intel_gt.c 	if (INTEL_GEN(gt->i915) < 6)
gt                225 drivers/gpu/drm/i915/gt/intel_gt.c int intel_gt_init_scratch(struct intel_gt *gt, unsigned int size)
gt                227 drivers/gpu/drm/i915/gt/intel_gt.c 	struct drm_i915_private *i915 = gt->i915;
gt                240 drivers/gpu/drm/i915/gt/intel_gt.c 	vma = i915_vma_instance(obj, &gt->ggtt->vm, NULL);
gt                250 drivers/gpu/drm/i915/gt/intel_gt.c 	gt->scratch = i915_vma_make_unshrinkable(vma);
gt                259 drivers/gpu/drm/i915/gt/intel_gt.c void intel_gt_fini_scratch(struct intel_gt *gt)
gt                261 drivers/gpu/drm/i915/gt/intel_gt.c 	i915_vma_unpin_and_release(&gt->scratch, 0);
gt                264 drivers/gpu/drm/i915/gt/intel_gt.c void intel_gt_driver_late_release(struct intel_gt *gt)
gt                266 drivers/gpu/drm/i915/gt/intel_gt.c 	intel_uc_driver_late_release(&gt->uc);
gt                267 drivers/gpu/drm/i915/gt/intel_gt.c 	intel_gt_fini_reset(gt);
gt                 30 drivers/gpu/drm/i915/gt/intel_gt.h void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915);
gt                 33 drivers/gpu/drm/i915/gt/intel_gt.h void intel_gt_driver_late_release(struct intel_gt *gt);
gt                 35 drivers/gpu/drm/i915/gt/intel_gt.h void intel_gt_check_and_clear_faults(struct intel_gt *gt);
gt                 36 drivers/gpu/drm/i915/gt/intel_gt.h void intel_gt_clear_error_registers(struct intel_gt *gt,
gt                 39 drivers/gpu/drm/i915/gt/intel_gt.h void intel_gt_flush_ggtt_writes(struct intel_gt *gt);
gt                 40 drivers/gpu/drm/i915/gt/intel_gt.h void intel_gt_chipset_flush(struct intel_gt *gt);
gt                 42 drivers/gpu/drm/i915/gt/intel_gt.h void intel_gt_init_hangcheck(struct intel_gt *gt);
gt                 44 drivers/gpu/drm/i915/gt/intel_gt.h int intel_gt_init_scratch(struct intel_gt *gt, unsigned int size);
gt                 45 drivers/gpu/drm/i915/gt/intel_gt.h void intel_gt_fini_scratch(struct intel_gt *gt);
gt                 47 drivers/gpu/drm/i915/gt/intel_gt.h static inline u32 intel_gt_scratch_offset(const struct intel_gt *gt,
gt                 50 drivers/gpu/drm/i915/gt/intel_gt.h 	return i915_ggtt_offset(gt->scratch) + field;
gt                 53 drivers/gpu/drm/i915/gt/intel_gt.h static inline bool intel_gt_is_wedged(struct intel_gt *gt)
gt                 55 drivers/gpu/drm/i915/gt/intel_gt.h 	return __intel_reset_failed(&gt->reset);
gt                 58 drivers/gpu/drm/i915/gt/intel_gt.h void intel_gt_queue_hangcheck(struct intel_gt *gt);
gt                 39 drivers/gpu/drm/i915/gt/intel_gt_irq.c gen11_gt_engine_identity(struct intel_gt *gt,
gt                 42 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	void __iomem * const regs = gt->uncore->regs;
gt                 46 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	lockdep_assert_held(&gt->irq_lock);
gt                 73 drivers/gpu/drm/i915/gt/intel_gt_irq.c gen11_other_irq_handler(struct intel_gt *gt, const u8 instance,
gt                 77 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		return guc_irq_handler(&gt->uc.guc, iir);
gt                 80 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		return gen11_rps_irq_handler(gt, iir);
gt                 87 drivers/gpu/drm/i915/gt/intel_gt_irq.c gen11_engine_irq_handler(struct intel_gt *gt, const u8 class,
gt                 93 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		engine = gt->engine_class[class][instance];
gt                105 drivers/gpu/drm/i915/gt/intel_gt_irq.c gen11_gt_identity_handler(struct intel_gt *gt, const u32 identity)
gt                115 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		return gen11_engine_irq_handler(gt, class, instance, intr);
gt                118 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		return gen11_other_irq_handler(gt, instance, intr);
gt                125 drivers/gpu/drm/i915/gt/intel_gt_irq.c gen11_gt_bank_handler(struct intel_gt *gt, const unsigned int bank)
gt                127 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	void __iomem * const regs = gt->uncore->regs;
gt                131 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	lockdep_assert_held(&gt->irq_lock);
gt                136 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		const u32 ident = gen11_gt_engine_identity(gt, bank, bit);
gt                138 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		gen11_gt_identity_handler(gt, ident);
gt                145 drivers/gpu/drm/i915/gt/intel_gt_irq.c void gen11_gt_irq_handler(struct intel_gt *gt, const u32 master_ctl)
gt                149 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	spin_lock(&gt->irq_lock);
gt                153 drivers/gpu/drm/i915/gt/intel_gt_irq.c 			gen11_gt_bank_handler(gt, bank);
gt                156 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	spin_unlock(&gt->irq_lock);
gt                159 drivers/gpu/drm/i915/gt/intel_gt_irq.c bool gen11_gt_reset_one_iir(struct intel_gt *gt,
gt                162 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	void __iomem * const regs = gt->uncore->regs;
gt                165 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	lockdep_assert_held(&gt->irq_lock);
gt                173 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		gen11_gt_engine_identity(gt, bank, bit);
gt                189 drivers/gpu/drm/i915/gt/intel_gt_irq.c void gen11_gt_irq_reset(struct intel_gt *gt)
gt                191 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	struct intel_uncore *uncore = gt->uncore;
gt                210 drivers/gpu/drm/i915/gt/intel_gt_irq.c void gen11_gt_irq_postinstall(struct intel_gt *gt)
gt                213 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	struct intel_uncore *uncore = gt->uncore;
gt                234 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	gt->pm_ier = 0x0;
gt                235 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	gt->pm_imr = ~gt->pm_ier;
gt                244 drivers/gpu/drm/i915/gt/intel_gt_irq.c void gen5_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
gt                247 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		intel_engine_breadcrumbs_irq(gt->engine_class[RENDER_CLASS][0]);
gt                249 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		intel_engine_breadcrumbs_irq(gt->engine_class[VIDEO_DECODE_CLASS][0]);
gt                252 drivers/gpu/drm/i915/gt/intel_gt_irq.c static void gen7_parity_error_irq_handler(struct intel_gt *gt, u32 iir)
gt                254 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	if (!HAS_L3_DPF(gt->i915))
gt                257 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	spin_lock(&gt->irq_lock);
gt                258 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	gen5_gt_disable_irq(gt, GT_PARITY_ERROR(gt->i915));
gt                259 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	spin_unlock(&gt->irq_lock);
gt                262 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		gt->i915->l3_parity.which_slice |= 1 << 1;
gt                265 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		gt->i915->l3_parity.which_slice |= 1 << 0;
gt                267 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	schedule_work(&gt->i915->l3_parity.error_work);
gt                270 drivers/gpu/drm/i915/gt/intel_gt_irq.c void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
gt                273 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		intel_engine_breadcrumbs_irq(gt->engine_class[RENDER_CLASS][0]);
gt                275 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		intel_engine_breadcrumbs_irq(gt->engine_class[VIDEO_DECODE_CLASS][0]);
gt                277 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		intel_engine_breadcrumbs_irq(gt->engine_class[COPY_ENGINE_CLASS][0]);
gt                284 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	if (gt_iir & GT_PARITY_ERROR(gt->i915))
gt                285 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		gen7_parity_error_irq_handler(gt, gt_iir);
gt                288 drivers/gpu/drm/i915/gt/intel_gt_irq.c void gen8_gt_irq_ack(struct intel_gt *gt, u32 master_ctl, u32 gt_iir[4])
gt                290 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	void __iomem * const regs = gt->uncore->regs;
gt                317 drivers/gpu/drm/i915/gt/intel_gt_irq.c void gen8_gt_irq_handler(struct intel_gt *gt, u32 master_ctl, u32 gt_iir[4])
gt                320 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		cs_irq_handler(gt->engine_class[RENDER_CLASS][0],
gt                322 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		cs_irq_handler(gt->engine_class[COPY_ENGINE_CLASS][0],
gt                327 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		cs_irq_handler(gt->engine_class[VIDEO_DECODE_CLASS][0],
gt                329 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		cs_irq_handler(gt->engine_class[VIDEO_DECODE_CLASS][1],
gt                334 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		cs_irq_handler(gt->engine_class[VIDEO_ENHANCEMENT_CLASS][0],
gt                339 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		gen6_rps_irq_handler(gt->i915, gt_iir[2]);
gt                340 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		guc_irq_handler(&gt->uc.guc, gt_iir[2] >> 16);
gt                344 drivers/gpu/drm/i915/gt/intel_gt_irq.c void gen8_gt_irq_reset(struct intel_gt *gt)
gt                346 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	struct intel_uncore *uncore = gt->uncore;
gt                354 drivers/gpu/drm/i915/gt/intel_gt_irq.c void gen8_gt_irq_postinstall(struct intel_gt *gt)
gt                356 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	struct intel_uncore *uncore = gt->uncore;
gt                376 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	gt->pm_ier = 0x0;
gt                377 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	gt->pm_imr = ~gt->pm_ier;
gt                384 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	GEN8_IRQ_INIT_NDX(uncore, GT, 2, gt->pm_imr, gt->pm_ier);
gt                388 drivers/gpu/drm/i915/gt/intel_gt_irq.c static void gen5_gt_update_irq(struct intel_gt *gt,
gt                392 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	lockdep_assert_held(&gt->irq_lock);
gt                396 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	gt->gt_imr &= ~interrupt_mask;
gt                397 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	gt->gt_imr |= (~enabled_irq_mask & interrupt_mask);
gt                398 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	intel_uncore_write(gt->uncore, GTIMR, gt->gt_imr);
gt                401 drivers/gpu/drm/i915/gt/intel_gt_irq.c void gen5_gt_enable_irq(struct intel_gt *gt, u32 mask)
gt                403 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	gen5_gt_update_irq(gt, mask, mask);
gt                404 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	intel_uncore_posting_read_fw(gt->uncore, GTIMR);
gt                407 drivers/gpu/drm/i915/gt/intel_gt_irq.c void gen5_gt_disable_irq(struct intel_gt *gt, u32 mask)
gt                409 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	gen5_gt_update_irq(gt, mask, 0);
gt                412 drivers/gpu/drm/i915/gt/intel_gt_irq.c void gen5_gt_irq_reset(struct intel_gt *gt)
gt                414 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	struct intel_uncore *uncore = gt->uncore;
gt                417 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	if (INTEL_GEN(gt->i915) >= 6)
gt                421 drivers/gpu/drm/i915/gt/intel_gt_irq.c void gen5_gt_irq_postinstall(struct intel_gt *gt)
gt                423 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	struct intel_uncore *uncore = gt->uncore;
gt                427 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	gt->gt_imr = ~0;
gt                428 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	if (HAS_L3_DPF(gt->i915)) {
gt                430 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		gt->gt_imr = ~GT_PARITY_ERROR(gt->i915);
gt                431 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		gt_irqs |= GT_PARITY_ERROR(gt->i915);
gt                435 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	if (IS_GEN(gt->i915, 5))
gt                440 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	GEN3_IRQ_INIT(uncore, GT, gt->gt_imr, gt_irqs);
gt                442 drivers/gpu/drm/i915/gt/intel_gt_irq.c 	if (INTEL_GEN(gt->i915) >= 6) {
gt                447 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		if (HAS_ENGINE(gt->i915, VECS0)) {
gt                449 drivers/gpu/drm/i915/gt/intel_gt_irq.c 			gt->pm_ier |= PM_VEBOX_USER_INTERRUPT;
gt                452 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		gt->pm_imr = 0xffffffff;
gt                453 drivers/gpu/drm/i915/gt/intel_gt_irq.c 		GEN3_IRQ_INIT(uncore, GEN6_PM, gt->pm_imr, pm_irqs);
gt                 22 drivers/gpu/drm/i915/gt/intel_gt_irq.h void gen11_gt_irq_reset(struct intel_gt *gt);
gt                 23 drivers/gpu/drm/i915/gt/intel_gt_irq.h void gen11_gt_irq_postinstall(struct intel_gt *gt);
gt                 24 drivers/gpu/drm/i915/gt/intel_gt_irq.h void gen11_gt_irq_handler(struct intel_gt *gt, const u32 master_ctl);
gt                 26 drivers/gpu/drm/i915/gt/intel_gt_irq.h bool gen11_gt_reset_one_iir(struct intel_gt *gt,
gt                 30 drivers/gpu/drm/i915/gt/intel_gt_irq.h void gen5_gt_irq_handler(struct intel_gt *gt, u32 gt_iir);
gt                 32 drivers/gpu/drm/i915/gt/intel_gt_irq.h void gen5_gt_irq_postinstall(struct intel_gt *gt);
gt                 33 drivers/gpu/drm/i915/gt/intel_gt_irq.h void gen5_gt_irq_reset(struct intel_gt *gt);
gt                 34 drivers/gpu/drm/i915/gt/intel_gt_irq.h void gen5_gt_disable_irq(struct intel_gt *gt, u32 mask);
gt                 35 drivers/gpu/drm/i915/gt/intel_gt_irq.h void gen5_gt_enable_irq(struct intel_gt *gt, u32 mask);
gt                 37 drivers/gpu/drm/i915/gt/intel_gt_irq.h void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir);
gt                 39 drivers/gpu/drm/i915/gt/intel_gt_irq.h void gen8_gt_irq_ack(struct intel_gt *gt, u32 master_ctl, u32 gt_iir[4]);
gt                 40 drivers/gpu/drm/i915/gt/intel_gt_irq.h void gen8_gt_irq_reset(struct intel_gt *gt);
gt                 41 drivers/gpu/drm/i915/gt/intel_gt_irq.h void gen8_gt_irq_handler(struct intel_gt *gt, u32 master_ctl, u32 gt_iir[4]);
gt                 42 drivers/gpu/drm/i915/gt/intel_gt_irq.h void gen8_gt_irq_postinstall(struct intel_gt *gt);
gt                 17 drivers/gpu/drm/i915/gt/intel_gt_pm.c 	blocking_notifier_call_chain(&i915->gt.pm_notifications, state, i915);
gt                 22 drivers/gpu/drm/i915/gt/intel_gt_pm.c 	struct intel_gt *gt = container_of(wf, typeof(*gt), wakeref);
gt                 23 drivers/gpu/drm/i915/gt/intel_gt_pm.c 	struct drm_i915_private *i915 = gt->i915;
gt                 38 drivers/gpu/drm/i915/gt/intel_gt_pm.c 	gt->awake = intel_display_power_get(i915, POWER_DOMAIN_GT_IRQ);
gt                 39 drivers/gpu/drm/i915/gt/intel_gt_pm.c 	GEM_BUG_ON(!gt->awake);
gt                 52 drivers/gpu/drm/i915/gt/intel_gt_pm.c 	intel_gt_queue_hangcheck(gt);
gt                 62 drivers/gpu/drm/i915/gt/intel_gt_pm.c 		container_of(wf, typeof(*i915), gt.wakeref);
gt                 63 drivers/gpu/drm/i915/gt/intel_gt_pm.c 	intel_wakeref_t wakeref = fetch_and_zero(&i915->gt.awake);
gt                 93 drivers/gpu/drm/i915/gt/intel_gt_pm.c void intel_gt_pm_init_early(struct intel_gt *gt)
gt                 95 drivers/gpu/drm/i915/gt/intel_gt_pm.c 	intel_wakeref_init(&gt->wakeref, &gt->i915->runtime_pm, &wf_ops);
gt                 97 drivers/gpu/drm/i915/gt/intel_gt_pm.c 	BLOCKING_INIT_NOTIFIER_HEAD(&gt->pm_notifications);
gt                100 drivers/gpu/drm/i915/gt/intel_gt_pm.c static bool reset_engines(struct intel_gt *gt)
gt                102 drivers/gpu/drm/i915/gt/intel_gt_pm.c 	if (INTEL_INFO(gt->i915)->gpu_reset_clobbers_display)
gt                105 drivers/gpu/drm/i915/gt/intel_gt_pm.c 	return __intel_gt_reset(gt, ALL_ENGINES) == 0;
gt                118 drivers/gpu/drm/i915/gt/intel_gt_pm.c void intel_gt_sanitize(struct intel_gt *gt, bool force)
gt                125 drivers/gpu/drm/i915/gt/intel_gt_pm.c 	intel_uc_sanitize(&gt->uc);
gt                127 drivers/gpu/drm/i915/gt/intel_gt_pm.c 	if (!reset_engines(gt) && !force)
gt                130 drivers/gpu/drm/i915/gt/intel_gt_pm.c 	for_each_engine(engine, gt->i915, id)
gt                134 drivers/gpu/drm/i915/gt/intel_gt_pm.c int intel_gt_resume(struct intel_gt *gt)
gt                146 drivers/gpu/drm/i915/gt/intel_gt_pm.c 	intel_gt_pm_get(gt);
gt                147 drivers/gpu/drm/i915/gt/intel_gt_pm.c 	for_each_engine(engine, gt->i915, id) {
gt                161 drivers/gpu/drm/i915/gt/intel_gt_pm.c 			dev_err(gt->i915->drm.dev,
gt                167 drivers/gpu/drm/i915/gt/intel_gt_pm.c 	intel_gt_pm_put(gt);
gt                172 drivers/gpu/drm/i915/gt/intel_gt_pm.c void intel_gt_runtime_suspend(struct intel_gt *gt)
gt                174 drivers/gpu/drm/i915/gt/intel_gt_pm.c 	intel_uc_runtime_suspend(&gt->uc);
gt                177 drivers/gpu/drm/i915/gt/intel_gt_pm.c int intel_gt_runtime_resume(struct intel_gt *gt)
gt                179 drivers/gpu/drm/i915/gt/intel_gt_pm.c 	intel_gt_init_swizzling(gt);
gt                181 drivers/gpu/drm/i915/gt/intel_gt_pm.c 	return intel_uc_runtime_resume(&gt->uc);
gt                 20 drivers/gpu/drm/i915/gt/intel_gt_pm.h static inline bool intel_gt_pm_is_awake(const struct intel_gt *gt)
gt                 22 drivers/gpu/drm/i915/gt/intel_gt_pm.h 	return intel_wakeref_is_active(&gt->wakeref);
gt                 25 drivers/gpu/drm/i915/gt/intel_gt_pm.h static inline void intel_gt_pm_get(struct intel_gt *gt)
gt                 27 drivers/gpu/drm/i915/gt/intel_gt_pm.h 	intel_wakeref_get(&gt->wakeref);
gt                 30 drivers/gpu/drm/i915/gt/intel_gt_pm.h static inline bool intel_gt_pm_get_if_awake(struct intel_gt *gt)
gt                 32 drivers/gpu/drm/i915/gt/intel_gt_pm.h 	return intel_wakeref_get_if_active(&gt->wakeref);
gt                 35 drivers/gpu/drm/i915/gt/intel_gt_pm.h static inline void intel_gt_pm_put(struct intel_gt *gt)
gt                 37 drivers/gpu/drm/i915/gt/intel_gt_pm.h 	intel_wakeref_put(&gt->wakeref);
gt                 40 drivers/gpu/drm/i915/gt/intel_gt_pm.h static inline int intel_gt_pm_wait_for_idle(struct intel_gt *gt)
gt                 42 drivers/gpu/drm/i915/gt/intel_gt_pm.h 	return intel_wakeref_wait_for_idle(&gt->wakeref);
gt                 45 drivers/gpu/drm/i915/gt/intel_gt_pm.h void intel_gt_pm_init_early(struct intel_gt *gt);
gt                 47 drivers/gpu/drm/i915/gt/intel_gt_pm.h void intel_gt_sanitize(struct intel_gt *gt, bool force);
gt                 48 drivers/gpu/drm/i915/gt/intel_gt_pm.h int intel_gt_resume(struct intel_gt *gt);
gt                 49 drivers/gpu/drm/i915/gt/intel_gt_pm.h void intel_gt_runtime_suspend(struct intel_gt *gt);
gt                 50 drivers/gpu/drm/i915/gt/intel_gt_pm.h int intel_gt_runtime_resume(struct intel_gt *gt);
gt                 13 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c static void write_pm_imr(struct intel_gt *gt)
gt                 15 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	struct drm_i915_private *i915 = gt->i915;
gt                 16 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	struct intel_uncore *uncore = gt->uncore;
gt                 17 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	u32 mask = gt->pm_imr;
gt                 32 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c static void gen6_gt_pm_update_irq(struct intel_gt *gt,
gt                 40 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	lockdep_assert_held(&gt->irq_lock);
gt                 42 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	new_val = gt->pm_imr;
gt                 46 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	if (new_val != gt->pm_imr) {
gt                 47 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 		gt->pm_imr = new_val;
gt                 48 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 		write_pm_imr(gt);
gt                 52 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c void gen6_gt_pm_unmask_irq(struct intel_gt *gt, u32 mask)
gt                 54 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	gen6_gt_pm_update_irq(gt, mask, mask);
gt                 57 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c void gen6_gt_pm_mask_irq(struct intel_gt *gt, u32 mask)
gt                 59 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	gen6_gt_pm_update_irq(gt, mask, 0);
gt                 62 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c void gen6_gt_pm_reset_iir(struct intel_gt *gt, u32 reset_mask)
gt                 64 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	struct intel_uncore *uncore = gt->uncore;
gt                 65 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	i915_reg_t reg = INTEL_GEN(gt->i915) >= 8 ? GEN8_GT_IIR(2) : GEN6_PMIIR;
gt                 67 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	lockdep_assert_held(&gt->irq_lock);
gt                 74 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c static void write_pm_ier(struct intel_gt *gt)
gt                 76 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	struct drm_i915_private *i915 = gt->i915;
gt                 77 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	struct intel_uncore *uncore = gt->uncore;
gt                 78 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	u32 mask = gt->pm_ier;
gt                 93 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c void gen6_gt_pm_enable_irq(struct intel_gt *gt, u32 enable_mask)
gt                 95 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	lockdep_assert_held(&gt->irq_lock);
gt                 97 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	gt->pm_ier |= enable_mask;
gt                 98 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	write_pm_ier(gt);
gt                 99 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	gen6_gt_pm_unmask_irq(gt, enable_mask);
gt                102 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c void gen6_gt_pm_disable_irq(struct intel_gt *gt, u32 disable_mask)
gt                104 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	lockdep_assert_held(&gt->irq_lock);
gt                106 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	gt->pm_ier &= ~disable_mask;
gt                107 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	gen6_gt_pm_mask_irq(gt, disable_mask);
gt                108 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.c 	write_pm_ier(gt);
gt                 14 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.h void gen6_gt_pm_unmask_irq(struct intel_gt *gt, u32 mask);
gt                 15 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.h void gen6_gt_pm_mask_irq(struct intel_gt *gt, u32 mask);
gt                 17 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.h void gen6_gt_pm_enable_irq(struct intel_gt *gt, u32 enable_mask);
gt                 18 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.h void gen6_gt_pm_disable_irq(struct intel_gt *gt, u32 disable_mask);
gt                 20 drivers/gpu/drm/i915/gt/intel_gt_pm_irq.h void gen6_gt_pm_reset_iir(struct intel_gt *gt, u32 reset_mask);
gt                122 drivers/gpu/drm/i915/gt/intel_hangcheck.c 		intel_gt_handle_error(engine->gt, engine->mask, 0,
gt                223 drivers/gpu/drm/i915/gt/intel_hangcheck.c static void hangcheck_declare_hang(struct intel_gt *gt,
gt                239 drivers/gpu/drm/i915/gt/intel_hangcheck.c 	for_each_engine_masked(engine, gt->i915, hung, tmp)
gt                244 drivers/gpu/drm/i915/gt/intel_hangcheck.c 	return intel_gt_handle_error(gt, hung, I915_ERROR_CAPTURE, "%s", msg);
gt                257 drivers/gpu/drm/i915/gt/intel_hangcheck.c 	struct intel_gt *gt =
gt                258 drivers/gpu/drm/i915/gt/intel_hangcheck.c 		container_of(work, typeof(*gt), hangcheck.work.work);
gt                267 drivers/gpu/drm/i915/gt/intel_hangcheck.c 	if (!READ_ONCE(gt->awake))
gt                270 drivers/gpu/drm/i915/gt/intel_hangcheck.c 	if (intel_gt_is_wedged(gt))
gt                273 drivers/gpu/drm/i915/gt/intel_hangcheck.c 	wakeref = intel_runtime_pm_get_if_in_use(&gt->i915->runtime_pm);
gt                281 drivers/gpu/drm/i915/gt/intel_hangcheck.c 	intel_uncore_arm_unclaimed_mmio_detection(gt->uncore);
gt                283 drivers/gpu/drm/i915/gt/intel_hangcheck.c 	for_each_engine(engine, gt->i915, id) {
gt                305 drivers/gpu/drm/i915/gt/intel_hangcheck.c 		for_each_engine(engine, gt->i915, id) {
gt                314 drivers/gpu/drm/i915/gt/intel_hangcheck.c 		dev_err(gt->i915->drm.dev,
gt                318 drivers/gpu/drm/i915/gt/intel_hangcheck.c 		intel_gt_set_wedged(gt);
gt                322 drivers/gpu/drm/i915/gt/intel_hangcheck.c 		hangcheck_declare_hang(gt, hung, stuck);
gt                324 drivers/gpu/drm/i915/gt/intel_hangcheck.c 	intel_runtime_pm_put(&gt->i915->runtime_pm, wakeref);
gt                327 drivers/gpu/drm/i915/gt/intel_hangcheck.c 	intel_gt_queue_hangcheck(gt);
gt                330 drivers/gpu/drm/i915/gt/intel_hangcheck.c void intel_gt_queue_hangcheck(struct intel_gt *gt)
gt                344 drivers/gpu/drm/i915/gt/intel_hangcheck.c 	queue_delayed_work(system_long_wq, &gt->hangcheck.work, delay);
gt                353 drivers/gpu/drm/i915/gt/intel_hangcheck.c void intel_gt_init_hangcheck(struct intel_gt *gt)
gt                355 drivers/gpu/drm/i915/gt/intel_hangcheck.c 	INIT_DELAYED_WORK(&gt->hangcheck.work, hangcheck_elapsed);
gt                566 drivers/gpu/drm/i915/gt/intel_lrc.c 	intel_gt_pm_get(engine->gt);
gt                611 drivers/gpu/drm/i915/gt/intel_lrc.c 	intel_gt_pm_put(engine->gt);
gt               2011 drivers/gpu/drm/i915/gt/intel_lrc.c 	*batch++ = intel_gt_scratch_offset(engine->gt,
gt               2026 drivers/gpu/drm/i915/gt/intel_lrc.c 	*batch++ = intel_gt_scratch_offset(engine->gt,
gt               2035 drivers/gpu/drm/i915/gt/intel_lrc.c 	return intel_gt_scratch_offset(engine->gt,
gt               2224 drivers/gpu/drm/i915/gt/intel_lrc.c 	vma = i915_vma_instance(obj, &engine->gt->ggtt->vm, NULL);
gt               2775 drivers/gpu/drm/i915/gt/intel_lrc.c 		intel_gt_scratch_offset(engine->gt,
gt               2846 drivers/gpu/drm/i915/gt/intel_lrc.c 		intel_gt_scratch_offset(engine->gt,
gt               3371 drivers/gpu/drm/i915/gt/intel_lrc.c 	vma = i915_vma_instance(ctx_obj, &engine->gt->ggtt->vm, NULL);
gt               3380 drivers/gpu/drm/i915/gt/intel_lrc.c 		tl = intel_timeline_create(engine->gt, NULL);
gt               3726 drivers/gpu/drm/i915/gt/intel_lrc.c 	ve->base.gt = siblings[0]->gt;
gt                282 drivers/gpu/drm/i915/gt/intel_mocs.c static bool get_mocs_settings(struct intel_gt *gt,
gt                285 drivers/gpu/drm/i915/gt/intel_mocs.c 	struct drm_i915_private *i915 = gt->i915;
gt                369 drivers/gpu/drm/i915/gt/intel_mocs.c 	struct intel_gt *gt = engine->gt;
gt                370 drivers/gpu/drm/i915/gt/intel_mocs.c 	struct intel_uncore *uncore = gt->uncore;
gt                376 drivers/gpu/drm/i915/gt/intel_mocs.c 	if (HAS_GLOBAL_MOCS_REGISTERS(gt->i915))
gt                382 drivers/gpu/drm/i915/gt/intel_mocs.c 	if (!get_mocs_settings(gt, &table))
gt                403 drivers/gpu/drm/i915/gt/intel_mocs.c static void intel_mocs_init_global(struct intel_gt *gt)
gt                405 drivers/gpu/drm/i915/gt/intel_mocs.c 	struct intel_uncore *uncore = gt->uncore;
gt                409 drivers/gpu/drm/i915/gt/intel_mocs.c 	GEM_BUG_ON(!HAS_GLOBAL_MOCS_REGISTERS(gt->i915));
gt                411 drivers/gpu/drm/i915/gt/intel_mocs.c 	if (!get_mocs_settings(gt, &table))
gt                540 drivers/gpu/drm/i915/gt/intel_mocs.c static void intel_mocs_init_l3cc_table(struct intel_gt *gt)
gt                542 drivers/gpu/drm/i915/gt/intel_mocs.c 	struct intel_uncore *uncore = gt->uncore;
gt                547 drivers/gpu/drm/i915/gt/intel_mocs.c 	if (!get_mocs_settings(gt, &table))
gt                605 drivers/gpu/drm/i915/gt/intel_mocs.c 	if (get_mocs_settings(rq->engine->gt, &t)) {
gt                620 drivers/gpu/drm/i915/gt/intel_mocs.c void intel_mocs_init(struct intel_gt *gt)
gt                622 drivers/gpu/drm/i915/gt/intel_mocs.c 	intel_mocs_init_l3cc_table(gt);
gt                624 drivers/gpu/drm/i915/gt/intel_mocs.c 	if (HAS_GLOBAL_MOCS_REGISTERS(gt->i915))
gt                625 drivers/gpu/drm/i915/gt/intel_mocs.c 		intel_mocs_init_global(gt);
gt                 56 drivers/gpu/drm/i915/gt/intel_mocs.h void intel_mocs_init(struct intel_gt *gt);
gt                196 drivers/gpu/drm/i915/gt/intel_renderstate.c 	so.vma = i915_vma_instance(so.obj, &engine->gt->ggtt->vm, NULL);
gt                145 drivers/gpu/drm/i915/gt/intel_reset.c static int i915_do_reset(struct intel_gt *gt,
gt                149 drivers/gpu/drm/i915/gt/intel_reset.c 	struct pci_dev *pdev = gt->i915->drm.pdev;
gt                174 drivers/gpu/drm/i915/gt/intel_reset.c static int g33_do_reset(struct intel_gt *gt,
gt                178 drivers/gpu/drm/i915/gt/intel_reset.c 	struct pci_dev *pdev = gt->i915->drm.pdev;
gt                184 drivers/gpu/drm/i915/gt/intel_reset.c static int g4x_do_reset(struct intel_gt *gt,
gt                188 drivers/gpu/drm/i915/gt/intel_reset.c 	struct pci_dev *pdev = gt->i915->drm.pdev;
gt                189 drivers/gpu/drm/i915/gt/intel_reset.c 	struct intel_uncore *uncore = gt->uncore;
gt                221 drivers/gpu/drm/i915/gt/intel_reset.c static int ironlake_do_reset(struct intel_gt *gt,
gt                225 drivers/gpu/drm/i915/gt/intel_reset.c 	struct intel_uncore *uncore = gt->uncore;
gt                257 drivers/gpu/drm/i915/gt/intel_reset.c static int gen6_hw_domain_reset(struct intel_gt *gt, u32 hw_domain_mask)
gt                259 drivers/gpu/drm/i915/gt/intel_reset.c 	struct intel_uncore *uncore = gt->uncore;
gt                281 drivers/gpu/drm/i915/gt/intel_reset.c static int gen6_reset_engines(struct intel_gt *gt,
gt                301 drivers/gpu/drm/i915/gt/intel_reset.c 		for_each_engine_masked(engine, gt->i915, engine_mask, tmp) {
gt                307 drivers/gpu/drm/i915/gt/intel_reset.c 	return gen6_hw_domain_reset(gt, hw_mask);
gt                405 drivers/gpu/drm/i915/gt/intel_reset.c static int gen11_reset_engines(struct intel_gt *gt,
gt                428 drivers/gpu/drm/i915/gt/intel_reset.c 		for_each_engine_masked(engine, gt->i915, engine_mask, tmp) {
gt                435 drivers/gpu/drm/i915/gt/intel_reset.c 	ret = gen6_hw_domain_reset(gt, hw_mask);
gt                438 drivers/gpu/drm/i915/gt/intel_reset.c 		for_each_engine_masked(engine, gt->i915, engine_mask, tmp)
gt                488 drivers/gpu/drm/i915/gt/intel_reset.c static int gen8_reset_engines(struct intel_gt *gt,
gt                497 drivers/gpu/drm/i915/gt/intel_reset.c 	for_each_engine_masked(engine, gt->i915, engine_mask, tmp) {
gt                517 drivers/gpu/drm/i915/gt/intel_reset.c 	if (INTEL_GEN(gt->i915) >= 11)
gt                518 drivers/gpu/drm/i915/gt/intel_reset.c 		ret = gen11_reset_engines(gt, engine_mask, retry);
gt                520 drivers/gpu/drm/i915/gt/intel_reset.c 		ret = gen6_reset_engines(gt, engine_mask, retry);
gt                523 drivers/gpu/drm/i915/gt/intel_reset.c 	for_each_engine_masked(engine, gt->i915, engine_mask, tmp)
gt                551 drivers/gpu/drm/i915/gt/intel_reset.c int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask)
gt                558 drivers/gpu/drm/i915/gt/intel_reset.c 	reset = intel_get_gpu_reset(gt->i915);
gt                566 drivers/gpu/drm/i915/gt/intel_reset.c 	intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_ALL);
gt                570 drivers/gpu/drm/i915/gt/intel_reset.c 		ret = reset(gt, engine_mask, retry);
gt                573 drivers/gpu/drm/i915/gt/intel_reset.c 	intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_ALL);
gt                591 drivers/gpu/drm/i915/gt/intel_reset.c int intel_reset_guc(struct intel_gt *gt)
gt                594 drivers/gpu/drm/i915/gt/intel_reset.c 		INTEL_GEN(gt->i915) >= 11 ? GEN11_GRDOM_GUC : GEN9_GRDOM_GUC;
gt                597 drivers/gpu/drm/i915/gt/intel_reset.c 	GEM_BUG_ON(!HAS_GT_UC(gt->i915));
gt                599 drivers/gpu/drm/i915/gt/intel_reset.c 	intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_ALL);
gt                600 drivers/gpu/drm/i915/gt/intel_reset.c 	ret = gen6_hw_domain_reset(gt, guc_domain);
gt                601 drivers/gpu/drm/i915/gt/intel_reset.c 	intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_ALL);
gt                623 drivers/gpu/drm/i915/gt/intel_reset.c static void revoke_mmaps(struct intel_gt *gt)
gt                627 drivers/gpu/drm/i915/gt/intel_reset.c 	for (i = 0; i < gt->ggtt->num_fences; i++) {
gt                632 drivers/gpu/drm/i915/gt/intel_reset.c 		vma = READ_ONCE(gt->ggtt->fence_regs[i].vma);
gt                639 drivers/gpu/drm/i915/gt/intel_reset.c 		GEM_BUG_ON(vma->fence != &gt->ggtt->fence_regs[i]);
gt                642 drivers/gpu/drm/i915/gt/intel_reset.c 		unmap_mapping_range(gt->i915->drm.anon_inode->i_mapping,
gt                649 drivers/gpu/drm/i915/gt/intel_reset.c static intel_engine_mask_t reset_prepare(struct intel_gt *gt)
gt                655 drivers/gpu/drm/i915/gt/intel_reset.c 	for_each_engine(engine, gt->i915, id) {
gt                661 drivers/gpu/drm/i915/gt/intel_reset.c 	intel_uc_reset_prepare(&gt->uc);
gt                666 drivers/gpu/drm/i915/gt/intel_reset.c static void gt_revoke(struct intel_gt *gt)
gt                668 drivers/gpu/drm/i915/gt/intel_reset.c 	revoke_mmaps(gt);
gt                671 drivers/gpu/drm/i915/gt/intel_reset.c static int gt_reset(struct intel_gt *gt, intel_engine_mask_t stalled_mask)
gt                681 drivers/gpu/drm/i915/gt/intel_reset.c 	err = i915_ggtt_enable_hw(gt->i915);
gt                685 drivers/gpu/drm/i915/gt/intel_reset.c 	for_each_engine(engine, gt->i915, id)
gt                688 drivers/gpu/drm/i915/gt/intel_reset.c 	i915_gem_restore_fences(gt->i915);
gt                701 drivers/gpu/drm/i915/gt/intel_reset.c static void reset_finish(struct intel_gt *gt, intel_engine_mask_t awake)
gt                706 drivers/gpu/drm/i915/gt/intel_reset.c 	for_each_engine(engine, gt->i915, id) {
gt                730 drivers/gpu/drm/i915/gt/intel_reset.c static void __intel_gt_set_wedged(struct intel_gt *gt)
gt                736 drivers/gpu/drm/i915/gt/intel_reset.c 	if (test_bit(I915_WEDGED, &gt->reset.flags))
gt                739 drivers/gpu/drm/i915/gt/intel_reset.c 	if (GEM_SHOW_DEBUG() && !intel_engines_are_idle(gt)) {
gt                742 drivers/gpu/drm/i915/gt/intel_reset.c 		for_each_engine(engine, gt->i915, id)
gt                753 drivers/gpu/drm/i915/gt/intel_reset.c 	awake = reset_prepare(gt);
gt                756 drivers/gpu/drm/i915/gt/intel_reset.c 	if (!INTEL_INFO(gt->i915)->gpu_reset_clobbers_display)
gt                757 drivers/gpu/drm/i915/gt/intel_reset.c 		__intel_gt_reset(gt, ALL_ENGINES);
gt                759 drivers/gpu/drm/i915/gt/intel_reset.c 	for_each_engine(engine, gt->i915, id)
gt                768 drivers/gpu/drm/i915/gt/intel_reset.c 	set_bit(I915_WEDGED, &gt->reset.flags);
gt                771 drivers/gpu/drm/i915/gt/intel_reset.c 	for_each_engine(engine, gt->i915, id)
gt                774 drivers/gpu/drm/i915/gt/intel_reset.c 	reset_finish(gt, awake);
gt                779 drivers/gpu/drm/i915/gt/intel_reset.c void intel_gt_set_wedged(struct intel_gt *gt)
gt                783 drivers/gpu/drm/i915/gt/intel_reset.c 	mutex_lock(&gt->reset.mutex);
gt                784 drivers/gpu/drm/i915/gt/intel_reset.c 	with_intel_runtime_pm(&gt->i915->runtime_pm, wakeref)
gt                785 drivers/gpu/drm/i915/gt/intel_reset.c 		__intel_gt_set_wedged(gt);
gt                786 drivers/gpu/drm/i915/gt/intel_reset.c 	mutex_unlock(&gt->reset.mutex);
gt                789 drivers/gpu/drm/i915/gt/intel_reset.c static bool __intel_gt_unset_wedged(struct intel_gt *gt)
gt                791 drivers/gpu/drm/i915/gt/intel_reset.c 	struct intel_gt_timelines *timelines = &gt->timelines;
gt                795 drivers/gpu/drm/i915/gt/intel_reset.c 	if (!test_bit(I915_WEDGED, &gt->reset.flags))
gt                798 drivers/gpu/drm/i915/gt/intel_reset.c 	if (!gt->scratch) /* Never full initialised, recovery impossible */
gt                839 drivers/gpu/drm/i915/gt/intel_reset.c 	intel_gt_sanitize(gt, false);
gt                850 drivers/gpu/drm/i915/gt/intel_reset.c 	intel_engines_reset_default_submission(gt);
gt                855 drivers/gpu/drm/i915/gt/intel_reset.c 	clear_bit(I915_WEDGED, &gt->reset.flags);
gt                860 drivers/gpu/drm/i915/gt/intel_reset.c bool intel_gt_unset_wedged(struct intel_gt *gt)
gt                864 drivers/gpu/drm/i915/gt/intel_reset.c 	mutex_lock(&gt->reset.mutex);
gt                865 drivers/gpu/drm/i915/gt/intel_reset.c 	result = __intel_gt_unset_wedged(gt);
gt                866 drivers/gpu/drm/i915/gt/intel_reset.c 	mutex_unlock(&gt->reset.mutex);
gt                871 drivers/gpu/drm/i915/gt/intel_reset.c static int do_reset(struct intel_gt *gt, intel_engine_mask_t stalled_mask)
gt                875 drivers/gpu/drm/i915/gt/intel_reset.c 	gt_revoke(gt);
gt                877 drivers/gpu/drm/i915/gt/intel_reset.c 	err = __intel_gt_reset(gt, ALL_ENGINES);
gt                880 drivers/gpu/drm/i915/gt/intel_reset.c 		err = __intel_gt_reset(gt, ALL_ENGINES);
gt                885 drivers/gpu/drm/i915/gt/intel_reset.c 	return gt_reset(gt, stalled_mask);
gt                888 drivers/gpu/drm/i915/gt/intel_reset.c static int resume(struct intel_gt *gt)
gt                894 drivers/gpu/drm/i915/gt/intel_reset.c 	for_each_engine(engine, gt->i915, id) {
gt                920 drivers/gpu/drm/i915/gt/intel_reset.c void intel_gt_reset(struct intel_gt *gt,
gt                927 drivers/gpu/drm/i915/gt/intel_reset.c 	GEM_TRACE("flags=%lx\n", gt->reset.flags);
gt                930 drivers/gpu/drm/i915/gt/intel_reset.c 	GEM_BUG_ON(!test_bit(I915_RESET_BACKOFF, &gt->reset.flags));
gt                931 drivers/gpu/drm/i915/gt/intel_reset.c 	mutex_lock(&gt->reset.mutex);
gt                934 drivers/gpu/drm/i915/gt/intel_reset.c 	if (!__intel_gt_unset_wedged(gt))
gt                938 drivers/gpu/drm/i915/gt/intel_reset.c 		dev_notice(gt->i915->drm.dev,
gt                940 drivers/gpu/drm/i915/gt/intel_reset.c 	atomic_inc(&gt->i915->gpu_error.reset_count);
gt                942 drivers/gpu/drm/i915/gt/intel_reset.c 	awake = reset_prepare(gt);
gt                944 drivers/gpu/drm/i915/gt/intel_reset.c 	if (!intel_has_gpu_reset(gt->i915)) {
gt                946 drivers/gpu/drm/i915/gt/intel_reset.c 			dev_err(gt->i915->drm.dev, "GPU reset not supported\n");
gt                952 drivers/gpu/drm/i915/gt/intel_reset.c 	if (INTEL_INFO(gt->i915)->gpu_reset_clobbers_display)
gt                953 drivers/gpu/drm/i915/gt/intel_reset.c 		intel_runtime_pm_disable_interrupts(gt->i915);
gt                955 drivers/gpu/drm/i915/gt/intel_reset.c 	if (do_reset(gt, stalled_mask)) {
gt                956 drivers/gpu/drm/i915/gt/intel_reset.c 		dev_err(gt->i915->drm.dev, "Failed to reset chip\n");
gt                960 drivers/gpu/drm/i915/gt/intel_reset.c 	if (INTEL_INFO(gt->i915)->gpu_reset_clobbers_display)
gt                961 drivers/gpu/drm/i915/gt/intel_reset.c 		intel_runtime_pm_enable_interrupts(gt->i915);
gt                963 drivers/gpu/drm/i915/gt/intel_reset.c 	intel_overlay_reset(gt->i915);
gt                973 drivers/gpu/drm/i915/gt/intel_reset.c 	ret = i915_gem_init_hw(gt->i915);
gt                980 drivers/gpu/drm/i915/gt/intel_reset.c 	ret = resume(gt);
gt                984 drivers/gpu/drm/i915/gt/intel_reset.c 	intel_gt_queue_hangcheck(gt);
gt                987 drivers/gpu/drm/i915/gt/intel_reset.c 	reset_finish(gt, awake);
gt                989 drivers/gpu/drm/i915/gt/intel_reset.c 	mutex_unlock(&gt->reset.mutex);
gt               1007 drivers/gpu/drm/i915/gt/intel_reset.c 	__intel_gt_set_wedged(gt);
gt               1013 drivers/gpu/drm/i915/gt/intel_reset.c 	return __intel_gt_reset(engine->gt, engine->mask);
gt               1031 drivers/gpu/drm/i915/gt/intel_reset.c 	struct intel_gt *gt = engine->gt;
gt               1034 drivers/gpu/drm/i915/gt/intel_reset.c 	GEM_TRACE("%s flags=%lx\n", engine->name, gt->reset.flags);
gt               1035 drivers/gpu/drm/i915/gt/intel_reset.c 	GEM_BUG_ON(!test_bit(I915_RESET_ENGINE + engine->id, &gt->reset.flags));
gt               1047 drivers/gpu/drm/i915/gt/intel_reset.c 	if (!engine->gt->uc.guc.execbuf_client)
gt               1050 drivers/gpu/drm/i915/gt/intel_reset.c 		ret = intel_guc_reset_engine(&engine->gt->uc.guc, engine);
gt               1054 drivers/gpu/drm/i915/gt/intel_reset.c 				 engine->gt->uc.guc.execbuf_client ? "GuC " : "",
gt               1080 drivers/gpu/drm/i915/gt/intel_reset.c static void intel_gt_reset_global(struct intel_gt *gt,
gt               1084 drivers/gpu/drm/i915/gt/intel_reset.c 	struct kobject *kobj = &gt->i915->drm.primary->kdev->kobj;
gt               1096 drivers/gpu/drm/i915/gt/intel_reset.c 	intel_wedge_on_timeout(&w, gt, 5 * HZ) {
gt               1097 drivers/gpu/drm/i915/gt/intel_reset.c 		intel_prepare_reset(gt->i915);
gt               1100 drivers/gpu/drm/i915/gt/intel_reset.c 		synchronize_srcu_expedited(&gt->reset.backoff_srcu);
gt               1102 drivers/gpu/drm/i915/gt/intel_reset.c 		intel_gt_reset(gt, engine_mask, reason);
gt               1104 drivers/gpu/drm/i915/gt/intel_reset.c 		intel_finish_reset(gt->i915);
gt               1107 drivers/gpu/drm/i915/gt/intel_reset.c 	if (!test_bit(I915_WEDGED, &gt->reset.flags))
gt               1124 drivers/gpu/drm/i915/gt/intel_reset.c void intel_gt_handle_error(struct intel_gt *gt,
gt               1152 drivers/gpu/drm/i915/gt/intel_reset.c 	wakeref = intel_runtime_pm_get(&gt->i915->runtime_pm);
gt               1154 drivers/gpu/drm/i915/gt/intel_reset.c 	engine_mask &= INTEL_INFO(gt->i915)->engine_mask;
gt               1157 drivers/gpu/drm/i915/gt/intel_reset.c 		i915_capture_error_state(gt->i915, engine_mask, msg);
gt               1158 drivers/gpu/drm/i915/gt/intel_reset.c 		intel_gt_clear_error_registers(gt, engine_mask);
gt               1165 drivers/gpu/drm/i915/gt/intel_reset.c 	if (intel_has_reset_engine(gt->i915) && !intel_gt_is_wedged(gt)) {
gt               1166 drivers/gpu/drm/i915/gt/intel_reset.c 		for_each_engine_masked(engine, gt->i915, engine_mask, tmp) {
gt               1169 drivers/gpu/drm/i915/gt/intel_reset.c 					     &gt->reset.flags))
gt               1176 drivers/gpu/drm/i915/gt/intel_reset.c 					      &gt->reset.flags);
gt               1184 drivers/gpu/drm/i915/gt/intel_reset.c 	if (test_and_set_bit(I915_RESET_BACKOFF, &gt->reset.flags)) {
gt               1185 drivers/gpu/drm/i915/gt/intel_reset.c 		wait_event(gt->reset.queue,
gt               1186 drivers/gpu/drm/i915/gt/intel_reset.c 			   !test_bit(I915_RESET_BACKOFF, &gt->reset.flags));
gt               1194 drivers/gpu/drm/i915/gt/intel_reset.c 	for_each_engine(engine, gt->i915, tmp) {
gt               1196 drivers/gpu/drm/i915/gt/intel_reset.c 					&gt->reset.flags))
gt               1197 drivers/gpu/drm/i915/gt/intel_reset.c 			wait_on_bit(&gt->reset.flags,
gt               1202 drivers/gpu/drm/i915/gt/intel_reset.c 	intel_gt_reset_global(gt, engine_mask, msg);
gt               1204 drivers/gpu/drm/i915/gt/intel_reset.c 	for_each_engine(engine, gt->i915, tmp)
gt               1206 drivers/gpu/drm/i915/gt/intel_reset.c 				 &gt->reset.flags);
gt               1207 drivers/gpu/drm/i915/gt/intel_reset.c 	clear_bit_unlock(I915_RESET_BACKOFF, &gt->reset.flags);
gt               1209 drivers/gpu/drm/i915/gt/intel_reset.c 	wake_up_all(&gt->reset.queue);
gt               1212 drivers/gpu/drm/i915/gt/intel_reset.c 	intel_runtime_pm_put(&gt->i915->runtime_pm, wakeref);
gt               1215 drivers/gpu/drm/i915/gt/intel_reset.c int intel_gt_reset_trylock(struct intel_gt *gt, int *srcu)
gt               1217 drivers/gpu/drm/i915/gt/intel_reset.c 	might_lock(&gt->reset.backoff_srcu);
gt               1221 drivers/gpu/drm/i915/gt/intel_reset.c 	while (test_bit(I915_RESET_BACKOFF, &gt->reset.flags)) {
gt               1224 drivers/gpu/drm/i915/gt/intel_reset.c 		if (wait_event_interruptible(gt->reset.queue,
gt               1226 drivers/gpu/drm/i915/gt/intel_reset.c 						       &gt->reset.flags)))
gt               1231 drivers/gpu/drm/i915/gt/intel_reset.c 	*srcu = srcu_read_lock(&gt->reset.backoff_srcu);
gt               1237 drivers/gpu/drm/i915/gt/intel_reset.c void intel_gt_reset_unlock(struct intel_gt *gt, int tag)
gt               1238 drivers/gpu/drm/i915/gt/intel_reset.c __releases(&gt->reset.backoff_srcu)
gt               1240 drivers/gpu/drm/i915/gt/intel_reset.c 	srcu_read_unlock(&gt->reset.backoff_srcu, tag);
gt               1243 drivers/gpu/drm/i915/gt/intel_reset.c int intel_gt_terminally_wedged(struct intel_gt *gt)
gt               1247 drivers/gpu/drm/i915/gt/intel_reset.c 	if (!intel_gt_is_wedged(gt))
gt               1251 drivers/gpu/drm/i915/gt/intel_reset.c 	if (!test_bit(I915_RESET_BACKOFF, &gt->reset.flags))
gt               1255 drivers/gpu/drm/i915/gt/intel_reset.c 	if (mutex_is_locked(&gt->i915->drm.struct_mutex))
gt               1258 drivers/gpu/drm/i915/gt/intel_reset.c 	if (wait_event_interruptible(gt->reset.queue,
gt               1260 drivers/gpu/drm/i915/gt/intel_reset.c 					       &gt->reset.flags)))
gt               1263 drivers/gpu/drm/i915/gt/intel_reset.c 	return intel_gt_is_wedged(gt) ? -EIO : 0;
gt               1266 drivers/gpu/drm/i915/gt/intel_reset.c void intel_gt_init_reset(struct intel_gt *gt)
gt               1268 drivers/gpu/drm/i915/gt/intel_reset.c 	init_waitqueue_head(&gt->reset.queue);
gt               1269 drivers/gpu/drm/i915/gt/intel_reset.c 	mutex_init(&gt->reset.mutex);
gt               1270 drivers/gpu/drm/i915/gt/intel_reset.c 	init_srcu_struct(&gt->reset.backoff_srcu);
gt               1273 drivers/gpu/drm/i915/gt/intel_reset.c void intel_gt_fini_reset(struct intel_gt *gt)
gt               1275 drivers/gpu/drm/i915/gt/intel_reset.c 	cleanup_srcu_struct(&gt->reset.backoff_srcu);
gt               1282 drivers/gpu/drm/i915/gt/intel_reset.c 	dev_err(w->gt->i915->drm.dev,
gt               1285 drivers/gpu/drm/i915/gt/intel_reset.c 	intel_gt_set_wedged(w->gt);
gt               1289 drivers/gpu/drm/i915/gt/intel_reset.c 			struct intel_gt *gt,
gt               1293 drivers/gpu/drm/i915/gt/intel_reset.c 	w->gt = gt;
gt               1304 drivers/gpu/drm/i915/gt/intel_reset.c 	w->gt = NULL;
gt                 23 drivers/gpu/drm/i915/gt/intel_reset.h void intel_gt_init_reset(struct intel_gt *gt);
gt                 24 drivers/gpu/drm/i915/gt/intel_reset.h void intel_gt_fini_reset(struct intel_gt *gt);
gt                 27 drivers/gpu/drm/i915/gt/intel_reset.h void intel_gt_handle_error(struct intel_gt *gt,
gt                 33 drivers/gpu/drm/i915/gt/intel_reset.h void intel_gt_reset(struct intel_gt *gt,
gt                 41 drivers/gpu/drm/i915/gt/intel_reset.h int __must_check intel_gt_reset_trylock(struct intel_gt *gt, int *srcu);
gt                 42 drivers/gpu/drm/i915/gt/intel_reset.h void intel_gt_reset_unlock(struct intel_gt *gt, int tag);
gt                 44 drivers/gpu/drm/i915/gt/intel_reset.h void intel_gt_set_wedged(struct intel_gt *gt);
gt                 45 drivers/gpu/drm/i915/gt/intel_reset.h bool intel_gt_unset_wedged(struct intel_gt *gt);
gt                 46 drivers/gpu/drm/i915/gt/intel_reset.h int intel_gt_terminally_wedged(struct intel_gt *gt);
gt                 48 drivers/gpu/drm/i915/gt/intel_reset.h int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask);
gt                 50 drivers/gpu/drm/i915/gt/intel_reset.h int intel_reset_guc(struct intel_gt *gt);
gt                 54 drivers/gpu/drm/i915/gt/intel_reset.h 	struct intel_gt *gt;
gt                 59 drivers/gpu/drm/i915/gt/intel_reset.h 			struct intel_gt *gt,
gt                 66 drivers/gpu/drm/i915/gt/intel_reset.h 	     (W)->gt;							\
gt                 80 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 		*cs++ = intel_gt_scratch_offset(rq->engine->gt,
gt                154 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 		*cs++ = intel_gt_scratch_offset(rq->engine->gt,
gt                164 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 		*cs++ = intel_gt_scratch_offset(rq->engine->gt,
gt                219 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 		intel_gt_scratch_offset(rq->engine->gt,
gt                254 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 		intel_gt_scratch_offset(rq->engine->gt,
gt                313 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 	*cs++ = intel_gt_scratch_offset(rq->engine->gt,
gt                359 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 		intel_gt_scratch_offset(rq->engine->gt,
gt                987 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 	gen5_gt_enable_irq(engine->gt, engine->irq_enable_mask);
gt                993 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 	gen5_gt_disable_irq(engine->gt, engine->irq_enable_mask);
gt               1054 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 	gen5_gt_enable_irq(engine->gt, engine->irq_enable_mask);
gt               1061 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 	gen5_gt_disable_irq(engine->gt, engine->irq_enable_mask);
gt               1072 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 	gen6_gt_pm_unmask_irq(engine->gt, engine->irq_enable_mask);
gt               1079 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 	gen6_gt_pm_mask_irq(engine->gt, engine->irq_enable_mask);
gt               1111 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 		intel_gt_scratch_offset(rq->engine->gt,
gt               1114 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 	GEM_BUG_ON(rq->engine->gt->scratch->size < I830_WA_SIZE);
gt               1327 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 	vma = create_ring_vma(engine->gt->ggtt, size);
gt               1455 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 	vma = i915_vma_instance(obj, &engine->gt->ggtt->vm, NULL);
gt               1564 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 	*cs++ = intel_gt_scratch_offset(rq->engine->gt,
gt               1681 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 			*cs++ = intel_gt_scratch_offset(rq->engine->gt,
gt               2343 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 	timeline = intel_timeline_create(engine->gt, engine->status_page.vma);
gt                 19 drivers/gpu/drm/i915/gt/intel_timeline.c 	struct intel_gt *gt;
gt                 34 drivers/gpu/drm/i915/gt/intel_timeline.c static struct i915_vma *__hwsp_alloc(struct intel_gt *gt)
gt                 36 drivers/gpu/drm/i915/gt/intel_timeline.c 	struct drm_i915_private *i915 = gt->i915;
gt                 46 drivers/gpu/drm/i915/gt/intel_timeline.c 	vma = i915_vma_instance(obj, &gt->ggtt->vm, NULL);
gt                 56 drivers/gpu/drm/i915/gt/intel_timeline.c 	struct intel_gt_timelines *gt = &timeline->gt->timelines;
gt                 61 drivers/gpu/drm/i915/gt/intel_timeline.c 	spin_lock_irq(&gt->hwsp_lock);
gt                 64 drivers/gpu/drm/i915/gt/intel_timeline.c 	hwsp = list_first_entry_or_null(&gt->hwsp_free_list,
gt                 69 drivers/gpu/drm/i915/gt/intel_timeline.c 		spin_unlock_irq(&gt->hwsp_lock);
gt                 75 drivers/gpu/drm/i915/gt/intel_timeline.c 		vma = __hwsp_alloc(timeline->gt);
gt                 82 drivers/gpu/drm/i915/gt/intel_timeline.c 		hwsp->gt = timeline->gt;
gt                 85 drivers/gpu/drm/i915/gt/intel_timeline.c 		hwsp->gt_timelines = gt;
gt                 87 drivers/gpu/drm/i915/gt/intel_timeline.c 		spin_lock_irq(&gt->hwsp_lock);
gt                 88 drivers/gpu/drm/i915/gt/intel_timeline.c 		list_add(&hwsp->free_link, &gt->hwsp_free_list);
gt                 97 drivers/gpu/drm/i915/gt/intel_timeline.c 	spin_unlock_irq(&gt->hwsp_lock);
gt                105 drivers/gpu/drm/i915/gt/intel_timeline.c 	struct intel_gt_timelines *gt = hwsp->gt_timelines;
gt                108 drivers/gpu/drm/i915/gt/intel_timeline.c 	spin_lock_irqsave(&gt->hwsp_lock, flags);
gt                112 drivers/gpu/drm/i915/gt/intel_timeline.c 		list_add_tail(&hwsp->free_link, &gt->hwsp_free_list);
gt                124 drivers/gpu/drm/i915/gt/intel_timeline.c 	spin_unlock_irqrestore(&gt->hwsp_lock, flags);
gt                180 drivers/gpu/drm/i915/gt/intel_timeline.c 	i915_active_init(hwsp->gt->i915, &cl->active,
gt                208 drivers/gpu/drm/i915/gt/intel_timeline.c 			struct intel_gt *gt,
gt                216 drivers/gpu/drm/i915/gt/intel_timeline.c 	timeline->gt = gt;
gt                265 drivers/gpu/drm/i915/gt/intel_timeline.c static void timelines_init(struct intel_gt *gt)
gt                267 drivers/gpu/drm/i915/gt/intel_timeline.c 	struct intel_gt_timelines *timelines = &gt->timelines;
gt                278 drivers/gpu/drm/i915/gt/intel_timeline.c 	timelines_init(&i915->gt);
gt                295 drivers/gpu/drm/i915/gt/intel_timeline.c intel_timeline_create(struct intel_gt *gt, struct i915_vma *global_hwsp)
gt                304 drivers/gpu/drm/i915/gt/intel_timeline.c 	err = intel_timeline_init(timeline, gt, global_hwsp);
gt                339 drivers/gpu/drm/i915/gt/intel_timeline.c 	struct intel_gt_timelines *timelines = &tl->gt->timelines;
gt                356 drivers/gpu/drm/i915/gt/intel_timeline.c 	struct intel_gt_timelines *timelines = &tl->gt->timelines;
gt                547 drivers/gpu/drm/i915/gt/intel_timeline.c static void timelines_fini(struct intel_gt *gt)
gt                549 drivers/gpu/drm/i915/gt/intel_timeline.c 	struct intel_gt_timelines *timelines = &gt->timelines;
gt                557 drivers/gpu/drm/i915/gt/intel_timeline.c 	timelines_fini(&i915->gt);
gt                 35 drivers/gpu/drm/i915/gt/intel_timeline.h 			struct intel_gt *gt,
gt                 40 drivers/gpu/drm/i915/gt/intel_timeline.h intel_timeline_create(struct intel_gt *gt, struct i915_vma *global_hwsp);
gt                 80 drivers/gpu/drm/i915/gt/intel_timeline_types.h 	struct intel_gt *gt;
gt                993 drivers/gpu/drm/i915/gt/intel_workarounds.c void intel_gt_apply_workarounds(struct intel_gt *gt)
gt                995 drivers/gpu/drm/i915/gt/intel_workarounds.c 	wa_list_apply(gt->uncore, &gt->i915->gt_wa_list);
gt               1014 drivers/gpu/drm/i915/gt/intel_workarounds.c bool intel_gt_verify_workarounds(struct intel_gt *gt, const char *from)
gt               1016 drivers/gpu/drm/i915/gt/intel_workarounds.c 	return wa_list_verify(gt->uncore, &gt->i915->gt_wa_list, from);
gt               1514 drivers/gpu/drm/i915/gt/intel_workarounds.c 	vma = create_scratch(&ce->engine->gt->ggtt->vm, wal->count);
gt                 29 drivers/gpu/drm/i915/gt/intel_workarounds.h void intel_gt_apply_workarounds(struct intel_gt *gt);
gt                 30 drivers/gpu/drm/i915/gt/intel_workarounds.h bool intel_gt_verify_workarounds(struct intel_gt *gt, const char *from);
gt                138 drivers/gpu/drm/i915/gt/mock_engine.c 	ce->timeline = intel_timeline_create(ce->engine->gt, NULL);
gt                250 drivers/gpu/drm/i915/gt/mock_engine.c 	engine->base.gt = &i915->gt;
gt                145 drivers/gpu/drm/i915/gt/selftest_context.c 	struct intel_gt *gt = arg;
gt                156 drivers/gpu/drm/i915/gt/selftest_context.c 	mutex_lock(&gt->i915->drm.struct_mutex);
gt                158 drivers/gpu/drm/i915/gt/selftest_context.c 	fixme = kernel_context(gt->i915);
gt                164 drivers/gpu/drm/i915/gt/selftest_context.c 	for_each_engine(engine, gt->i915, id) {
gt                203 drivers/gpu/drm/i915/gt/selftest_context.c 	mutex_unlock(&gt->i915->drm.struct_mutex);
gt                295 drivers/gpu/drm/i915/gt/selftest_context.c 	struct intel_gt *gt = arg;
gt                302 drivers/gpu/drm/i915/gt/selftest_context.c 	file = mock_file(gt->i915);
gt                306 drivers/gpu/drm/i915/gt/selftest_context.c 	mutex_lock(&gt->i915->drm.struct_mutex);
gt                308 drivers/gpu/drm/i915/gt/selftest_context.c 	fixme = live_context(gt->i915, file);
gt                314 drivers/gpu/drm/i915/gt/selftest_context.c 	for_each_engine(engine, gt->i915, id) {
gt                319 drivers/gpu/drm/i915/gt/selftest_context.c 		err = igt_flush_test(gt->i915, I915_WAIT_LOCKED);
gt                325 drivers/gpu/drm/i915/gt/selftest_context.c 	mutex_unlock(&gt->i915->drm.struct_mutex);
gt                326 drivers/gpu/drm/i915/gt/selftest_context.c 	mock_file_free(gt->i915, file);
gt                408 drivers/gpu/drm/i915/gt/selftest_context.c 	struct intel_gt *gt = arg;
gt                415 drivers/gpu/drm/i915/gt/selftest_context.c 	file = mock_file(gt->i915);
gt                419 drivers/gpu/drm/i915/gt/selftest_context.c 	mutex_lock(&gt->i915->drm.struct_mutex);
gt                421 drivers/gpu/drm/i915/gt/selftest_context.c 	fixme = live_context(gt->i915, file);
gt                427 drivers/gpu/drm/i915/gt/selftest_context.c 	for_each_engine(engine, gt->i915, id) {
gt                432 drivers/gpu/drm/i915/gt/selftest_context.c 		err = igt_flush_test(gt->i915, I915_WAIT_LOCKED);
gt                438 drivers/gpu/drm/i915/gt/selftest_context.c 	mutex_unlock(&gt->i915->drm.struct_mutex);
gt                439 drivers/gpu/drm/i915/gt/selftest_context.c 	mock_file_free(gt->i915, file);
gt                450 drivers/gpu/drm/i915/gt/selftest_context.c 	struct intel_gt *gt = &i915->gt;
gt                452 drivers/gpu/drm/i915/gt/selftest_context.c 	if (intel_gt_is_wedged(gt))
gt                455 drivers/gpu/drm/i915/gt/selftest_context.c 	return intel_gt_live_subtests(tests, gt);
gt                 16 drivers/gpu/drm/i915/gt/selftest_engine.c 	struct intel_gt *gt = &i915->gt;
gt                 22 drivers/gpu/drm/i915/gt/selftest_engine.c 		err = (*fn)(gt);
gt                 12 drivers/gpu/drm/i915/gt/selftest_engine.h int live_engine_pm_selftests(struct intel_gt *gt);
gt                 13 drivers/gpu/drm/i915/gt/selftest_engine_pm.c 	struct intel_gt *gt = arg;
gt                 22 drivers/gpu/drm/i915/gt/selftest_engine_pm.c 	if (intel_gt_pm_wait_for_idle(gt)) {
gt                 27 drivers/gpu/drm/i915/gt/selftest_engine_pm.c 	GEM_BUG_ON(intel_gt_pm_is_awake(gt));
gt                 28 drivers/gpu/drm/i915/gt/selftest_engine_pm.c 	for_each_engine(engine, gt->i915, id) {
gt                 66 drivers/gpu/drm/i915/gt/selftest_engine_pm.c 			if (intel_gt_pm_wait_for_idle(gt)) {
gt                 76 drivers/gpu/drm/i915/gt/selftest_engine_pm.c int live_engine_pm_selftests(struct intel_gt *gt)
gt                 82 drivers/gpu/drm/i915/gt/selftest_engine_pm.c 	return intel_gt_live_subtests(tests, gt);
gt                 45 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct intel_gt *gt;
gt                 53 drivers/gpu/drm/i915/gt/selftest_hangcheck.c static int hang_init(struct hang *h, struct intel_gt *gt)
gt                 59 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	h->gt = gt;
gt                 61 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	h->ctx = kernel_context(gt->i915);
gt                 67 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	h->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
gt                 73 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	h->obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
gt                 88 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 					i915_coherent_map_type(gt->i915));
gt                133 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct intel_gt *gt = h->gt;
gt                134 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct i915_address_space *vm = h->ctx->vm ?: &engine->gt->ggtt->vm;
gt                143 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
gt                147 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	vaddr = i915_gem_object_pin_map(obj, i915_coherent_map_type(gt->i915));
gt                190 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	if (INTEL_GEN(gt->i915) >= 8) {
gt                204 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	} else if (INTEL_GEN(gt->i915) >= 6) {
gt                217 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	} else if (INTEL_GEN(gt->i915) >= 4) {
gt                244 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	intel_gt_chipset_flush(engine->gt);
gt                253 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	if (INTEL_GEN(gt->i915) <= 5)
gt                278 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	intel_gt_chipset_flush(h->gt);
gt                288 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	igt_flush_test(h->gt->i915, I915_WAIT_LOCKED);
gt                303 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct intel_gt *gt = arg;
gt                312 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_lock(&gt->i915->drm.struct_mutex);
gt                313 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	err = hang_init(&h, gt);
gt                317 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	for_each_engine(engine, gt->i915, id) {
gt                335 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		intel_gt_chipset_flush(engine->gt);
gt                340 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		intel_wedge_on_timeout(&w, gt, HZ / 10 /* 100ms */)
gt                343 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		if (intel_gt_is_wedged(gt))
gt                359 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_unlock(&gt->i915->drm.struct_mutex);
gt                370 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct intel_gt *gt = arg;
gt                371 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct i915_gpu_error *global = &gt->i915->gpu_error;
gt                382 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	file = mock_file(gt->i915);
gt                386 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_lock(&gt->i915->drm.struct_mutex);
gt                387 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	ctx = live_context(gt->i915, file);
gt                388 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_unlock(&gt->i915->drm.struct_mutex);
gt                398 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		mutex_lock(&gt->i915->drm.struct_mutex);
gt                400 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		for_each_engine(engine, gt->i915, id) {
gt                416 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		igt_global_reset_lock(gt);
gt                417 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		intel_gt_reset(gt, ALL_ENGINES, NULL);
gt                418 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		igt_global_reset_unlock(gt);
gt                420 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		mutex_unlock(&gt->i915->drm.struct_mutex);
gt                421 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		if (intel_gt_is_wedged(gt)) {
gt                432 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		err = igt_flush_test(gt->i915, 0);
gt                438 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_lock(&gt->i915->drm.struct_mutex);
gt                439 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	err = igt_flush_test(gt->i915, I915_WAIT_LOCKED);
gt                440 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_unlock(&gt->i915->drm.struct_mutex);
gt                443 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mock_file_free(gt->i915, file);
gt                444 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	if (intel_gt_is_wedged(gt))
gt                451 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct intel_gt *gt = arg;
gt                452 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct i915_gpu_error *global = &gt->i915->gpu_error;
gt                461 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	if (!intel_has_reset_engine(gt->i915))
gt                464 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	file = mock_file(gt->i915);
gt                468 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_lock(&gt->i915->drm.struct_mutex);
gt                469 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	ctx = live_context(gt->i915, file);
gt                470 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_unlock(&gt->i915->drm.struct_mutex);
gt                477 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	for_each_engine(engine, gt->i915, id) {
gt                486 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		set_bit(I915_RESET_ENGINE + id, &gt->reset.flags);
gt                497 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 			mutex_lock(&gt->i915->drm.struct_mutex);
gt                510 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 			mutex_unlock(&gt->i915->drm.struct_mutex);
gt                530 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		clear_bit(I915_RESET_ENGINE + id, &gt->reset.flags);
gt                536 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		err = igt_flush_test(gt->i915, 0);
gt                541 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_lock(&gt->i915->drm.struct_mutex);
gt                542 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	err = igt_flush_test(gt->i915, I915_WAIT_LOCKED);
gt                543 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_unlock(&gt->i915->drm.struct_mutex);
gt                546 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mock_file_free(gt->i915, file);
gt                547 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	if (intel_gt_is_wedged(gt))
gt                552 drivers/gpu/drm/i915/gt/selftest_hangcheck.c static int __igt_reset_engine(struct intel_gt *gt, bool active)
gt                554 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct i915_gpu_error *global = &gt->i915->gpu_error;
gt                562 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	if (!intel_has_reset_engine(gt->i915))
gt                566 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		mutex_lock(&gt->i915->drm.struct_mutex);
gt                567 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		err = hang_init(&h, gt);
gt                568 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		mutex_unlock(&gt->i915->drm.struct_mutex);
gt                573 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	for_each_engine(engine, gt->i915, id) {
gt                591 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		set_bit(I915_RESET_ENGINE + id, &gt->reset.flags);
gt                596 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 				mutex_lock(&gt->i915->drm.struct_mutex);
gt                600 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 					mutex_unlock(&gt->i915->drm.struct_mutex);
gt                606 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 				mutex_unlock(&gt->i915->drm.struct_mutex);
gt                609 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 					struct drm_printer p = drm_info_printer(gt->i915->drm.dev);
gt                644 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		clear_bit(I915_RESET_ENGINE + id, &gt->reset.flags);
gt                650 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		err = igt_flush_test(gt->i915, 0);
gt                655 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	if (intel_gt_is_wedged(gt))
gt                659 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		mutex_lock(&gt->i915->drm.struct_mutex);
gt                661 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		mutex_unlock(&gt->i915->drm.struct_mutex);
gt                703 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		intel_gt_set_wedged(rq->engine->gt);
gt                780 drivers/gpu/drm/i915/gt/selftest_hangcheck.c static int __igt_reset_engines(struct intel_gt *gt,
gt                784 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct i915_gpu_error *global = &gt->i915->gpu_error;
gt                794 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	if (!intel_has_reset_engine(gt->i915))
gt                798 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		mutex_lock(&gt->i915->drm.struct_mutex);
gt                799 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		err = hang_init(&h, gt);
gt                800 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		mutex_unlock(&gt->i915->drm.struct_mutex);
gt                808 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	for_each_engine(engine, gt->i915, id) {
gt                826 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		for_each_engine(other, gt->i915, tmp) {
gt                853 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		set_bit(I915_RESET_ENGINE + id, &gt->reset.flags);
gt                858 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 				mutex_lock(&gt->i915->drm.struct_mutex);
gt                862 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 					mutex_unlock(&gt->i915->drm.struct_mutex);
gt                868 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 				mutex_unlock(&gt->i915->drm.struct_mutex);
gt                871 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 					struct drm_printer p = drm_info_printer(gt->i915->drm.dev);
gt                896 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 						drm_info_printer(gt->i915->drm.dev);
gt                906 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 					intel_gt_set_wedged(gt);
gt                916 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 					drm_info_printer(gt->i915->drm.dev);
gt                928 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		clear_bit(I915_RESET_ENGINE + id, &gt->reset.flags);
gt                943 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		for_each_engine(other, gt->i915, tmp) {
gt                980 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		mutex_lock(&gt->i915->drm.struct_mutex);
gt                981 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		err = igt_flush_test(gt->i915, I915_WAIT_LOCKED);
gt                982 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		mutex_unlock(&gt->i915->drm.struct_mutex);
gt                987 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	if (intel_gt_is_wedged(gt))
gt                991 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		mutex_lock(&gt->i915->drm.struct_mutex);
gt                993 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		mutex_unlock(&gt->i915->drm.struct_mutex);
gt               1019 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct intel_gt *gt = arg;
gt               1025 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 			if (!(gt->i915->caps.scheduler & I915_SCHEDULER_CAP_PRIORITY))
gt               1037 drivers/gpu/drm/i915/gt/selftest_hangcheck.c static u32 fake_hangcheck(struct intel_gt *gt, intel_engine_mask_t mask)
gt               1039 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	u32 count = i915_reset_count(&gt->i915->gpu_error);
gt               1041 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	intel_gt_reset(gt, mask, NULL);
gt               1048 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct intel_gt *gt = arg;
gt               1049 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct i915_gpu_error *global = &gt->i915->gpu_error;
gt               1050 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct intel_engine_cs *engine = gt->i915->engine[RCS0];
gt               1062 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	igt_global_reset_lock(gt);
gt               1064 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_lock(&gt->i915->drm.struct_mutex);
gt               1065 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	err = hang_init(&h, gt);
gt               1079 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		struct drm_printer p = drm_info_printer(gt->i915->drm.dev);
gt               1085 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		intel_gt_set_wedged(gt);
gt               1091 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	reset_count = fake_hangcheck(gt, ALL_ENGINES);
gt               1112 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_unlock(&gt->i915->drm.struct_mutex);
gt               1113 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	igt_global_reset_unlock(gt);
gt               1115 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	if (intel_gt_is_wedged(gt))
gt               1181 drivers/gpu/drm/i915/gt/selftest_hangcheck.c static int __igt_reset_evict_vma(struct intel_gt *gt,
gt               1186 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct intel_engine_cs *engine = gt->i915->engine[RCS0];
gt               1199 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_lock(&gt->i915->drm.struct_mutex);
gt               1200 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	err = hang_init(&h, gt);
gt               1204 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	obj = i915_gem_object_create_internal(gt->i915, SZ_1M);
gt               1265 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_unlock(&gt->i915->drm.struct_mutex);
gt               1268 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		struct drm_printer p = drm_info_printer(gt->i915->drm.dev);
gt               1274 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		intel_gt_set_wedged(gt);
gt               1291 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		struct drm_printer p = drm_info_printer(gt->i915->drm.dev);
gt               1296 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		intel_gt_set_wedged(gt);
gt               1301 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	igt_global_reset_lock(gt);
gt               1302 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	fake_hangcheck(gt, rq->engine->mask);
gt               1303 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	igt_global_reset_unlock(gt);
gt               1309 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		intel_wedge_on_timeout(&w, gt, HZ / 10 /* 100ms */)
gt               1315 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_lock(&gt->i915->drm.struct_mutex);
gt               1323 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_unlock(&gt->i915->drm.struct_mutex);
gt               1325 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	if (intel_gt_is_wedged(gt))
gt               1333 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct intel_gt *gt = arg;
gt               1335 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	return __igt_reset_evict_vma(gt, &gt->ggtt->vm,
gt               1341 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct intel_gt *gt = arg;
gt               1346 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	file = mock_file(gt->i915);
gt               1350 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_lock(&gt->i915->drm.struct_mutex);
gt               1351 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	ctx = live_context(gt->i915, file);
gt               1352 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_unlock(&gt->i915->drm.struct_mutex);
gt               1360 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		err = __igt_reset_evict_vma(gt, ctx->vm,
gt               1364 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mock_file_free(gt->i915, file);
gt               1370 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct intel_gt *gt = arg;
gt               1372 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	return __igt_reset_evict_vma(gt, &gt->ggtt->vm,
gt               1376 drivers/gpu/drm/i915/gt/selftest_hangcheck.c static int wait_for_others(struct intel_gt *gt,
gt               1382 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	for_each_engine(engine, gt->i915, id) {
gt               1395 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct intel_gt *gt = arg;
gt               1396 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct i915_gpu_error *global = &gt->i915->gpu_error;
gt               1404 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	igt_global_reset_lock(gt);
gt               1406 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_lock(&gt->i915->drm.struct_mutex);
gt               1407 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	err = hang_init(&h, gt);
gt               1411 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	for_each_engine(engine, gt->i915, id) {
gt               1452 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 			err = wait_for_others(gt, engine);
gt               1460 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 				intel_gt_set_wedged(gt);
gt               1465 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 				struct drm_printer p = drm_info_printer(gt->i915->drm.dev);
gt               1476 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 				intel_gt_set_wedged(gt);
gt               1482 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 			reset_count = fake_hangcheck(gt, BIT(id));
gt               1517 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		intel_gt_chipset_flush(engine->gt);
gt               1521 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		err = igt_flush_test(gt->i915, I915_WAIT_LOCKED);
gt               1529 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_unlock(&gt->i915->drm.struct_mutex);
gt               1530 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	igt_global_reset_unlock(gt);
gt               1532 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	if (intel_gt_is_wedged(gt))
gt               1540 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct intel_gt *gt = arg;
gt               1541 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct i915_gpu_error *global = &gt->i915->gpu_error;
gt               1542 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct intel_engine_cs *engine = gt->i915->engine[RCS0];
gt               1550 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	if (!intel_has_reset_engine(gt->i915))
gt               1556 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_lock(&gt->i915->drm.struct_mutex);
gt               1558 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	err = hang_init(&h, gt);
gt               1572 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		struct drm_printer p = drm_info_printer(gt->i915->drm.dev);
gt               1578 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		intel_gt_set_wedged(gt);
gt               1584 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_unlock(&gt->i915->drm.struct_mutex);
gt               1589 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	intel_gt_handle_error(gt, engine->mask, 0, NULL);
gt               1593 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_lock(&gt->i915->drm.struct_mutex);
gt               1606 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_unlock(&gt->i915->drm.struct_mutex);
gt               1646 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	err = hang_init(&h, engine->gt);
gt               1665 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		intel_gt_set_wedged(engine->gt);
gt               1672 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		intel_wedge_on_timeout(&w, engine->gt, HZ / 20 /* 50ms */)
gt               1674 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		if (intel_gt_is_wedged(engine->gt))
gt               1686 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct intel_gt *gt = arg;
gt               1692 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	if (!intel_has_reset_engine(gt->i915))
gt               1695 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	if (USES_GUC_SUBMISSION(gt->i915))
gt               1698 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	igt_global_reset_lock(gt);
gt               1699 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_lock(&gt->i915->drm.struct_mutex);
gt               1702 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	if (!igt_force_reset(gt))
gt               1709 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 		for_each_engine(engine, gt->i915, id) {
gt               1718 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	igt_force_reset(gt);
gt               1721 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_unlock(&gt->i915->drm.struct_mutex);
gt               1722 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	igt_global_reset_unlock(gt);
gt               1744 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	struct intel_gt *gt = &i915->gt;
gt               1749 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	if (!intel_has_gpu_reset(gt->i915))
gt               1752 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	if (intel_gt_is_wedged(gt))
gt               1755 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	wakeref = intel_runtime_pm_get(&gt->i915->runtime_pm);
gt               1757 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	drain_delayed_work(&gt->hangcheck.work); /* flush param */
gt               1759 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	err = intel_gt_live_subtests(tests, gt);
gt               1761 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_lock(&gt->i915->drm.struct_mutex);
gt               1762 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	igt_flush_test(gt->i915, I915_WAIT_LOCKED);
gt               1763 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	mutex_unlock(&gt->i915->drm.struct_mutex);
gt               1766 drivers/gpu/drm/i915/gt/selftest_hangcheck.c 	intel_runtime_pm_put(&gt->i915->runtime_pm, wakeref);
gt                 38 drivers/gpu/drm/i915/gt/selftest_lrc.c 	if (igt_spinner_init(&spin, &i915->gt))
gt                 58 drivers/gpu/drm/i915/gt/selftest_lrc.c 			intel_gt_set_wedged(&i915->gt);
gt                215 drivers/gpu/drm/i915/gt/selftest_lrc.c 		intel_gt_set_wedged(outer->gt);
gt                455 drivers/gpu/drm/i915/gt/selftest_lrc.c 			intel_gt_set_wedged(&i915->gt);
gt                521 drivers/gpu/drm/i915/gt/selftest_lrc.c 	if (igt_spinner_init(&spin_hi, &i915->gt))
gt                524 drivers/gpu/drm/i915/gt/selftest_lrc.c 	if (igt_spinner_init(&spin_lo, &i915->gt))
gt                562 drivers/gpu/drm/i915/gt/selftest_lrc.c 			intel_gt_set_wedged(&i915->gt);
gt                579 drivers/gpu/drm/i915/gt/selftest_lrc.c 			intel_gt_set_wedged(&i915->gt);
gt                625 drivers/gpu/drm/i915/gt/selftest_lrc.c 	if (igt_spinner_init(&spin_hi, &i915->gt))
gt                628 drivers/gpu/drm/i915/gt/selftest_lrc.c 	if (igt_spinner_init(&spin_lo, &i915->gt))
gt                716 drivers/gpu/drm/i915/gt/selftest_lrc.c 	intel_gt_set_wedged(&i915->gt);
gt                733 drivers/gpu/drm/i915/gt/selftest_lrc.c 	if (igt_spinner_init(&c->spin, &i915->gt))
gt                852 drivers/gpu/drm/i915/gt/selftest_lrc.c 	intel_gt_set_wedged(&i915->gt);
gt                968 drivers/gpu/drm/i915/gt/selftest_lrc.c 	intel_gt_set_wedged(&i915->gt);
gt               1139 drivers/gpu/drm/i915/gt/selftest_lrc.c 	intel_gt_set_wedged(&i915->gt);
gt               1285 drivers/gpu/drm/i915/gt/selftest_lrc.c 	intel_gt_set_wedged(&i915->gt);
gt               1309 drivers/gpu/drm/i915/gt/selftest_lrc.c 	if (igt_spinner_init(&spin_hi, &i915->gt))
gt               1312 drivers/gpu/drm/i915/gt/selftest_lrc.c 	if (igt_spinner_init(&spin_lo, &i915->gt))
gt               1344 drivers/gpu/drm/i915/gt/selftest_lrc.c 			intel_gt_set_wedged(&i915->gt);
gt               1366 drivers/gpu/drm/i915/gt/selftest_lrc.c 			intel_gt_set_wedged(&i915->gt);
gt               1371 drivers/gpu/drm/i915/gt/selftest_lrc.c 		set_bit(I915_RESET_ENGINE + id, &i915->gt.reset.flags);
gt               1373 drivers/gpu/drm/i915/gt/selftest_lrc.c 		clear_bit(I915_RESET_ENGINE + id, &i915->gt.reset.flags);
gt               1380 drivers/gpu/drm/i915/gt/selftest_lrc.c 			intel_gt_set_wedged(&i915->gt);
gt               1762 drivers/gpu/drm/i915/gt/selftest_lrc.c 				intel_gt_set_wedged(&i915->gt);
gt               1800 drivers/gpu/drm/i915/gt/selftest_lrc.c 	struct intel_gt *gt = &i915->gt;
gt               1824 drivers/gpu/drm/i915/gt/selftest_lrc.c 			if (!gt->engine_class[class][inst])
gt               1827 drivers/gpu/drm/i915/gt/selftest_lrc.c 			siblings[nsibling++] = gt->engine_class[class][inst];
gt               1910 drivers/gpu/drm/i915/gt/selftest_lrc.c 			intel_gt_set_wedged(&i915->gt);
gt               1948 drivers/gpu/drm/i915/gt/selftest_lrc.c 	struct intel_gt *gt = &i915->gt;
gt               1962 drivers/gpu/drm/i915/gt/selftest_lrc.c 			if (!gt->engine_class[class][inst])
gt               1965 drivers/gpu/drm/i915/gt/selftest_lrc.c 			siblings[nsibling++] = gt->engine_class[class][inst];
gt               2126 drivers/gpu/drm/i915/gt/selftest_lrc.c 	struct intel_gt *gt = &i915->gt;
gt               2141 drivers/gpu/drm/i915/gt/selftest_lrc.c 			if (!gt->engine_class[class][inst])
gt               2145 drivers/gpu/drm/i915/gt/selftest_lrc.c 			siblings[nsibling++] = gt->engine_class[class][inst];
gt               2189 drivers/gpu/drm/i915/gt/selftest_lrc.c 	if (intel_gt_is_wedged(&i915->gt))
gt                 12 drivers/gpu/drm/i915/gt/selftest_reset.c 	struct intel_gt *gt = arg;
gt                 19 drivers/gpu/drm/i915/gt/selftest_reset.c 	igt_global_reset_lock(gt);
gt                 20 drivers/gpu/drm/i915/gt/selftest_reset.c 	wakeref = intel_runtime_pm_get(&gt->i915->runtime_pm);
gt                 22 drivers/gpu/drm/i915/gt/selftest_reset.c 	reset_count = i915_reset_count(&gt->i915->gpu_error);
gt                 24 drivers/gpu/drm/i915/gt/selftest_reset.c 	intel_gt_reset(gt, ALL_ENGINES, NULL);
gt                 26 drivers/gpu/drm/i915/gt/selftest_reset.c 	if (i915_reset_count(&gt->i915->gpu_error) == reset_count) {
gt                 31 drivers/gpu/drm/i915/gt/selftest_reset.c 	intel_runtime_pm_put(&gt->i915->runtime_pm, wakeref);
gt                 32 drivers/gpu/drm/i915/gt/selftest_reset.c 	igt_global_reset_unlock(gt);
gt                 34 drivers/gpu/drm/i915/gt/selftest_reset.c 	if (intel_gt_is_wedged(gt))
gt                 42 drivers/gpu/drm/i915/gt/selftest_reset.c 	struct intel_gt *gt = arg;
gt                 47 drivers/gpu/drm/i915/gt/selftest_reset.c 	igt_global_reset_lock(gt);
gt                 48 drivers/gpu/drm/i915/gt/selftest_reset.c 	wakeref = intel_runtime_pm_get(&gt->i915->runtime_pm);
gt                 50 drivers/gpu/drm/i915/gt/selftest_reset.c 	intel_gt_set_wedged(gt);
gt                 52 drivers/gpu/drm/i915/gt/selftest_reset.c 	GEM_BUG_ON(!intel_gt_is_wedged(gt));
gt                 53 drivers/gpu/drm/i915/gt/selftest_reset.c 	intel_gt_reset(gt, ALL_ENGINES, NULL);
gt                 55 drivers/gpu/drm/i915/gt/selftest_reset.c 	intel_runtime_pm_put(&gt->i915->runtime_pm, wakeref);
gt                 56 drivers/gpu/drm/i915/gt/selftest_reset.c 	igt_global_reset_unlock(gt);
gt                 58 drivers/gpu/drm/i915/gt/selftest_reset.c 	return intel_gt_is_wedged(gt) ? -EIO : 0;
gt                 63 drivers/gpu/drm/i915/gt/selftest_reset.c 	struct intel_gt *gt = arg;
gt                 69 drivers/gpu/drm/i915/gt/selftest_reset.c 	intel_gt_pm_get(gt);
gt                 70 drivers/gpu/drm/i915/gt/selftest_reset.c 	igt_global_reset_lock(gt);
gt                 73 drivers/gpu/drm/i915/gt/selftest_reset.c 	if (!igt_force_reset(gt))
gt                 81 drivers/gpu/drm/i915/gt/selftest_reset.c 		awake = reset_prepare(gt);
gt                 84 drivers/gpu/drm/i915/gt/selftest_reset.c 		err = __intel_gt_reset(gt, ALL_ENGINES);
gt                 87 drivers/gpu/drm/i915/gt/selftest_reset.c 		reset_finish(gt, awake);
gt                 96 drivers/gpu/drm/i915/gt/selftest_reset.c 	igt_force_reset(gt);
gt                 99 drivers/gpu/drm/i915/gt/selftest_reset.c 	igt_global_reset_unlock(gt);
gt                100 drivers/gpu/drm/i915/gt/selftest_reset.c 	intel_gt_pm_put(gt);
gt                107 drivers/gpu/drm/i915/gt/selftest_reset.c 	struct intel_gt *gt = arg;
gt                115 drivers/gpu/drm/i915/gt/selftest_reset.c 	if (!intel_has_reset_engine(gt->i915))
gt                118 drivers/gpu/drm/i915/gt/selftest_reset.c 	if (USES_GUC_SUBMISSION(gt->i915))
gt                121 drivers/gpu/drm/i915/gt/selftest_reset.c 	intel_gt_pm_get(gt);
gt                122 drivers/gpu/drm/i915/gt/selftest_reset.c 	igt_global_reset_lock(gt);
gt                125 drivers/gpu/drm/i915/gt/selftest_reset.c 	if (!igt_force_reset(gt))
gt                128 drivers/gpu/drm/i915/gt/selftest_reset.c 	for_each_engine(engine, gt->i915, id) {
gt                154 drivers/gpu/drm/i915/gt/selftest_reset.c 	igt_force_reset(gt);
gt                157 drivers/gpu/drm/i915/gt/selftest_reset.c 	igt_global_reset_unlock(gt);
gt                158 drivers/gpu/drm/i915/gt/selftest_reset.c 	intel_gt_pm_put(gt);
gt                171 drivers/gpu/drm/i915/gt/selftest_reset.c 	struct intel_gt *gt = &i915->gt;
gt                173 drivers/gpu/drm/i915/gt/selftest_reset.c 	if (!intel_has_gpu_reset(gt->i915))
gt                176 drivers/gpu/drm/i915/gt/selftest_reset.c 	if (intel_gt_is_wedged(gt))
gt                179 drivers/gpu/drm/i915/gt/selftest_reset.c 	return intel_gt_live_subtests(tests, gt);
gt                 70 drivers/gpu/drm/i915/gt/selftest_timeline.c 		tl = intel_timeline_create(&state->i915->gt, NULL);
gt                452 drivers/gpu/drm/i915/gt/selftest_timeline.c 	lockdep_assert_held(&tl->gt->i915->drm.struct_mutex); /* lazy rq refs */
gt                482 drivers/gpu/drm/i915/gt/selftest_timeline.c 	tl = intel_timeline_create(&i915->gt, NULL);
gt                664 drivers/gpu/drm/i915/gt/selftest_timeline.c 	tl = intel_timeline_create(&i915->gt, NULL);
gt                842 drivers/gpu/drm/i915/gt/selftest_timeline.c 	if (intel_gt_is_wedged(&i915->gt))
gt                 99 drivers/gpu/drm/i915/gt/selftest_workarounds.c 	vma = i915_vma_instance(result, &engine->gt->ggtt->vm, NULL);
gt                194 drivers/gpu/drm/i915/gt/selftest_workarounds.c 	intel_wedge_on_timeout(&wedge, &ctx->i915->gt, HZ / 5) /* safety net! */
gt                197 drivers/gpu/drm/i915/gt/selftest_workarounds.c 	if (intel_gt_is_wedged(&ctx->i915->gt))
gt                230 drivers/gpu/drm/i915/gt/selftest_workarounds.c 	intel_gt_reset(engine->gt, engine->mask, "live_workarounds");
gt                302 drivers/gpu/drm/i915/gt/selftest_workarounds.c 	err = igt_spinner_init(&spin, engine->gt);
gt                554 drivers/gpu/drm/i915/gt/selftest_workarounds.c 		intel_gt_chipset_flush(engine->gt);
gt                582 drivers/gpu/drm/i915/gt/selftest_workarounds.c 			intel_gt_set_wedged(&ctx->i915->gt);
gt                740 drivers/gpu/drm/i915/gt/selftest_workarounds.c 	igt_global_reset_lock(&i915->gt);
gt                759 drivers/gpu/drm/i915/gt/selftest_workarounds.c 	igt_global_reset_unlock(&i915->gt);
gt                839 drivers/gpu/drm/i915/gt/selftest_workarounds.c 	intel_gt_chipset_flush(engine->gt);
gt               1129 drivers/gpu/drm/i915/gt/selftest_workarounds.c 	igt_global_reset_lock(&i915->gt);
gt               1138 drivers/gpu/drm/i915/gt/selftest_workarounds.c 	intel_gt_reset(&i915->gt, ALL_ENGINES, "live_workarounds");
gt               1147 drivers/gpu/drm/i915/gt/selftest_workarounds.c 	igt_global_reset_unlock(&i915->gt);
gt               1172 drivers/gpu/drm/i915/gt/selftest_workarounds.c 	igt_global_reset_lock(&i915->gt);
gt               1197 drivers/gpu/drm/i915/gt/selftest_workarounds.c 		ret = igt_spinner_init(&spin, engine->gt);
gt               1232 drivers/gpu/drm/i915/gt/selftest_workarounds.c 	igt_global_reset_unlock(&i915->gt);
gt               1251 drivers/gpu/drm/i915/gt/selftest_workarounds.c 	if (intel_gt_is_wedged(&i915->gt))
gt                 13 drivers/gpu/drm/i915/gt/selftests/mock_timeline.c 	timeline->gt = NULL;
gt                 14 drivers/gpu/drm/i915/gt/uc/intel_guc.c 	struct intel_gt *gt = guc_to_gt(guc);
gt                 16 drivers/gpu/drm/i915/gt/uc/intel_guc.c 	intel_uncore_write(gt->uncore, GUC_SEND_INTERRUPT, GUC_SEND_TRIGGER);
gt                 21 drivers/gpu/drm/i915/gt/uc/intel_guc.c 	struct intel_gt *gt = guc_to_gt(guc);
gt                 23 drivers/gpu/drm/i915/gt/uc/intel_guc.c 	intel_uncore_write(gt->uncore, GEN11_GUC_HOST_INTERRUPT, 0);
gt                 37 drivers/gpu/drm/i915/gt/uc/intel_guc.c 	struct intel_gt *gt = guc_to_gt(guc);
gt                 41 drivers/gpu/drm/i915/gt/uc/intel_guc.c 	if (INTEL_GEN(gt->i915) >= 11) {
gt                 52 drivers/gpu/drm/i915/gt/uc/intel_guc.c 		fw_domains |= intel_uncore_forcewake_for_reg(gt->uncore,
gt                250 drivers/gpu/drm/i915/gt/uc/intel_guc.c 	struct intel_gt *gt = guc_to_gt(guc);
gt                289 drivers/gpu/drm/i915/gt/uc/intel_guc.c 	i915_ggtt_enable_guc(gt->ggtt);
gt                305 drivers/gpu/drm/i915/gt/uc/intel_guc.c 	DRM_DEV_DEBUG_DRIVER(gt->i915->drm.dev, "failed with %d\n", ret);
gt                311 drivers/gpu/drm/i915/gt/uc/intel_guc.c 	struct intel_gt *gt = guc_to_gt(guc);
gt                316 drivers/gpu/drm/i915/gt/uc/intel_guc.c 	i915_ggtt_disable_guc(gt->ggtt);
gt                593 drivers/gpu/drm/i915/gt/uc/intel_guc.c 	struct intel_gt *gt = guc_to_gt(guc);
gt                599 drivers/gpu/drm/i915/gt/uc/intel_guc.c 	obj = i915_gem_object_create_shmem(gt->i915, size);
gt                603 drivers/gpu/drm/i915/gt/uc/intel_guc.c 	vma = i915_vma_instance(obj, &gt->ggtt->vm, NULL);
gt                135 drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c 	struct intel_gt *gt = guc_to_gt(guc);
gt                136 drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c 	struct intel_uncore *uncore = gt->uncore;
gt                152 drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c 	ret = intel_uc_fw_upload(&guc->fw, gt, 0x2000, UOS_MOVE);
gt                494 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 	struct intel_guc *guc = &engine->gt->uc.guc;
gt                525 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 	intel_gt_pm_get(rq->engine->gt);
gt                533 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 	intel_gt_pm_put(rq->engine->gt);
gt               1005 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c static void guc_interrupts_capture(struct intel_gt *gt)
gt               1007 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 	struct intel_rps *rps = &gt->i915->gt_pm.rps;
gt               1008 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 	struct intel_uncore *uncore = gt->uncore;
gt               1017 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 	for_each_engine(engine, gt->i915, id)
gt               1051 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c static void guc_interrupts_release(struct intel_gt *gt)
gt               1053 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 	struct intel_rps *rps = &gt->i915->gt_pm.rps;
gt               1054 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 	struct intel_uncore *uncore = gt->uncore;
gt               1065 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 	for_each_engine(engine, gt->i915, id)
gt               1117 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 	struct intel_gt *gt = guc_to_gt(guc);
gt               1122 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 	err = i915_inject_load_error(gt->i915, -ENXIO);
gt               1146 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 	guc_interrupts_capture(gt);
gt               1148 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 	for_each_engine(engine, gt->i915, id) {
gt               1158 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 	struct intel_gt *gt = guc_to_gt(guc);
gt               1160 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 	GEM_BUG_ON(gt->awake); /* GT should be parked first */
gt               1162 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 	guc_interrupts_release(gt);
gt                 31 drivers/gpu/drm/i915/gt/uc/intel_huc.c 	struct intel_gt *gt = huc_to_gt(huc);
gt                 32 drivers/gpu/drm/i915/gt/uc/intel_huc.c 	struct intel_guc *guc = &gt->uc.guc;
gt                 38 drivers/gpu/drm/i915/gt/uc/intel_huc.c 	err = i915_inject_load_error(gt->i915, -ENXIO);
gt                128 drivers/gpu/drm/i915/gt/uc/intel_huc.c 	struct intel_gt *gt = huc_to_gt(huc);
gt                129 drivers/gpu/drm/i915/gt/uc/intel_huc.c 	struct intel_guc *guc = &gt->uc.guc;
gt                137 drivers/gpu/drm/i915/gt/uc/intel_huc.c 	ret = i915_inject_load_error(gt->i915, -ENXIO);
gt                149 drivers/gpu/drm/i915/gt/uc/intel_huc.c 	ret = __intel_wait_for_register(gt->uncore,
gt                163 drivers/gpu/drm/i915/gt/uc/intel_huc.c 	i915_probe_error(gt->i915, "HuC: Authentication failed %d\n", ret);
gt                181 drivers/gpu/drm/i915/gt/uc/intel_huc.c 	struct intel_gt *gt = huc_to_gt(huc);
gt                188 drivers/gpu/drm/i915/gt/uc/intel_huc.c 	with_intel_runtime_pm(&gt->i915->runtime_pm, wakeref)
gt                189 drivers/gpu/drm/i915/gt/uc/intel_huc.c 		status = intel_uncore_read(gt->uncore, huc->status.reg);
gt                 33 drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c 	struct intel_gt *gt = huc_to_gt(huc);
gt                 34 drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c 	struct intel_uc *uc = &gt->uc;
gt                 35 drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c 	struct drm_i915_private *i915 = gt->i915;
gt                 19 drivers/gpu/drm/i915/gt/uc/intel_uc.c 	struct intel_gt *gt = uc_to_gt(uc);
gt                 23 drivers/gpu/drm/i915/gt/uc/intel_uc.c 	ret = i915_inject_load_error(gt->i915, -ENXIO);
gt                 27 drivers/gpu/drm/i915/gt/uc/intel_uc.c 	ret = intel_reset_guc(gt);
gt                 33 drivers/gpu/drm/i915/gt/uc/intel_uc.c 	guc_status = intel_uncore_read(gt->uncore, GUC_STATUS);
gt                352 drivers/gpu/drm/i915/gt/uc/intel_uc.c 	struct intel_gt *gt = uc_to_gt(uc);
gt                353 drivers/gpu/drm/i915/gt/uc/intel_uc.c 	struct intel_uncore *uncore = gt->uncore;
gt                354 drivers/gpu/drm/i915/gt/uc/intel_uc.c 	u32 base = intel_wopcm_guc_base(&gt->i915->wopcm);
gt                355 drivers/gpu/drm/i915/gt/uc/intel_uc.c 	u32 size = intel_wopcm_guc_size(&gt->i915->wopcm);
gt                361 drivers/gpu/drm/i915/gt/uc/intel_uc.c 		i915_probe_error(gt->i915, "Unsuccessful WOPCM partitioning\n");
gt                371 drivers/gpu/drm/i915/gt/uc/intel_uc.c 	err = i915_inject_load_error(gt->i915, -ENXIO);
gt                392 drivers/gpu/drm/i915/gt/uc/intel_uc.c 	i915_probe_error(gt->i915, "Failed to init uC WOPCM registers!\n");
gt                393 drivers/gpu/drm/i915/gt/uc/intel_uc.c 	i915_probe_error(gt->i915, "%s(%#x)=%#x\n", "DMA_GUC_WOPCM_OFFSET",
gt                396 drivers/gpu/drm/i915/gt/uc/intel_uc.c 	i915_probe_error(gt->i915, "%s(%#x)=%#x\n", "GUC_WOPCM_SIZE",
gt                405 drivers/gpu/drm/i915/gt/uc/intel_uc.c 	struct intel_gt *gt = uc_to_gt(uc);
gt                406 drivers/gpu/drm/i915/gt/uc/intel_uc.c 	struct intel_uncore *uncore = gt->uncore;
gt                411 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c 				  struct intel_gt *gt)
gt                414 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c 	struct i915_ggtt *ggtt = gt->ggtt;
gt                432 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c 				    struct intel_gt *gt)
gt                435 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c 	struct i915_ggtt *ggtt = gt->ggtt;
gt                441 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c static int uc_fw_xfer(struct intel_uc_fw *uc_fw, struct intel_gt *gt,
gt                444 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c 	struct intel_uncore *uncore = gt->uncore;
gt                448 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c 	ret = i915_inject_load_error(gt->i915, -ETIMEDOUT);
gt                455 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c 	offset = uc_fw_ggtt_offset(uc_fw, gt->ggtt);
gt                478 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c 		dev_err(gt->i915->drm.dev, "DMA for %s fw failed, DMA_CTRL=%u\n",
gt                501 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, struct intel_gt *gt,
gt                509 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c 	err = i915_inject_load_error(gt->i915, -ENOEXEC);
gt                517 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c 	intel_uc_fw_ggtt_bind(uc_fw, gt);
gt                518 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c 	err = uc_fw_xfer(uc_fw, gt, wopcm_offset, dma_flags);
gt                519 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c 	intel_uc_fw_ggtt_unbind(uc_fw, gt);
gt                527 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c 	i915_probe_error(gt->i915, "Failed to load %s firmware %s (%d)\n",
gt                234 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, struct intel_gt *gt,
gt                122 drivers/gpu/drm/i915/gt/uc/selftest_guc.c 	guc = &dev_priv->gt.uc.guc;
gt                214 drivers/gpu/drm/i915/gt/uc/selftest_guc.c 	guc = &dev_priv->gt.uc.guc;
gt               1026 drivers/gpu/drm/i915/i915_debugfs.c 	struct intel_gt *gt = &i915->gt;
gt               1031 drivers/gpu/drm/i915/i915_debugfs.c 	seq_printf(m, "Reset flags: %lx\n", gt->reset.flags);
gt               1032 drivers/gpu/drm/i915/i915_debugfs.c 	if (test_bit(I915_WEDGED, &gt->reset.flags))
gt               1034 drivers/gpu/drm/i915/i915_debugfs.c 	if (test_bit(I915_RESET_BACKOFF, &gt->reset.flags))
gt               1042 drivers/gpu/drm/i915/i915_debugfs.c 	if (timer_pending(&gt->hangcheck.work.timer))
gt               1044 drivers/gpu/drm/i915/i915_debugfs.c 			   jiffies_to_msecs(gt->hangcheck.work.timer.expires -
gt               1046 drivers/gpu/drm/i915/i915_debugfs.c 	else if (delayed_work_pending(&gt->hangcheck.work))
gt               1051 drivers/gpu/drm/i915/i915_debugfs.c 	seq_printf(m, "GT active? %s\n", yesno(gt->awake));
gt               1732 drivers/gpu/drm/i915/i915_debugfs.c 	seq_printf(m, "GPU busy? %s\n", yesno(dev_priv->gt.awake));
gt               1751 drivers/gpu/drm/i915/i915_debugfs.c 	if (INTEL_GEN(dev_priv) >= 6 && rps->enabled && dev_priv->gt.awake) {
gt               1799 drivers/gpu/drm/i915/i915_debugfs.c 	intel_uc_fw_dump(&dev_priv->gt.uc.huc.fw, &p);
gt               1817 drivers/gpu/drm/i915/i915_debugfs.c 	intel_uc_fw_dump(&dev_priv->gt.uc.guc.fw, &p);
gt               1860 drivers/gpu/drm/i915/i915_debugfs.c 	struct intel_guc_log *log = &dev_priv->gt.uc.guc.log;
gt               1884 drivers/gpu/drm/i915/i915_debugfs.c 	const struct intel_guc *guc = &dev_priv->gt.uc.guc;
gt               1916 drivers/gpu/drm/i915/i915_debugfs.c 	const struct intel_guc *guc = &dev_priv->gt.uc.guc;
gt               1978 drivers/gpu/drm/i915/i915_debugfs.c 		obj = dev_priv->gt.uc.load_err_log;
gt               1979 drivers/gpu/drm/i915/i915_debugfs.c 	else if (dev_priv->gt.uc.guc.log.vma)
gt               1980 drivers/gpu/drm/i915/i915_debugfs.c 		obj = dev_priv->gt.uc.guc.log.vma->obj;
gt               2011 drivers/gpu/drm/i915/i915_debugfs.c 	*val = intel_guc_log_get_level(&dev_priv->gt.uc.guc.log);
gt               2023 drivers/gpu/drm/i915/i915_debugfs.c 	return intel_guc_log_set_level(&dev_priv->gt.uc.guc.log, val);
gt               2033 drivers/gpu/drm/i915/i915_debugfs.c 	struct intel_guc *guc = &i915->gt.uc.guc;
gt               2059 drivers/gpu/drm/i915/i915_debugfs.c 	struct intel_guc *guc = &i915->gt.uc.guc;
gt               2322 drivers/gpu/drm/i915/i915_debugfs.c 	seq_printf(m, "GPU idle: %s\n", yesno(!dev_priv->gt.awake));
gt               2790 drivers/gpu/drm/i915/i915_debugfs.c 		   yesno(dev_priv->gt.awake),
gt               2791 drivers/gpu/drm/i915/i915_debugfs.c 		   atomic_read(&dev_priv->gt.wakeref.count));
gt               3544 drivers/gpu/drm/i915/i915_debugfs.c 	int ret = intel_gt_terminally_wedged(&i915->gt);
gt               3564 drivers/gpu/drm/i915/i915_debugfs.c 	wait_event(i915->gt.reset.queue,
gt               3565 drivers/gpu/drm/i915/i915_debugfs.c 		   !test_bit(I915_RESET_BACKOFF, &i915->gt.reset.flags));
gt               3567 drivers/gpu/drm/i915/i915_debugfs.c 	intel_gt_handle_error(&i915->gt, val, I915_ERROR_CAPTURE,
gt               3611 drivers/gpu/drm/i915/i915_debugfs.c 	    wait_for(intel_engines_are_idle(&i915->gt),
gt               3613 drivers/gpu/drm/i915/i915_debugfs.c 		intel_gt_set_wedged(&i915->gt);
gt               3648 drivers/gpu/drm/i915/i915_debugfs.c 			ret = intel_gt_pm_wait_for_idle(&i915->gt);
gt               3651 drivers/gpu/drm/i915/i915_debugfs.c 	if (val & DROP_RESET_ACTIVE && intel_gt_terminally_wedged(&i915->gt))
gt               3652 drivers/gpu/drm/i915/i915_debugfs.c 		intel_gt_handle_error(&i915->gt, ALL_ENGINES, 0, NULL);
gt                599 drivers/gpu/drm/i915/i915_drv.c 	intel_gt_init_early(&dev_priv->gt, dev_priv);
gt                626 drivers/gpu/drm/i915/i915_drv.c 	intel_gt_driver_late_release(&dev_priv->gt);
gt                643 drivers/gpu/drm/i915/i915_drv.c 	intel_gt_driver_late_release(&dev_priv->gt);
gt                681 drivers/gpu/drm/i915/i915_drv.c 	intel_uc_init_mmio(&dev_priv->gt.uc);
gt               1641 drivers/gpu/drm/i915/i915_drv.c 	intel_gt_set_wedged(&i915->gt);
gt               1662 drivers/gpu/drm/i915/i915_drv.c 	cancel_delayed_work_sync(&i915->gt.hangcheck.work);
gt               2047 drivers/gpu/drm/i915/i915_drv.c 	intel_gt_check_and_clear_faults(&dev_priv->gt);
gt               2057 drivers/gpu/drm/i915/i915_drv.c 	intel_gt_sanitize(&dev_priv->gt, true);
gt               2613 drivers/gpu/drm/i915/i915_drv.c 	intel_gt_runtime_suspend(&dev_priv->gt);
gt               2630 drivers/gpu/drm/i915/i915_drv.c 		intel_gt_runtime_resume(&dev_priv->gt);
gt               2711 drivers/gpu/drm/i915/i915_drv.c 	intel_gt_runtime_resume(&dev_priv->gt);
gt               1704 drivers/gpu/drm/i915/i915_drv.h 	struct intel_gt gt;
gt               1950 drivers/gpu/drm/i915/i915_drv.h 				 INTEL_INFO(dev_priv)->gt == 1)
gt               1971 drivers/gpu/drm/i915/i915_drv.h 				 INTEL_INFO(dev_priv)->gt == 3)
gt               1975 drivers/gpu/drm/i915/i915_drv.h 				 INTEL_INFO(dev_priv)->gt == 3)
gt               1977 drivers/gpu/drm/i915/i915_drv.h 				 INTEL_INFO(dev_priv)->gt == 1)
gt               1990 drivers/gpu/drm/i915/i915_drv.h 				 INTEL_INFO(dev_priv)->gt == 2)
gt               1992 drivers/gpu/drm/i915/i915_drv.h 				 INTEL_INFO(dev_priv)->gt == 3)
gt               1994 drivers/gpu/drm/i915/i915_drv.h 				 INTEL_INFO(dev_priv)->gt == 4)
gt               1996 drivers/gpu/drm/i915/i915_drv.h 				 INTEL_INFO(dev_priv)->gt == 2)
gt               1998 drivers/gpu/drm/i915/i915_drv.h 				 INTEL_INFO(dev_priv)->gt == 3)
gt               2004 drivers/gpu/drm/i915/i915_drv.h 				 INTEL_INFO(dev_priv)->gt == 2)
gt               2006 drivers/gpu/drm/i915/i915_drv.h 				 INTEL_INFO(dev_priv)->gt == 3)
gt               2172 drivers/gpu/drm/i915/i915_drv.h #define USES_GUC(dev_priv)		intel_uc_uses_guc(&(dev_priv)->gt.uc)
gt               2173 drivers/gpu/drm/i915/i915_drv.h #define USES_GUC_SUBMISSION(dev_priv)	intel_uc_uses_guc_submission(&(dev_priv)->gt.uc)
gt                152 drivers/gpu/drm/i915/i915_gem.c 	intel_gt_chipset_flush(&to_i915(obj->base.dev)->gt);
gt                609 drivers/gpu/drm/i915/i915_gem.c 			intel_gt_flush_ggtt_writes(ggtt->vm.gt);
gt                638 drivers/gpu/drm/i915/i915_gem.c 	intel_gt_flush_ggtt_writes(ggtt->vm.gt);
gt                894 drivers/gpu/drm/i915/i915_gem.c 	struct intel_gt_timelines *timelines = &i915->gt.timelines;
gt                938 drivers/gpu/drm/i915/i915_gem.c 	if (!intel_gt_pm_is_awake(&i915->gt))
gt               1151 drivers/gpu/drm/i915/i915_gem.c 	if (intel_gt_is_wedged(&i915->gt))
gt               1152 drivers/gpu/drm/i915/i915_gem.c 		intel_gt_unset_wedged(&i915->gt);
gt               1162 drivers/gpu/drm/i915/i915_gem.c 	intel_gt_sanitize(&i915->gt, false);
gt               1168 drivers/gpu/drm/i915/i915_gem.c static void init_unused_ring(struct intel_gt *gt, u32 base)
gt               1170 drivers/gpu/drm/i915/i915_gem.c 	struct intel_uncore *uncore = gt->uncore;
gt               1178 drivers/gpu/drm/i915/i915_gem.c static void init_unused_rings(struct intel_gt *gt)
gt               1180 drivers/gpu/drm/i915/i915_gem.c 	struct drm_i915_private *i915 = gt->i915;
gt               1183 drivers/gpu/drm/i915/i915_gem.c 		init_unused_ring(gt, PRB1_BASE);
gt               1184 drivers/gpu/drm/i915/i915_gem.c 		init_unused_ring(gt, SRB0_BASE);
gt               1185 drivers/gpu/drm/i915/i915_gem.c 		init_unused_ring(gt, SRB1_BASE);
gt               1186 drivers/gpu/drm/i915/i915_gem.c 		init_unused_ring(gt, SRB2_BASE);
gt               1187 drivers/gpu/drm/i915/i915_gem.c 		init_unused_ring(gt, SRB3_BASE);
gt               1189 drivers/gpu/drm/i915/i915_gem.c 		init_unused_ring(gt, SRB0_BASE);
gt               1190 drivers/gpu/drm/i915/i915_gem.c 		init_unused_ring(gt, SRB1_BASE);
gt               1192 drivers/gpu/drm/i915/i915_gem.c 		init_unused_ring(gt, PRB1_BASE);
gt               1193 drivers/gpu/drm/i915/i915_gem.c 		init_unused_ring(gt, PRB2_BASE);
gt               1200 drivers/gpu/drm/i915/i915_gem.c 	struct intel_gt *gt = &i915->gt;
gt               1204 drivers/gpu/drm/i915/i915_gem.c 	ret = intel_gt_terminally_wedged(gt);
gt               1208 drivers/gpu/drm/i915/i915_gem.c 	gt->last_init_time = ktime_get();
gt               1223 drivers/gpu/drm/i915/i915_gem.c 	intel_gt_apply_workarounds(gt);
gt               1225 drivers/gpu/drm/i915/i915_gem.c 	intel_gt_verify_workarounds(gt, "init");
gt               1227 drivers/gpu/drm/i915/i915_gem.c 	intel_gt_init_swizzling(gt);
gt               1235 drivers/gpu/drm/i915/i915_gem.c 	init_unused_rings(gt);
gt               1237 drivers/gpu/drm/i915/i915_gem.c 	ret = i915_ppgtt_init_hw(gt);
gt               1244 drivers/gpu/drm/i915/i915_gem.c 	ret = intel_uc_init_hw(&gt->uc);
gt               1250 drivers/gpu/drm/i915/i915_gem.c 	intel_mocs_init(gt);
gt               1378 drivers/gpu/drm/i915/i915_gem.c 		intel_gt_set_wedged(&i915->gt);
gt               1398 drivers/gpu/drm/i915/i915_gem.c 	return intel_gt_init_scratch(&i915->gt, size);
gt               1403 drivers/gpu/drm/i915/i915_gem.c 	intel_gt_fini_scratch(&i915->gt);
gt               1438 drivers/gpu/drm/i915/i915_gem.c 	intel_uc_fetch_firmwares(&dev_priv->gt.uc);
gt               1483 drivers/gpu/drm/i915/i915_gem.c 	intel_uc_init(&dev_priv->gt.uc);
gt               1490 drivers/gpu/drm/i915/i915_gem.c 	ret = intel_gt_resume(&dev_priv->gt);
gt               1535 drivers/gpu/drm/i915/i915_gem.c 	intel_gt_set_wedged(&dev_priv->gt);
gt               1543 drivers/gpu/drm/i915/i915_gem.c 	intel_uc_fini_hw(&dev_priv->gt.uc);
gt               1546 drivers/gpu/drm/i915/i915_gem.c 		intel_uc_fini(&dev_priv->gt.uc);
gt               1561 drivers/gpu/drm/i915/i915_gem.c 		intel_uc_cleanup_firmwares(&dev_priv->gt.uc);
gt               1574 drivers/gpu/drm/i915/i915_gem.c 		if (!intel_gt_is_wedged(&dev_priv->gt)) {
gt               1577 drivers/gpu/drm/i915/i915_gem.c 			intel_gt_set_wedged(&dev_priv->gt);
gt               1607 drivers/gpu/drm/i915/i915_gem.c 	GEM_BUG_ON(dev_priv->gt.awake);
gt               1618 drivers/gpu/drm/i915/i915_gem.c 	intel_uc_fini_hw(&dev_priv->gt.uc);
gt               1619 drivers/gpu/drm/i915/i915_gem.c 	intel_uc_fini(&dev_priv->gt.uc);
gt               1637 drivers/gpu/drm/i915/i915_gem.c 	intel_uc_cleanup_firmwares(&dev_priv->gt.uc);
gt                858 drivers/gpu/drm/i915/i915_gem_fence_reg.c void intel_gt_init_swizzling(struct intel_gt *gt)
gt                860 drivers/gpu/drm/i915/i915_gem_fence_reg.c 	struct drm_i915_private *i915 = gt->i915;
gt                861 drivers/gpu/drm/i915/i915_gem_fence_reg.c 	struct intel_uncore *uncore = gt->uncore;
gt                 70 drivers/gpu/drm/i915/i915_gem_fence_reg.h void intel_gt_init_swizzling(struct intel_gt *gt);
gt                123 drivers/gpu/drm/i915/i915_gem_gtt.c 	struct intel_uncore *uncore = ggtt->vm.gt->uncore;
gt                134 drivers/gpu/drm/i915/i915_gem_gtt.c 	struct intel_uncore *uncore = ggtt->vm.gt->uncore;
gt               1430 drivers/gpu/drm/i915/i915_gem_gtt.c static void ppgtt_init(struct i915_ppgtt *ppgtt, struct intel_gt *gt)
gt               1432 drivers/gpu/drm/i915/i915_gem_gtt.c 	struct drm_i915_private *i915 = gt->i915;
gt               1434 drivers/gpu/drm/i915/i915_gem_gtt.c 	ppgtt->vm.gt = gt;
gt               1485 drivers/gpu/drm/i915/i915_gem_gtt.c 	ppgtt_init(ppgtt, &i915->gt);
gt               1551 drivers/gpu/drm/i915/i915_gem_gtt.c static void gen7_ppgtt_enable(struct intel_gt *gt)
gt               1553 drivers/gpu/drm/i915/i915_gem_gtt.c 	struct drm_i915_private *i915 = gt->i915;
gt               1554 drivers/gpu/drm/i915/i915_gem_gtt.c 	struct intel_uncore *uncore = gt->uncore;
gt               1578 drivers/gpu/drm/i915/i915_gem_gtt.c static void gen6_ppgtt_enable(struct intel_gt *gt)
gt               1580 drivers/gpu/drm/i915/i915_gem_gtt.c 	struct intel_uncore *uncore = gt->uncore;
gt               1736 drivers/gpu/drm/i915/i915_gem_gtt.c 		gen6_ggtt_invalidate(vm->gt->ggtt);
gt               1872 drivers/gpu/drm/i915/i915_gem_gtt.c 	struct i915_ggtt *ggtt = ppgtt->base.vm.gt->ggtt;
gt               1969 drivers/gpu/drm/i915/i915_gem_gtt.c 	ppgtt_init(&ppgtt->base, &i915->gt);
gt               2006 drivers/gpu/drm/i915/i915_gem_gtt.c static void gtt_write_workarounds(struct intel_gt *gt)
gt               2008 drivers/gpu/drm/i915/i915_gem_gtt.c 	struct drm_i915_private *i915 = gt->i915;
gt               2009 drivers/gpu/drm/i915/i915_gem_gtt.c 	struct intel_uncore *uncore = gt->uncore;
gt               2073 drivers/gpu/drm/i915/i915_gem_gtt.c int i915_ppgtt_init_hw(struct intel_gt *gt)
gt               2075 drivers/gpu/drm/i915/i915_gem_gtt.c 	struct drm_i915_private *i915 = gt->i915;
gt               2077 drivers/gpu/drm/i915/i915_gem_gtt.c 	gtt_write_workarounds(gt);
gt               2080 drivers/gpu/drm/i915/i915_gem_gtt.c 		gen6_ppgtt_enable(gt);
gt               2082 drivers/gpu/drm/i915/i915_gem_gtt.c 		gen7_ppgtt_enable(gt);
gt               2131 drivers/gpu/drm/i915/i915_gem_gtt.c 	intel_gt_check_and_clear_faults(ggtt->vm.gt);
gt               3141 drivers/gpu/drm/i915/i915_gem_gtt.c static int ggtt_probe_hw(struct i915_ggtt *ggtt, struct intel_gt *gt)
gt               3143 drivers/gpu/drm/i915/i915_gem_gtt.c 	struct drm_i915_private *i915 = gt->i915;
gt               3146 drivers/gpu/drm/i915/i915_gem_gtt.c 	ggtt->vm.gt = gt;
gt               3192 drivers/gpu/drm/i915/i915_gem_gtt.c 	ret = ggtt_probe_hw(&i915->ggtt, &i915->gt);
gt               3307 drivers/gpu/drm/i915/i915_gem_gtt.c 	intel_gt_check_and_clear_faults(ggtt->vm.gt);
gt                293 drivers/gpu/drm/i915/i915_gem_gtt.h 	struct intel_gt *gt;
gt                562 drivers/gpu/drm/i915/i915_gem_gtt.h int i915_ppgtt_init_hw(struct intel_gt *gt);
gt                 96 drivers/gpu/drm/i915/i915_getparam.c 		value = intel_huc_check_status(&i915->gt.uc.huc);
gt               1401 drivers/gpu/drm/i915/i915_gpu_error.c 					      engine->gt->scratch,
gt               1472 drivers/gpu/drm/i915/i915_gpu_error.c 	struct intel_uc *uc = &i915->gt.uc;
gt               1625 drivers/gpu/drm/i915/i915_gpu_error.c 	error->awake = i915->gt.awake;
gt               1702 drivers/gpu/drm/i915/i915_gpu_error.c 	error->uptime = ktime_sub(ktime_get(), i915->gt.last_init_time);
gt                339 drivers/gpu/drm/i915/i915_irq.c 	struct intel_gt *gt = &dev_priv->gt;
gt                341 drivers/gpu/drm/i915/i915_irq.c 	spin_lock_irq(&gt->irq_lock);
gt                343 drivers/gpu/drm/i915/i915_irq.c 	while (gen11_gt_reset_one_iir(gt, 0, GEN11_GTPM))
gt                348 drivers/gpu/drm/i915/i915_irq.c 	spin_unlock_irq(&gt->irq_lock);
gt                353 drivers/gpu/drm/i915/i915_irq.c 	struct intel_gt *gt = &dev_priv->gt;
gt                355 drivers/gpu/drm/i915/i915_irq.c 	spin_lock_irq(&gt->irq_lock);
gt                356 drivers/gpu/drm/i915/i915_irq.c 	gen6_gt_pm_reset_iir(gt, GEN6_PM_RPS_EVENTS);
gt                358 drivers/gpu/drm/i915/i915_irq.c 	spin_unlock_irq(&gt->irq_lock);
gt                363 drivers/gpu/drm/i915/i915_irq.c 	struct intel_gt *gt = &dev_priv->gt;
gt                369 drivers/gpu/drm/i915/i915_irq.c 	spin_lock_irq(&gt->irq_lock);
gt                373 drivers/gpu/drm/i915/i915_irq.c 		WARN_ON_ONCE(gen11_gt_reset_one_iir(gt, 0, GEN11_GTPM));
gt                378 drivers/gpu/drm/i915/i915_irq.c 	gen6_gt_pm_enable_irq(gt, dev_priv->pm_rps_events);
gt                380 drivers/gpu/drm/i915/i915_irq.c 	spin_unlock_irq(&gt->irq_lock);
gt                391 drivers/gpu/drm/i915/i915_irq.c 	struct intel_gt *gt = &dev_priv->gt;
gt                396 drivers/gpu/drm/i915/i915_irq.c 	spin_lock_irq(&gt->irq_lock);
gt                401 drivers/gpu/drm/i915/i915_irq.c 	gen6_gt_pm_disable_irq(gt, GEN6_PM_RPS_EVENTS);
gt                403 drivers/gpu/drm/i915/i915_irq.c 	spin_unlock_irq(&gt->irq_lock);
gt                420 drivers/gpu/drm/i915/i915_irq.c 	struct intel_gt *gt = guc_to_gt(guc);
gt                422 drivers/gpu/drm/i915/i915_irq.c 	assert_rpm_wakelock_held(&gt->i915->runtime_pm);
gt                424 drivers/gpu/drm/i915/i915_irq.c 	spin_lock_irq(&gt->irq_lock);
gt                425 drivers/gpu/drm/i915/i915_irq.c 	gen6_gt_pm_reset_iir(gt, gt->pm_guc_events);
gt                426 drivers/gpu/drm/i915/i915_irq.c 	spin_unlock_irq(&gt->irq_lock);
gt                431 drivers/gpu/drm/i915/i915_irq.c 	struct intel_gt *gt = guc_to_gt(guc);
gt                433 drivers/gpu/drm/i915/i915_irq.c 	assert_rpm_wakelock_held(&gt->i915->runtime_pm);
gt                435 drivers/gpu/drm/i915/i915_irq.c 	spin_lock_irq(&gt->irq_lock);
gt                437 drivers/gpu/drm/i915/i915_irq.c 		WARN_ON_ONCE(intel_uncore_read(gt->uncore,
gt                438 drivers/gpu/drm/i915/i915_irq.c 					       gen6_pm_iir(gt->i915)) &
gt                439 drivers/gpu/drm/i915/i915_irq.c 			     gt->pm_guc_events);
gt                441 drivers/gpu/drm/i915/i915_irq.c 		gen6_gt_pm_enable_irq(gt, gt->pm_guc_events);
gt                443 drivers/gpu/drm/i915/i915_irq.c 	spin_unlock_irq(&gt->irq_lock);
gt                448 drivers/gpu/drm/i915/i915_irq.c 	struct intel_gt *gt = guc_to_gt(guc);
gt                450 drivers/gpu/drm/i915/i915_irq.c 	assert_rpm_wakelock_held(&gt->i915->runtime_pm);
gt                452 drivers/gpu/drm/i915/i915_irq.c 	spin_lock_irq(&gt->irq_lock);
gt                455 drivers/gpu/drm/i915/i915_irq.c 	gen6_gt_pm_disable_irq(gt, gt->pm_guc_events);
gt                457 drivers/gpu/drm/i915/i915_irq.c 	spin_unlock_irq(&gt->irq_lock);
gt                458 drivers/gpu/drm/i915/i915_irq.c 	intel_synchronize_irq(gt->i915);
gt                465 drivers/gpu/drm/i915/i915_irq.c 	struct intel_gt *gt = guc_to_gt(guc);
gt                467 drivers/gpu/drm/i915/i915_irq.c 	spin_lock_irq(&gt->irq_lock);
gt                468 drivers/gpu/drm/i915/i915_irq.c 	gen11_gt_reset_one_iir(gt, 0, GEN11_GUC);
gt                469 drivers/gpu/drm/i915/i915_irq.c 	spin_unlock_irq(&gt->irq_lock);
gt                474 drivers/gpu/drm/i915/i915_irq.c 	struct intel_gt *gt = guc_to_gt(guc);
gt                476 drivers/gpu/drm/i915/i915_irq.c 	spin_lock_irq(&gt->irq_lock);
gt                480 drivers/gpu/drm/i915/i915_irq.c 		WARN_ON_ONCE(gen11_gt_reset_one_iir(gt, 0, GEN11_GUC));
gt                481 drivers/gpu/drm/i915/i915_irq.c 		intel_uncore_write(gt->uncore, GEN11_GUC_SG_INTR_ENABLE, events);
gt                482 drivers/gpu/drm/i915/i915_irq.c 		intel_uncore_write(gt->uncore, GEN11_GUC_SG_INTR_MASK, ~events);
gt                485 drivers/gpu/drm/i915/i915_irq.c 	spin_unlock_irq(&gt->irq_lock);
gt                490 drivers/gpu/drm/i915/i915_irq.c 	struct intel_gt *gt = guc_to_gt(guc);
gt                492 drivers/gpu/drm/i915/i915_irq.c 	spin_lock_irq(&gt->irq_lock);
gt                495 drivers/gpu/drm/i915/i915_irq.c 	intel_uncore_write(gt->uncore, GEN11_GUC_SG_INTR_MASK, ~0);
gt                496 drivers/gpu/drm/i915/i915_irq.c 	intel_uncore_write(gt->uncore, GEN11_GUC_SG_INTR_ENABLE, 0);
gt                498 drivers/gpu/drm/i915/i915_irq.c 	spin_unlock_irq(&gt->irq_lock);
gt                499 drivers/gpu/drm/i915/i915_irq.c 	intel_synchronize_irq(gt->i915);
gt               1173 drivers/gpu/drm/i915/i915_irq.c 	struct intel_gt *gt = &dev_priv->gt;
gt               1179 drivers/gpu/drm/i915/i915_irq.c 	spin_lock_irq(&gt->irq_lock);
gt               1184 drivers/gpu/drm/i915/i915_irq.c 	spin_unlock_irq(&gt->irq_lock);
gt               1261 drivers/gpu/drm/i915/i915_irq.c 	spin_lock_irq(&gt->irq_lock);
gt               1263 drivers/gpu/drm/i915/i915_irq.c 		gen6_gt_pm_unmask_irq(gt, dev_priv->pm_rps_events);
gt               1264 drivers/gpu/drm/i915/i915_irq.c 	spin_unlock_irq(&gt->irq_lock);
gt               1281 drivers/gpu/drm/i915/i915_irq.c 	struct intel_gt *gt = &dev_priv->gt;
gt               1343 drivers/gpu/drm/i915/i915_irq.c 	spin_lock_irq(&gt->irq_lock);
gt               1344 drivers/gpu/drm/i915/i915_irq.c 	gen5_gt_enable_irq(gt, GT_PARITY_ERROR(dev_priv));
gt               1345 drivers/gpu/drm/i915/i915_irq.c 	spin_unlock_irq(&gt->irq_lock);
gt               1658 drivers/gpu/drm/i915/i915_irq.c void gen11_rps_irq_handler(struct intel_gt *gt, u32 pm_iir)
gt               1660 drivers/gpu/drm/i915/i915_irq.c 	struct drm_i915_private *i915 = gt->i915;
gt               1664 drivers/gpu/drm/i915/i915_irq.c 	lockdep_assert_held(&gt->irq_lock);
gt               1669 drivers/gpu/drm/i915/i915_irq.c 	gen6_gt_pm_mask_irq(gt, events);
gt               1681 drivers/gpu/drm/i915/i915_irq.c 	struct intel_gt *gt = &dev_priv->gt;
gt               1684 drivers/gpu/drm/i915/i915_irq.c 		spin_lock(&gt->irq_lock);
gt               1685 drivers/gpu/drm/i915/i915_irq.c 		gen6_gt_pm_mask_irq(gt, pm_iir & dev_priv->pm_rps_events);
gt               1690 drivers/gpu/drm/i915/i915_irq.c 		spin_unlock(&gt->irq_lock);
gt               2010 drivers/gpu/drm/i915/i915_irq.c 			gen6_gt_irq_handler(&dev_priv->gt, gt_iir);
gt               2068 drivers/gpu/drm/i915/i915_irq.c 		gen8_gt_irq_ack(&dev_priv->gt, master_ctl, gt_iir);
gt               2092 drivers/gpu/drm/i915/i915_irq.c 		gen8_gt_irq_handler(&dev_priv->gt, master_ctl, gt_iir);
gt               2522 drivers/gpu/drm/i915/i915_irq.c 			gen6_gt_irq_handler(&dev_priv->gt, gt_iir);
gt               2524 drivers/gpu/drm/i915/i915_irq.c 			gen5_gt_irq_handler(&dev_priv->gt, gt_iir);
gt               2840 drivers/gpu/drm/i915/i915_irq.c 	gen8_gt_irq_ack(&dev_priv->gt, master_ctl, gt_iir);
gt               2851 drivers/gpu/drm/i915/i915_irq.c 	gen8_gt_irq_handler(&dev_priv->gt, master_ctl, gt_iir);
gt               2857 drivers/gpu/drm/i915/i915_irq.c gen11_gu_misc_irq_ack(struct intel_gt *gt, const u32 master_ctl)
gt               2859 drivers/gpu/drm/i915/i915_irq.c 	void __iomem * const regs = gt->uncore->regs;
gt               2873 drivers/gpu/drm/i915/i915_irq.c gen11_gu_misc_irq_handler(struct intel_gt *gt, const u32 iir)
gt               2876 drivers/gpu/drm/i915/i915_irq.c 		intel_opregion_asle_intr(gt->i915);
gt               2901 drivers/gpu/drm/i915/i915_irq.c 	struct intel_gt *gt = &i915->gt;
gt               2915 drivers/gpu/drm/i915/i915_irq.c 	gen11_gt_irq_handler(gt, master_ctl);
gt               2930 drivers/gpu/drm/i915/i915_irq.c 	gu_misc_iir = gen11_gu_misc_irq_ack(gt, master_ctl);
gt               2934 drivers/gpu/drm/i915/i915_irq.c 	gen11_gu_misc_irq_handler(gt, gu_misc_iir);
gt               3228 drivers/gpu/drm/i915/i915_irq.c 	gen5_gt_irq_reset(&dev_priv->gt);
gt               3238 drivers/gpu/drm/i915/i915_irq.c 	gen5_gt_irq_reset(&dev_priv->gt);
gt               3253 drivers/gpu/drm/i915/i915_irq.c 	gen8_gt_irq_reset(&dev_priv->gt);
gt               3278 drivers/gpu/drm/i915/i915_irq.c 	gen11_gt_irq_reset(&dev_priv->gt);
gt               3352 drivers/gpu/drm/i915/i915_irq.c 	gen8_gt_irq_reset(&dev_priv->gt);
gt               3698 drivers/gpu/drm/i915/i915_irq.c 	gen5_gt_irq_postinstall(&dev_priv->gt);
gt               3747 drivers/gpu/drm/i915/i915_irq.c 	gen5_gt_irq_postinstall(&dev_priv->gt);
gt               3833 drivers/gpu/drm/i915/i915_irq.c 	gen8_gt_irq_postinstall(&dev_priv->gt);
gt               3871 drivers/gpu/drm/i915/i915_irq.c 	gen11_gt_irq_postinstall(&dev_priv->gt);
gt               3884 drivers/gpu/drm/i915/i915_irq.c 	gen8_gt_irq_postinstall(&dev_priv->gt);
gt               4336 drivers/gpu/drm/i915/i915_irq.c 		dev_priv->gt.pm_guc_events = GUC_INTR_GUC2HOST << 16;
gt                 25 drivers/gpu/drm/i915/i915_irq.h void gen11_rps_irq_handler(struct intel_gt *gt, u32 pm_iir);
gt                388 drivers/gpu/drm/i915/i915_pci.c 	.gt = 1,
gt                393 drivers/gpu/drm/i915/i915_pci.c 	.gt = 2,
gt                404 drivers/gpu/drm/i915/i915_pci.c 	.gt = 1,
gt                409 drivers/gpu/drm/i915/i915_pci.c 	.gt = 2,
gt                437 drivers/gpu/drm/i915/i915_pci.c 	.gt = 1,
gt                442 drivers/gpu/drm/i915/i915_pci.c 	.gt = 2,
gt                453 drivers/gpu/drm/i915/i915_pci.c 	.gt = 1,
gt                458 drivers/gpu/drm/i915/i915_pci.c 	.gt = 2,
gt                464 drivers/gpu/drm/i915/i915_pci.c 	.gt = 2,
gt                509 drivers/gpu/drm/i915/i915_pci.c 	.gt = 1,
gt                514 drivers/gpu/drm/i915/i915_pci.c 	.gt = 2,
gt                519 drivers/gpu/drm/i915/i915_pci.c 	.gt = 3,
gt                537 drivers/gpu/drm/i915/i915_pci.c 	.gt = 1,
gt                542 drivers/gpu/drm/i915/i915_pci.c 	.gt = 2,
gt                547 drivers/gpu/drm/i915/i915_pci.c 	.gt = 3,
gt                555 drivers/gpu/drm/i915/i915_pci.c 	.gt = 3,
gt                605 drivers/gpu/drm/i915/i915_pci.c 	.gt = 1,
gt                610 drivers/gpu/drm/i915/i915_pci.c 	.gt = 2,
gt                621 drivers/gpu/drm/i915/i915_pci.c 	.gt = 3,
gt                626 drivers/gpu/drm/i915/i915_pci.c 	.gt = 4,
gt                678 drivers/gpu/drm/i915/i915_pci.c 	.gt = 1,
gt                683 drivers/gpu/drm/i915/i915_pci.c 	.gt = 2,
gt                688 drivers/gpu/drm/i915/i915_pci.c 	.gt = 3,
gt                699 drivers/gpu/drm/i915/i915_pci.c 	.gt = 1,
gt                704 drivers/gpu/drm/i915/i915_pci.c 	.gt = 2,
gt                709 drivers/gpu/drm/i915/i915_pci.c 	.gt = 3,
gt                724 drivers/gpu/drm/i915/i915_pci.c 	.gt = 2,
gt                168 drivers/gpu/drm/i915/i915_pmu.c engines_sample(struct intel_gt *gt, unsigned int period_ns)
gt                170 drivers/gpu/drm/i915/i915_pmu.c 	struct drm_i915_private *i915 = gt->i915;
gt                225 drivers/gpu/drm/i915/i915_pmu.c frequency_sample(struct intel_gt *gt, unsigned int period_ns)
gt                227 drivers/gpu/drm/i915/i915_pmu.c 	struct drm_i915_private *i915 = gt->i915;
gt                228 drivers/gpu/drm/i915/i915_pmu.c 	struct intel_uncore *uncore = gt->uncore;
gt                235 drivers/gpu/drm/i915/i915_pmu.c 		if (intel_gt_pm_get_if_awake(gt)) {
gt                238 drivers/gpu/drm/i915/i915_pmu.c 			intel_gt_pm_put(gt);
gt                258 drivers/gpu/drm/i915/i915_pmu.c 	struct intel_gt *gt = &i915->gt;
gt                275 drivers/gpu/drm/i915/i915_pmu.c 	engines_sample(gt, period_ns);
gt                276 drivers/gpu/drm/i915/i915_pmu.c 	frequency_sample(gt, period_ns);
gt                429 drivers/gpu/drm/i915/i915_pmu.c static u64 __get_rc6(struct intel_gt *gt)
gt                431 drivers/gpu/drm/i915/i915_pmu.c 	struct drm_i915_private *i915 = gt->i915;
gt                448 drivers/gpu/drm/i915/i915_pmu.c static u64 get_rc6(struct intel_gt *gt)
gt                451 drivers/gpu/drm/i915/i915_pmu.c 	struct drm_i915_private *i915 = gt->i915;
gt                460 drivers/gpu/drm/i915/i915_pmu.c 		val = __get_rc6(gt);
gt                523 drivers/gpu/drm/i915/i915_pmu.c 	return __get_rc6(gt);
gt                566 drivers/gpu/drm/i915/i915_pmu.c 			val = get_rc6(&i915->gt);
gt               1434 drivers/gpu/drm/i915/i915_request.c 	mutex_acquire(&rq->engine->gt->reset.mutex.dep_map, 0, 0, _THIS_IP_);
gt               1512 drivers/gpu/drm/i915/i915_request.c 	mutex_release(&rq->engine->gt->reset.mutex.dep_map, 0, _THIS_IP_);
gt               1519 drivers/gpu/drm/i915/i915_request.c 	struct intel_gt_timelines *timelines = &i915->gt.timelines;
gt                397 drivers/gpu/drm/i915/i915_vma.c 	intel_gt_flush_ggtt_writes(vma->vm->gt);
gt                776 drivers/gpu/drm/i915/i915_vma.c 	spin_lock_irqsave(&i915->gt.closed_lock, flags);
gt                777 drivers/gpu/drm/i915/i915_vma.c 	list_add(&vma->closed_link, &i915->gt.closed_vma);
gt                778 drivers/gpu/drm/i915/i915_vma.c 	spin_unlock_irqrestore(&i915->gt.closed_lock, flags);
gt                788 drivers/gpu/drm/i915/i915_vma.c 	spin_lock_irq(&i915->gt.closed_lock);
gt                790 drivers/gpu/drm/i915/i915_vma.c 	spin_unlock_irq(&i915->gt.closed_lock);
gt                839 drivers/gpu/drm/i915/i915_vma.c 	spin_lock_irq(&i915->gt.closed_lock);
gt                840 drivers/gpu/drm/i915/i915_vma.c 	list_for_each_entry_safe(vma, next, &i915->gt.closed_vma, closed_link) {
gt                842 drivers/gpu/drm/i915/i915_vma.c 		spin_unlock_irq(&i915->gt.closed_lock);
gt                846 drivers/gpu/drm/i915/i915_vma.c 		spin_lock_irq(&i915->gt.closed_lock);
gt                848 drivers/gpu/drm/i915/i915_vma.c 	spin_unlock_irq(&i915->gt.closed_lock);
gt                561 drivers/gpu/drm/i915/intel_device_info.c 	switch (INTEL_INFO(dev_priv)->gt) {
gt                563 drivers/gpu/drm/i915/intel_device_info.c 		MISSING_CASE(INTEL_INFO(dev_priv)->gt);
gt                152 drivers/gpu/drm/i915/intel_device_info.h 	u8 gt; /* GT number, 0 if undefined */
gt               6692 drivers/gpu/drm/i915/intel_pm.c 		if (!rps->power.interactive++ && READ_ONCE(i915->gt.awake))
gt               8419 drivers/gpu/drm/i915/intel_pm.c 	ret = i915->gt.awake;
gt                224 drivers/gpu/drm/i915/intel_wopcm.c 	struct intel_gt *gt = &i915->gt;
gt                225 drivers/gpu/drm/i915/intel_wopcm.c 	u32 guc_fw_size = intel_uc_fw_get_upload_size(&gt->uc.guc.fw);
gt                226 drivers/gpu/drm/i915/intel_wopcm.c 	u32 huc_fw_size = intel_uc_fw_get_upload_size(&gt->uc.huc.fw);
gt                244 drivers/gpu/drm/i915/intel_wopcm.c 	if (__wopcm_regs_locked(gt->uncore, &guc_wopcm_base, &guc_wopcm_size)) {
gt                224 drivers/gpu/drm/i915/selftests/i915_active.c 	if (intel_gt_is_wedged(&i915->gt))
gt                119 drivers/gpu/drm/i915/selftests/i915_gem.c 		intel_gt_sanitize(&i915->gt, false);
gt                216 drivers/gpu/drm/i915/selftests/i915_gem.c 	if (intel_gt_is_wedged(&i915->gt))
gt                564 drivers/gpu/drm/i915/selftests/i915_gem_evict.c 	if (intel_gt_is_wedged(&i915->gt))
gt               1196 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c 	intel_gt_flush_ggtt_writes(ggtt->vm.gt);
gt                389 drivers/gpu/drm/i915/selftests/i915_request.c 			intel_gt_set_wedged(t->engine->gt);
gt                638 drivers/gpu/drm/i915/selftests/i915_request.c 	intel_gt_chipset_flush(&i915->gt);
gt                807 drivers/gpu/drm/i915/selftests/i915_request.c 	intel_gt_chipset_flush(&i915->gt);
gt                825 drivers/gpu/drm/i915/selftests/i915_request.c 	intel_gt_chipset_flush(batch->vm->gt);
gt               1051 drivers/gpu/drm/i915/selftests/i915_request.c 			intel_gt_chipset_flush(engine->gt);
gt               1247 drivers/gpu/drm/i915/selftests/i915_request.c 	if (intel_gt_is_wedged(&i915->gt))
gt                259 drivers/gpu/drm/i915/selftests/i915_selftest.c 	return intel_gt_terminally_wedged(&i915->gt);
gt                278 drivers/gpu/drm/i915/selftests/i915_selftest.c 	struct intel_gt *gt = data;
gt                280 drivers/gpu/drm/i915/selftests/i915_selftest.c 	return intel_gt_terminally_wedged(gt);
gt                285 drivers/gpu/drm/i915/selftests/i915_selftest.c 	struct intel_gt *gt = data;
gt                287 drivers/gpu/drm/i915/selftests/i915_selftest.c 	mutex_lock(&gt->i915->drm.struct_mutex);
gt                288 drivers/gpu/drm/i915/selftests/i915_selftest.c 	if (igt_flush_test(gt->i915, I915_WAIT_LOCKED))
gt                290 drivers/gpu/drm/i915/selftests/i915_selftest.c 	mutex_unlock(&gt->i915->drm.struct_mutex);
gt                292 drivers/gpu/drm/i915/selftests/i915_selftest.c 	i915_gem_drain_freed_objects(gt->i915);
gt                 17 drivers/gpu/drm/i915/selftests/igt_flush_test.c 	int ret = intel_gt_is_wedged(&i915->gt) ? -EIO : 0;
gt                 31 drivers/gpu/drm/i915/selftests/igt_flush_test.c 			intel_gt_set_wedged(&i915->gt);
gt                 14 drivers/gpu/drm/i915/selftests/igt_reset.c void igt_global_reset_lock(struct intel_gt *gt)
gt                 19 drivers/gpu/drm/i915/selftests/igt_reset.c 	pr_debug("%s: current gpu_error=%08lx\n", __func__, gt->reset.flags);
gt                 21 drivers/gpu/drm/i915/selftests/igt_reset.c 	while (test_and_set_bit(I915_RESET_BACKOFF, &gt->reset.flags))
gt                 22 drivers/gpu/drm/i915/selftests/igt_reset.c 		wait_event(gt->reset.queue,
gt                 23 drivers/gpu/drm/i915/selftests/igt_reset.c 			   !test_bit(I915_RESET_BACKOFF, &gt->reset.flags));
gt                 25 drivers/gpu/drm/i915/selftests/igt_reset.c 	for_each_engine(engine, gt->i915, id) {
gt                 27 drivers/gpu/drm/i915/selftests/igt_reset.c 					&gt->reset.flags))
gt                 28 drivers/gpu/drm/i915/selftests/igt_reset.c 			wait_on_bit(&gt->reset.flags, I915_RESET_ENGINE + id,
gt                 33 drivers/gpu/drm/i915/selftests/igt_reset.c void igt_global_reset_unlock(struct intel_gt *gt)
gt                 38 drivers/gpu/drm/i915/selftests/igt_reset.c 	for_each_engine(engine, gt->i915, id)
gt                 39 drivers/gpu/drm/i915/selftests/igt_reset.c 		clear_bit(I915_RESET_ENGINE + id, &gt->reset.flags);
gt                 41 drivers/gpu/drm/i915/selftests/igt_reset.c 	clear_bit(I915_RESET_BACKOFF, &gt->reset.flags);
gt                 42 drivers/gpu/drm/i915/selftests/igt_reset.c 	wake_up_all(&gt->reset.queue);
gt                 45 drivers/gpu/drm/i915/selftests/igt_reset.c bool igt_force_reset(struct intel_gt *gt)
gt                 47 drivers/gpu/drm/i915/selftests/igt_reset.c 	intel_gt_set_wedged(gt);
gt                 48 drivers/gpu/drm/i915/selftests/igt_reset.c 	intel_gt_reset(gt, 0, NULL);
gt                 50 drivers/gpu/drm/i915/selftests/igt_reset.c 	return !intel_gt_is_wedged(gt);
gt                 14 drivers/gpu/drm/i915/selftests/igt_reset.h void igt_global_reset_lock(struct intel_gt *gt);
gt                 15 drivers/gpu/drm/i915/selftests/igt_reset.h void igt_global_reset_unlock(struct intel_gt *gt);
gt                 16 drivers/gpu/drm/i915/selftests/igt_reset.h bool igt_force_reset(struct intel_gt *gt);
gt                 12 drivers/gpu/drm/i915/selftests/igt_spinner.c int igt_spinner_init(struct igt_spinner *spin, struct intel_gt *gt)
gt                 18 drivers/gpu/drm/i915/selftests/igt_spinner.c 	GEM_BUG_ON(INTEL_GEN(gt->i915) < 8);
gt                 21 drivers/gpu/drm/i915/selftests/igt_spinner.c 	spin->gt = gt;
gt                 23 drivers/gpu/drm/i915/selftests/igt_spinner.c 	spin->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
gt                 29 drivers/gpu/drm/i915/selftests/igt_spinner.c 	spin->obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
gt                 43 drivers/gpu/drm/i915/selftests/igt_spinner.c 	mode = i915_coherent_map_type(gt->i915);
gt                101 drivers/gpu/drm/i915/selftests/igt_spinner.c 	GEM_BUG_ON(spin->gt != ce->vm->gt);
gt                147 drivers/gpu/drm/i915/selftests/igt_spinner.c 	intel_gt_chipset_flush(engine->gt);
gt                181 drivers/gpu/drm/i915/selftests/igt_spinner.c 	intel_gt_chipset_flush(spin->gt);
gt                 20 drivers/gpu/drm/i915/selftests/igt_spinner.h 	struct intel_gt *gt;
gt                 27 drivers/gpu/drm/i915/selftests/igt_spinner.h int igt_spinner_init(struct igt_spinner *spin, struct intel_gt *gt);
gt                150 drivers/gpu/drm/i915/selftests/intel_uncore.c 	GEM_BUG_ON(i915->gt.awake);
gt                183 drivers/gpu/drm/i915/selftests/mock_gem_device.c 	intel_gt_init_early(&i915->gt, i915);
gt                184 drivers/gpu/drm/i915/selftests/mock_gem_device.c 	atomic_inc(&i915->gt.wakeref.count); /* disable; no hw support */
gt                195 drivers/gpu/drm/i915/selftests/mock_gem_device.c 	i915->gt.awake = true;
gt                101 drivers/gpu/drm/i915/selftests/mock_gtt.c 	ggtt->vm.gt = &i915->gt;
gt               3900 drivers/gpu/drm/omapdrm/dss/dispc.c 		u32 *gt;
gt               3910 drivers/gpu/drm/omapdrm/dss/dispc.c 		gt = devm_kmalloc_array(&dispc->pdev->dev, gdesc->len,
gt               3912 drivers/gpu/drm/omapdrm/dss/dispc.c 		if (!gt)
gt               3915 drivers/gpu/drm/omapdrm/dss/dispc.c 		dispc->gamma_table[channel] = gt;
gt                555 drivers/media/platform/omap3isp/isppreview.c 	const struct omap3isp_prev_gtables *gt = &params->gamma;
gt                561 drivers/media/platform/omap3isp/isppreview.c 		isp_reg_writel(isp, gt->red[i], OMAP3_ISP_IOMEM_PREV,
gt                567 drivers/media/platform/omap3isp/isppreview.c 		isp_reg_writel(isp, gt->green[i], OMAP3_ISP_IOMEM_PREV,
gt                573 drivers/media/platform/omap3isp/isppreview.c 		isp_reg_writel(isp, gt->blue[i], OMAP3_ISP_IOMEM_PREV,
gt                150 drivers/media/radio/radio-gemtek.c static void gemtek_bu2614_transmit(struct gemtek *gt)
gt                152 drivers/media/radio/radio-gemtek.c 	struct radio_isa_card *isa = &gt->isa;
gt                155 drivers/media/radio/radio-gemtek.c 	mute = gt->muted ? GEMTEK_MT : 0x00;
gt                160 drivers/media/radio/radio-gemtek.c 	for (i = 0, q = gt->bu2614data; i < 32; i++, q >>= 1) {
gt                182 drivers/media/radio/radio-gemtek.c 	struct gemtek *gt = kzalloc(sizeof(*gt), GFP_KERNEL);
gt                184 drivers/media/radio/radio-gemtek.c 	if (gt)
gt                185 drivers/media/radio/radio-gemtek.c 		gt->muted = true;
gt                186 drivers/media/radio/radio-gemtek.c 	return gt ? &gt->isa : NULL;
gt                194 drivers/media/radio/radio-gemtek.c 	struct gemtek *gt = container_of(isa, struct gemtek, isa);
gt                196 drivers/media/radio/radio-gemtek.c 	if (hardmute && gt->muted)
gt                199 drivers/media/radio/radio-gemtek.c 	gemtek_bu2614_set(gt, BU2614_PORT, 0);
gt                200 drivers/media/radio/radio-gemtek.c 	gemtek_bu2614_set(gt, BU2614_FMES, 0);
gt                201 drivers/media/radio/radio-gemtek.c 	gemtek_bu2614_set(gt, BU2614_SWIN, 0);	/* FM-mode	*/
gt                202 drivers/media/radio/radio-gemtek.c 	gemtek_bu2614_set(gt, BU2614_SWAL, 0);
gt                203 drivers/media/radio/radio-gemtek.c 	gemtek_bu2614_set(gt, BU2614_FMUN, 1);	/* GT bit set	*/
gt                204 drivers/media/radio/radio-gemtek.c 	gemtek_bu2614_set(gt, BU2614_TEST, 0);
gt                205 drivers/media/radio/radio-gemtek.c 	gemtek_bu2614_set(gt, BU2614_STDF, GEMTEK_STDF_3_125_KHZ);
gt                206 drivers/media/radio/radio-gemtek.c 	gemtek_bu2614_set(gt, BU2614_FREQ, gemtek_convfreq(freq));
gt                207 drivers/media/radio/radio-gemtek.c 	gemtek_bu2614_transmit(gt);
gt                216 drivers/media/radio/radio-gemtek.c 	struct gemtek *gt = container_of(isa, struct gemtek, isa);
gt                219 drivers/media/radio/radio-gemtek.c 	gt->muted = mute;
gt                225 drivers/media/radio/radio-gemtek.c 		gemtek_bu2614_set(gt, BU2614_PORT, 0);
gt                226 drivers/media/radio/radio-gemtek.c 		gemtek_bu2614_set(gt, BU2614_FMES, 0);	/* CT bit off	*/
gt                227 drivers/media/radio/radio-gemtek.c 		gemtek_bu2614_set(gt, BU2614_SWIN, 0);	/* FM-mode	*/
gt                228 drivers/media/radio/radio-gemtek.c 		gemtek_bu2614_set(gt, BU2614_SWAL, 0);
gt                229 drivers/media/radio/radio-gemtek.c 		gemtek_bu2614_set(gt, BU2614_FMUN, 0);	/* GT bit off	*/
gt                230 drivers/media/radio/radio-gemtek.c 		gemtek_bu2614_set(gt, BU2614_TEST, 0);
gt                231 drivers/media/radio/radio-gemtek.c 		gemtek_bu2614_set(gt, BU2614_STDF, GEMTEK_PLL_OFF);
gt                232 drivers/media/radio/radio-gemtek.c 		gemtek_bu2614_set(gt, BU2614_FREQ, 0);
gt                233 drivers/media/radio/radio-gemtek.c 		gemtek_bu2614_transmit(gt);
gt                172 drivers/nfc/pn533/pn533.c 	u8 gt[];
gt                185 drivers/nfc/pn533/pn533.c 	u8 gt[];
gt               1319 drivers/nfc/pn533/pn533.c 					  rsp->gt, target_gt_len);
gt               1629 drivers/nfc/pn533/pn533.c 	rc = nfc_set_remote_general_bytes(dev->nfc_dev, rsp->gt, gt_len);
gt               1789 drivers/nfc/pn533/pn533.c 					  rsp->gt, target_gt_len);
gt                565 drivers/perf/xgene_pmu.c 	XGENE_PMU_EVENT_ATTR(queue-fill-gt-thresh,		0x22),
gt                566 drivers/perf/xgene_pmu.c 	XGENE_PMU_EVENT_ATTR(queue-rds-gt-thresh,		0x23),
gt                567 drivers/perf/xgene_pmu.c 	XGENE_PMU_EVENT_ATTR(queue-wrs-gt-thresh,		0x24),
gt                 53 fs/gfs2/ops_fstype.c static void gfs2_tune_init(struct gfs2_tune *gt)
gt                 55 fs/gfs2/ops_fstype.c 	spin_lock_init(&gt->gt_spin);
gt                 57 fs/gfs2/ops_fstype.c 	gt->gt_quota_warn_period = 10;
gt                 58 fs/gfs2/ops_fstype.c 	gt->gt_quota_scale_num = 1;
gt                 59 fs/gfs2/ops_fstype.c 	gt->gt_quota_scale_den = 1;
gt                 60 fs/gfs2/ops_fstype.c 	gt->gt_new_files_jdata = 0;
gt                 61 fs/gfs2/ops_fstype.c 	gt->gt_max_readahead = BIT(18);
gt                 62 fs/gfs2/ops_fstype.c 	gt->gt_complain_secs = 10;
gt               1452 fs/gfs2/ops_fstype.c 	struct gfs2_tune *gt = &sdp->sd_tune;
gt               1457 fs/gfs2/ops_fstype.c 	spin_lock(&gt->gt_spin);
gt               1458 fs/gfs2/ops_fstype.c 	oldargs->ar_commit = gt->gt_logd_secs;
gt               1459 fs/gfs2/ops_fstype.c 	oldargs->ar_quota_quantum = gt->gt_quota_quantum;
gt               1460 fs/gfs2/ops_fstype.c 	if (gt->gt_statfs_slow)
gt               1463 fs/gfs2/ops_fstype.c 		oldargs->ar_statfs_quantum = gt->gt_statfs_quantum;
gt               1464 fs/gfs2/ops_fstype.c 	spin_unlock(&gt->gt_spin);
gt               1514 fs/gfs2/ops_fstype.c 	spin_lock(&gt->gt_spin);
gt               1515 fs/gfs2/ops_fstype.c 	gt->gt_logd_secs = newargs->ar_commit;
gt               1516 fs/gfs2/ops_fstype.c 	gt->gt_quota_quantum = newargs->ar_quota_quantum;
gt               1518 fs/gfs2/ops_fstype.c 		gt->gt_statfs_slow = 0;
gt               1519 fs/gfs2/ops_fstype.c 		gt->gt_statfs_quantum = newargs->ar_statfs_quantum;
gt               1522 fs/gfs2/ops_fstype.c 		gt->gt_statfs_slow = 1;
gt               1523 fs/gfs2/ops_fstype.c 		gt->gt_statfs_quantum = 30;
gt               1525 fs/gfs2/ops_fstype.c 	spin_unlock(&gt->gt_spin);
gt               1074 fs/gfs2/quota.c 	struct gfs2_tune *gt = &sdp->sd_tune;
gt               1086 fs/gfs2/quota.c 	spin_lock(&gt->gt_spin);
gt               1087 fs/gfs2/quota.c 	num = gt->gt_quota_scale_num;
gt               1088 fs/gfs2/quota.c 	den = gt->gt_quota_scale_den;
gt               1089 fs/gfs2/quota.c 	spin_unlock(&gt->gt_spin);
gt                557 fs/gfs2/sys.c  	struct gfs2_tune *gt = &sdp->sd_tune;
gt                566 fs/gfs2/sys.c  	spin_lock(&gt->gt_spin);
gt                567 fs/gfs2/sys.c  	gt->gt_quota_scale_num = x;
gt                568 fs/gfs2/sys.c  	gt->gt_quota_scale_den = y;
gt                569 fs/gfs2/sys.c  	spin_unlock(&gt->gt_spin);
gt                576 fs/gfs2/sys.c  	struct gfs2_tune *gt = &sdp->sd_tune;
gt                590 fs/gfs2/sys.c  	spin_lock(&gt->gt_spin);
gt                592 fs/gfs2/sys.c  	spin_unlock(&gt->gt_spin);
gt                157 fs/gfs2/util.h static inline unsigned int gfs2_tune_get_i(struct gfs2_tune *gt,
gt                161 fs/gfs2/util.h 	spin_lock(&gt->gt_spin);
gt                163 fs/gfs2/util.h 	spin_unlock(&gt->gt_spin);
gt                269 include/net/nfc/nfc.h 				 u8 *gt, u8 gt_len);
gt                751 net/ceph/messenger.c static u32 get_global_seq(struct ceph_messenger *msgr, u32 gt)
gt                756 net/ceph/messenger.c 	if (msgr->global_seq < gt)
gt                757 net/ceph/messenger.c 		msgr->global_seq = gt;
gt                206 usr/gen_init_cpio.c static int cpio_mkgeneric_line(const char *line, enum generic_types gt)
gt                216 usr/gen_init_cpio.c 			line, generic_type_table[gt].type);
gt                219 usr/gen_init_cpio.c 	mode |= generic_type_table[gt].mode;