grph 2747 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c if (i64b == 0 && output.grph.rgb.independent_64b_blks != 0) grph 2756 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c address->grph.meta_addr.low_part = lower_32_bits(dcc_address); grph 2757 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c address->grph.meta_addr.high_part = upper_32_bits(dcc_address); grph 2791 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c address->grph.addr.low_part = lower_32_bits(afb->address); grph 2792 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c address->grph.addr.high_part = upper_32_bits(afb->address); grph 5828 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c bundle->flip_addrs[planes_count].address.grph.addr.high_part, grph 5829 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c bundle->flip_addrs[planes_count].address.grph.addr.low_part); grph 84 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->address.grph.addr.quad_part, grph 85 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->address.grph.meta_addr.quad_part, grph 196 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->flip_addr->address.grph.addr.quad_part, grph 197 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->flip_addr->address.grph.meta_addr.quad_part, grph 145 drivers/gpu/drm/amd/display/dc/dc.h } grph; grph 75 drivers/gpu/drm/amd/display/dc/dc_hw_types.h } grph; grph 132 drivers/gpu/drm/amd/display/dc/dc_hw_types.h } grph; grph 156 drivers/gpu/drm/amd/display/dc/dc_hw_types.h } grph; grph 705 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c if (address->grph.addr.quad_part == 0) grph 707 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c program_pri_addr(dce_mi, address->grph.addr); grph 2546 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c pipe_ctx->plane_state->address.grph.addr.high_part, grph 2547 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c pipe_ctx->plane_state->address.grph.addr.low_part, grph 137 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c addr->grph.addr); grph 919 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c output->grph.rgb.max_uncompressed_blk_size = 256; grph 920 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c output->grph.rgb.max_compressed_blk_size = 256; grph 921 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c output->grph.rgb.independent_64b_blks = false; grph 924 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c output->grph.rgb.max_uncompressed_blk_size = 128; grph 925 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c output->grph.rgb.max_compressed_blk_size = 128; grph 926 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c output->grph.rgb.independent_64b_blks = false; grph 929 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c output->grph.rgb.max_uncompressed_blk_size = 256; grph 930 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c output->grph.rgb.max_compressed_blk_size = 64; grph 931 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c output->grph.rgb.independent_64b_blks = true; grph 378 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c if (address->grph.addr.quad_part == 0) grph 385 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c if (address->grph.meta_addr.quad_part != 0) { grph 388 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c address->grph.meta_addr.high_part); grph 392 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c address->grph.meta_addr.low_part); grph 397 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c address->grph.addr.high_part); grph 401 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c address->grph.addr.low_part); grph 731 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c SURFACE_EARLIEST_INUSE_ADDRESS, &earliest_inuse_address.grph.addr.low_part); grph 734 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c SURFACE_EARLIEST_INUSE_ADDRESS_HIGH, &earliest_inuse_address.grph.addr.high_part); grph 739 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c if (earliest_inuse_address.grph.addr.quad_part != hubp->request_address.grph.addr.quad_part) grph 282 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c output->grph.rgb.max_uncompressed_blk_size = 256; grph 283 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c output->grph.rgb.max_compressed_blk_size = 256; grph 284 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c output->grph.rgb.independent_64b_blks = false; grph 287 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c output->grph.rgb.max_uncompressed_blk_size = 128; grph 288 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c output->grph.rgb.max_compressed_blk_size = 128; grph 289 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c output->grph.rgb.independent_64b_blks = false; grph 292 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c output->grph.rgb.max_uncompressed_blk_size = 256; grph 293 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c output->grph.rgb.max_compressed_blk_size = 64; grph 294 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c output->grph.rgb.independent_64b_blks = true; grph 718 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c if (address->grph.addr.quad_part == 0) grph 725 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c if (address->grph.meta_addr.quad_part != 0) { grph 728 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c address->grph.meta_addr.high_part); grph 732 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c address->grph.meta_addr.low_part); grph 737 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c address->grph.addr.high_part); grph 741 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c address->grph.addr.low_part); grph 895 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c SURFACE_EARLIEST_INUSE_ADDRESS, &earliest_inuse_address.grph.addr.low_part); grph 898 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c SURFACE_EARLIEST_INUSE_ADDRESS_HIGH, &earliest_inuse_address.grph.addr.high_part); grph 903 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c if (earliest_inuse_address.grph.addr.quad_part != hubp->request_address.grph.addr.quad_part)