grouped_pipes    2286 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		struct pipe_ctx *grouped_pipes[])
grouped_pipes    2298 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 	gsl_params.gsl_master = grouped_pipes[0]->stream_res.tg->inst;
grouped_pipes    2301 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		grouped_pipes[i]->stream_res.tg->funcs->setup_global_swap_lock(
grouped_pipes    2302 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 					grouped_pipes[i]->stream_res.tg, &gsl_params);
grouped_pipes    2308 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		grouped_pipes[i]->stream_res.tg->funcs->enable_reset_trigger(
grouped_pipes    2309 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 				grouped_pipes[i]->stream_res.tg,
grouped_pipes    2314 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		wait_for_reset_trigger_to_occur(dc_ctx, grouped_pipes[i]->stream_res.tg);
grouped_pipes    2315 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		grouped_pipes[i]->stream_res.tg->funcs->disable_reset_trigger(
grouped_pipes    2316 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 				grouped_pipes[i]->stream_res.tg);
grouped_pipes    2323 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		grouped_pipes[i]->stream_res.tg->funcs->tear_down_global_swap_lock(grouped_pipes[i]->stream_res.tg);
grouped_pipes    2331 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		struct pipe_ctx *grouped_pipes[])
grouped_pipes    2341 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		grouped_pipes[i]->stream_res.tg->funcs->setup_global_swap_lock(
grouped_pipes    2342 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 					grouped_pipes[i]->stream_res.tg, &gsl_params);
grouped_pipes    2347 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		grouped_pipes[i]->stream_res.tg->funcs->enable_crtc_reset(
grouped_pipes    2348 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 				grouped_pipes[i]->stream_res.tg,
grouped_pipes    2350 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 				&grouped_pipes[i]->stream->triggered_crtc_reset);
grouped_pipes    2354 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		wait_for_reset_trigger_to_occur(dc_ctx, grouped_pipes[i]->stream_res.tg);
grouped_pipes    2357 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 		grouped_pipes[i]->stream_res.tg->funcs->tear_down_global_swap_lock(grouped_pipes[i]->stream_res.tg);
grouped_pipes    1569 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	struct pipe_ctx *grouped_pipes[])
grouped_pipes    1577 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 		grouped_pipes[i]->stream_res.tg->funcs->enable_reset_trigger(
grouped_pipes    1578 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 				grouped_pipes[i]->stream_res.tg,
grouped_pipes    1579 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 				grouped_pipes[0]->stream_res.tg->inst);
grouped_pipes    1587 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	wait_for_reset_trigger_to_occur(dc_ctx, grouped_pipes[1]->stream_res.tg);
grouped_pipes    1589 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 		grouped_pipes[i]->stream_res.tg->funcs->disable_reset_trigger(
grouped_pipes    1590 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 				grouped_pipes[i]->stream_res.tg);
grouped_pipes    1598 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	struct pipe_ctx *grouped_pipes[])
grouped_pipes    1605 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 		if (grouped_pipes[i]->stream_res.tg->funcs->enable_crtc_reset)
grouped_pipes    1606 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 			grouped_pipes[i]->stream_res.tg->funcs->enable_crtc_reset(
grouped_pipes    1607 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 					grouped_pipes[i]->stream_res.tg,
grouped_pipes    1609 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 					&grouped_pipes[i]->stream->triggered_crtc_reset);
grouped_pipes    1614 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 		wait_for_reset_trigger_to_occur(dc_ctx, grouped_pipes[i]->stream_res.tg);
grouped_pipes     172 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h 			struct pipe_ctx *grouped_pipes[]);
grouped_pipes     177 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h 			struct pipe_ctx *grouped_pipes[]);