gmxx_tx_spi_thresh  353 arch/mips/cavium-octeon/executive/cvmx-spi.c 		union cvmx_gmxx_tx_spi_thresh gmxx_tx_spi_thresh;
gmxx_tx_spi_thresh  371 arch/mips/cavium-octeon/executive/cvmx-spi.c 		gmxx_tx_spi_thresh.u64 = 0;
gmxx_tx_spi_thresh  372 arch/mips/cavium-octeon/executive/cvmx-spi.c 		gmxx_tx_spi_thresh.s.thresh = 4;
gmxx_tx_spi_thresh  374 arch/mips/cavium-octeon/executive/cvmx-spi.c 			       gmxx_tx_spi_thresh.u64);