gmch_n 948 drivers/gpu/drm/gma500/cdv_intel_dp.c uint32_t gmch_n; gmch_n 978 drivers/gpu/drm/gma500/cdv_intel_dp.c m_n->gmch_n = link_clock * nlanes; gmch_n 979 drivers/gpu/drm/gma500/cdv_intel_dp.c cdv_intel_reduce_ratio(&m_n->gmch_m, &m_n->gmch_n); gmch_n 1032 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(PIPE_GMCH_DATA_N(pipe), m_n.gmch_n); gmch_n 7537 drivers/gpu/drm/i915/display/intel_display.c &m_n->gmch_m, &m_n->gmch_n, gmch_n 7627 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(PCH_TRANS_DATA_N1(pipe), m_n->gmch_n); gmch_n 7656 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(PIPE_DATA_N1(transcoder), m_n->gmch_n); gmch_n 7667 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(PIPE_DATA_N2(transcoder), m2_n2->gmch_n); gmch_n 7673 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE(PIPE_DATA_N_G4X(pipe), m_n->gmch_n); gmch_n 9700 drivers/gpu/drm/i915/display/intel_display.c m_n->gmch_n = I915_READ(PCH_TRANS_DATA_N1(pipe)); gmch_n 9718 drivers/gpu/drm/i915/display/intel_display.c m_n->gmch_n = I915_READ(PIPE_DATA_N1(transcoder)); gmch_n 9727 drivers/gpu/drm/i915/display/intel_display.c m2_n2->gmch_n = I915_READ(PIPE_DATA_N2(transcoder)); gmch_n 9736 drivers/gpu/drm/i915/display/intel_display.c m_n->gmch_n = I915_READ(PIPE_DATA_N_G4X(pipe)); gmch_n 11970 drivers/gpu/drm/i915/display/intel_display.c m_n->gmch_m, m_n->gmch_n, gmch_n 12465 drivers/gpu/drm/i915/display/intel_display.c intel_compare_m_n(m_n->gmch_m, m_n->gmch_n, gmch_n 12466 drivers/gpu/drm/i915/display/intel_display.c m2_n2->gmch_m, m2_n2->gmch_n, exact) && gmch_n 12619 drivers/gpu/drm/i915/display/intel_display.c current_config->name.gmch_n, \ gmch_n 12624 drivers/gpu/drm/i915/display/intel_display.c pipe_config->name.gmch_n, \ gmch_n 12647 drivers/gpu/drm/i915/display/intel_display.c current_config->name.gmch_n, \ gmch_n 12652 drivers/gpu/drm/i915/display/intel_display.c current_config->alt_name.gmch_n, \ gmch_n 12657 drivers/gpu/drm/i915/display/intel_display.c pipe_config->name.gmch_n, \ gmch_n 262 drivers/gpu/drm/i915/display/intel_display.h u32 gmch_n;