gmbus             251 drivers/gpu/drm/gma500/intel_bios.h 	u8 gmbus:2;
gmbus             400 drivers/gpu/drm/gma500/intel_gmbus.c 	dev_priv->gmbus = kcalloc(GMBUS_NUM_PORTS, sizeof(struct intel_gmbus),
gmbus             402 drivers/gpu/drm/gma500/intel_gmbus.c 	if (dev_priv->gmbus == NULL)
gmbus             411 drivers/gpu/drm/gma500/intel_gmbus.c 		struct intel_gmbus *bus = &dev_priv->gmbus[i];
gmbus             441 drivers/gpu/drm/gma500/intel_gmbus.c 		struct intel_gmbus *bus = &dev_priv->gmbus[i];
gmbus             444 drivers/gpu/drm/gma500/intel_gmbus.c 	kfree(dev_priv->gmbus);
gmbus             445 drivers/gpu/drm/gma500/intel_gmbus.c 	dev_priv->gmbus = NULL;
gmbus             486 drivers/gpu/drm/gma500/intel_gmbus.c 	if (dev_priv->gmbus == NULL)
gmbus             490 drivers/gpu/drm/gma500/intel_gmbus.c 		struct intel_gmbus *bus = &dev_priv->gmbus[i];
gmbus             499 drivers/gpu/drm/gma500/intel_gmbus.c 	kfree(dev_priv->gmbus);
gmbus             500 drivers/gpu/drm/gma500/intel_gmbus.c 	dev_priv->gmbus = NULL;
gmbus             497 drivers/gpu/drm/gma500/psb_drv.h 	struct intel_gmbus *gmbus;
gmbus            1321 drivers/gpu/drm/gma500/psb_intel_sdvo.c 			    &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
gmbus            1963 drivers/gpu/drm/gma500/psb_intel_sdvo.c 		sdvo->i2c = &dev_priv->gmbus[pin].adapter;
gmbus            1967 drivers/gpu/drm/gma500/psb_intel_sdvo.c 		sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
gmbus             854 drivers/gpu/drm/i915/display/intel_gmbus.c 	for (pin = 0; pin < ARRAY_SIZE(dev_priv->gmbus); pin++) {
gmbus             858 drivers/gpu/drm/i915/display/intel_gmbus.c 		bus = &dev_priv->gmbus[pin];
gmbus             902 drivers/gpu/drm/i915/display/intel_gmbus.c 		bus = &dev_priv->gmbus[pin];
gmbus             914 drivers/gpu/drm/i915/display/intel_gmbus.c 	return &dev_priv->gmbus[pin].adapter;
gmbus             951 drivers/gpu/drm/i915/display/intel_gmbus.c 	for (pin = 0; pin < ARRAY_SIZE(dev_priv->gmbus); pin++) {
gmbus             955 drivers/gpu/drm/i915/display/intel_gmbus.c 		bus = &dev_priv->gmbus[pin];
gmbus             131 drivers/gpu/drm/i915/gvt/edid.c 	vgpu->display.i2c_edid.gmbus.phase = GMBUS_IDLE_PHASE;
gmbus             160 drivers/gpu/drm/i915/gvt/edid.c 	vgpu->display.i2c_edid.gmbus.phase = GMBUS_IDLE_PHASE;
gmbus             208 drivers/gpu/drm/i915/gvt/edid.c 		i2c_edid->gmbus.total_byte_count =
gmbus             226 drivers/gpu/drm/i915/gvt/edid.c 		i2c_edid->gmbus.cycle_type = gmbus1_bus_cycle(wvalue);
gmbus             246 drivers/gpu/drm/i915/gvt/edid.c 				i2c_edid->gmbus.phase = GMBUS_IDLE_PHASE;
gmbus             258 drivers/gpu/drm/i915/gvt/edid.c 			i2c_edid->gmbus.phase = GMBUS_DATA_PHASE;
gmbus             289 drivers/gpu/drm/i915/gvt/edid.c 	int byte_left = i2c_edid->gmbus.total_byte_count -
gmbus             312 drivers/gpu/drm/i915/gvt/edid.c 			switch (i2c_edid->gmbus.cycle_type) {
gmbus             315 drivers/gpu/drm/i915/gvt/edid.c 				i2c_edid->gmbus.phase = GMBUS_IDLE_PHASE;
gmbus             320 drivers/gpu/drm/i915/gvt/edid.c 				i2c_edid->gmbus.phase = GMBUS_WAIT_PHASE;
gmbus             572 drivers/gpu/drm/i915/gvt/edid.c 	memset(&edid->gmbus, 0, sizeof(struct intel_vgpu_i2c_gmbus));
gmbus             133 drivers/gpu/drm/i915/gvt/edid.h 	struct intel_vgpu_i2c_gmbus gmbus;
gmbus            1324 drivers/gpu/drm/i915/i915_drv.h 	struct intel_gmbus gmbus[GMBUS_NUM_PINS];