gfx8 2834 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c tiling_info->gfx8.num_banks = num_banks; gfx8 2835 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c tiling_info->gfx8.array_mode = gfx8 2837 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c tiling_info->gfx8.tile_split = tile_split; gfx8 2838 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c tiling_info->gfx8.bank_width = bankw; gfx8 2839 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c tiling_info->gfx8.bank_height = bankh; gfx8 2840 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c tiling_info->gfx8.tile_aspect = mtaspect; gfx8 2841 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c tiling_info->gfx8.tile_mode = gfx8 2845 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c tiling_info->gfx8.array_mode = DC_ARRAY_1D_TILED_THIN1; gfx8 2848 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c tiling_info->gfx8.pipe_config = gfx8 142 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->tiling_info.gfx8.num_banks, gfx8 143 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->tiling_info.gfx8.bank_width, gfx8 144 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->tiling_info.gfx8.bank_width_c, gfx8 145 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->tiling_info.gfx8.bank_height, gfx8 146 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->tiling_info.gfx8.bank_height_c, gfx8 147 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->tiling_info.gfx8.tile_aspect, gfx8 148 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->tiling_info.gfx8.tile_aspect_c, gfx8 149 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->tiling_info.gfx8.tile_split, gfx8 150 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->tiling_info.gfx8.tile_split_c, gfx8 151 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->tiling_info.gfx8.tile_mode, gfx8 152 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->tiling_info.gfx8.tile_mode_c); gfx8 162 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->tiling_info.gfx8.pipe_config, gfx8 163 drivers/gpu/drm/amd/display/dc/core/dc_debug.c plane_state->tiling_info.gfx8.array_mode, gfx8 234 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->plane_info->tiling_info.gfx8.num_banks, gfx8 235 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->plane_info->tiling_info.gfx8.bank_width, gfx8 236 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->plane_info->tiling_info.gfx8.bank_width_c, gfx8 237 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->plane_info->tiling_info.gfx8.bank_height, gfx8 238 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->plane_info->tiling_info.gfx8.bank_height_c, gfx8 239 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->plane_info->tiling_info.gfx8.tile_aspect, gfx8 240 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->plane_info->tiling_info.gfx8.tile_aspect_c, gfx8 241 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->plane_info->tiling_info.gfx8.tile_split, gfx8 242 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->plane_info->tiling_info.gfx8.tile_split_c, gfx8 243 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->plane_info->tiling_info.gfx8.tile_mode, gfx8 244 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->plane_info->tiling_info.gfx8.tile_mode_c); gfx8 251 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->plane_info->tiling_info.gfx8.pipe_config, gfx8 252 drivers/gpu/drm/amd/display/dc/core/dc_debug.c update->plane_info->tiling_info.gfx8.array_mode, gfx8 377 drivers/gpu/drm/amd/display/dc/dc_hw_types.h } gfx8; gfx8 103 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c switch (tiling_info->gfx8.array_mode) { gfx8 374 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c GRPH_NUM_BANKS, info->gfx8.num_banks, gfx8 375 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c GRPH_BANK_WIDTH, info->gfx8.bank_width, gfx8 376 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c GRPH_BANK_HEIGHT, info->gfx8.bank_height, gfx8 377 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c GRPH_MACRO_TILE_ASPECT, info->gfx8.tile_aspect, gfx8 378 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c GRPH_TILE_SPLIT, info->gfx8.tile_split, gfx8 379 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c GRPH_MICRO_TILE_MODE, info->gfx8.tile_mode, gfx8 380 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c GRPH_PIPE_CONFIG, info->gfx8.pipe_config, gfx8 381 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c GRPH_ARRAY_MODE, info->gfx8.array_mode, gfx8 1845 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c if (pipe_ctx->plane_state->tiling_info.gfx8.array_mode == DC_ARRAY_LINEAR_GENERAL) gfx8 171 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c set_reg_field_value(value, info->gfx8.num_banks, gfx8 174 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c set_reg_field_value(value, info->gfx8.bank_width, gfx8 177 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c set_reg_field_value(value, info->gfx8.bank_height, gfx8 180 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c set_reg_field_value(value, info->gfx8.tile_aspect, gfx8 183 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c set_reg_field_value(value, info->gfx8.tile_split, gfx8 186 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c set_reg_field_value(value, info->gfx8.tile_mode, gfx8 189 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c set_reg_field_value(value, info->gfx8.pipe_config, gfx8 192 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c set_reg_field_value(value, info->gfx8.array_mode, gfx8 208 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c set_reg_field_value(value, info->gfx8.bank_width_c, gfx8 211 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c set_reg_field_value(value, info->gfx8.bank_height_c, gfx8 214 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c set_reg_field_value(value, info->gfx8.tile_aspect_c, gfx8 217 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c set_reg_field_value(value, info->gfx8.tile_split_c, gfx8 220 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c set_reg_field_value(value, info->gfx8.tile_mode_c, gfx8 544 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c switch (tiling_info->gfx8.array_mode) {