get_uclk_dpm_states  895 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	if (!smu->ppt_funcs->get_uclk_dpm_states)
get_uclk_dpm_states  898 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 	if (!smu->ppt_funcs->get_uclk_dpm_states(smu,
get_uclk_dpm_states  945 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 		funcs->nv_funcs.get_uclk_dpm_states = pp_nv_get_uclk_dpm_states;
get_uclk_dpm_states 3401 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 		if (pool->base.pp_smu->nv_funcs.get_uclk_dpm_states) {
get_uclk_dpm_states 3402 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 			status = (pool->base.pp_smu->nv_funcs.get_uclk_dpm_states)
get_uclk_dpm_states  235 drivers/gpu/drm/amd/display/dc/dm_pp_smu.h 	enum pp_smu_status (*get_uclk_dpm_states)(struct pp_smu *pp,
get_uclk_dpm_states  457 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h 	int (*get_uclk_dpm_states)(struct smu_context *smu, uint32_t *clocks_in_khz, uint32_t *num_states);
get_uclk_dpm_states  756 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h 	((smu)->ppt_funcs->get_uclk_dpm_states ? (smu)->ppt_funcs->get_uclk_dpm_states((smu), (clocks_in_khz), (num_states)) : 0)
get_uclk_dpm_states 1636 drivers/gpu/drm/amd/powerplay/navi10_ppt.c 	.get_uclk_dpm_states = navi10_get_uclk_dpm_states,