HDMI_GENERIC_PACKET_CONTROL4  144 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	uint32_t HDMI_GENERIC_PACKET_CONTROL4;
HDMI_GENERIC_PACKET_CONTROL4  125 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c 		REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL4,
HDMI_GENERIC_PACKET_CONTROL4  132 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c 		REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL4,
HDMI_GENERIC_PACKET_CONTROL4  203 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c 	REG_SET_2(HDMI_GENERIC_PACKET_CONTROL4, 0,
HDMI_GENERIC_PACKET_CONTROL4   35 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h 	SRI(HDMI_GENERIC_PACKET_CONTROL4, DIG, id), \