HDMI_GENERIC_PACKET_CONTROL2 236 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c if (REG(HDMI_GENERIC_PACKET_CONTROL2)) HDMI_GENERIC_PACKET_CONTROL2 237 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_3(HDMI_GENERIC_PACKET_CONTROL2, HDMI_GENERIC_PACKET_CONTROL2 243 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c if (REG(HDMI_GENERIC_PACKET_CONTROL2)) HDMI_GENERIC_PACKET_CONTROL2 244 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_UPDATE_3(HDMI_GENERIC_PACKET_CONTROL2, HDMI_GENERIC_PACKET_CONTROL2 829 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c if (REG(HDMI_GENERIC_PACKET_CONTROL2)) HDMI_GENERIC_PACKET_CONTROL2 830 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_SET_6(HDMI_GENERIC_PACKET_CONTROL2, 0, HDMI_GENERIC_PACKET_CONTROL2 104 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SRI(HDMI_GENERIC_PACKET_CONTROL2, DIG, id), \ HDMI_GENERIC_PACKET_CONTROL2 673 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h uint32_t HDMI_GENERIC_PACKET_CONTROL2; HDMI_GENERIC_PACKET_CONTROL2 213 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_3(HDMI_GENERIC_PACKET_CONTROL2, HDMI_GENERIC_PACKET_CONTROL2 219 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_UPDATE_3(HDMI_GENERIC_PACKET_CONTROL2, HDMI_GENERIC_PACKET_CONTROL2 690 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_SET_6(HDMI_GENERIC_PACKET_CONTROL2, 0, HDMI_GENERIC_PACKET_CONTROL2 60 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SRI(HDMI_GENERIC_PACKET_CONTROL2, DIG, id), \ HDMI_GENERIC_PACKET_CONTROL2 142 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h uint32_t HDMI_GENERIC_PACKET_CONTROL2; HDMI_GENERIC_PACKET_CONTROL2 97 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL2, HDMI_GENERIC_PACKET_CONTROL2 104 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_UPDATE(HDMI_GENERIC_PACKET_CONTROL2, HDMI_GENERIC_PACKET_CONTROL2 183 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_SET_2(HDMI_GENERIC_PACKET_CONTROL2, 0,