gen_cntl_val      388 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 	uint32_t gen_cntl_reg, gen_cntl_val;
gen_cntl_val      538 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 	gen_cntl_val = RREG32(gen_cntl_reg);
gen_cntl_val      539 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 	gen_cntl_val &= ~(0xf << 8);
gen_cntl_val      540 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 	gen_cntl_val |= (format << 8);
gen_cntl_val      541 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 	gen_cntl_val &= ~RADEON_CRTC_VSTAT_MODE_MASK;
gen_cntl_val      542 drivers/gpu/drm/radeon/radeon_legacy_crtc.c 	WREG32(gen_cntl_reg, gen_cntl_val);