gb_tiling_config 1185 drivers/gpu/drm/radeon/rv770.c 	u32 gb_tiling_config = 0;
gb_tiling_config 1327 drivers/gpu/drm/radeon/rv770.c 		gb_tiling_config = PIPE_TILING(0);
gb_tiling_config 1330 drivers/gpu/drm/radeon/rv770.c 		gb_tiling_config = PIPE_TILING(1);
gb_tiling_config 1333 drivers/gpu/drm/radeon/rv770.c 		gb_tiling_config = PIPE_TILING(2);
gb_tiling_config 1336 drivers/gpu/drm/radeon/rv770.c 		gb_tiling_config = PIPE_TILING(3);
gb_tiling_config 1350 drivers/gpu/drm/radeon/rv770.c 	tmp = (gb_tiling_config & PIPE_TILING__MASK) >> PIPE_TILING__SHIFT;
gb_tiling_config 1353 drivers/gpu/drm/radeon/rv770.c 	gb_tiling_config |= tmp << 16;
gb_tiling_config 1357 drivers/gpu/drm/radeon/rv770.c 		gb_tiling_config |= BANK_TILING(1);
gb_tiling_config 1360 drivers/gpu/drm/radeon/rv770.c 			gb_tiling_config |= BANK_TILING(1);
gb_tiling_config 1362 drivers/gpu/drm/radeon/rv770.c 			gb_tiling_config |= BANK_TILING(0);
gb_tiling_config 1364 drivers/gpu/drm/radeon/rv770.c 	rdev->config.rv770.tiling_nbanks = 4 << ((gb_tiling_config >> 4) & 0x3);
gb_tiling_config 1365 drivers/gpu/drm/radeon/rv770.c 	gb_tiling_config |= GROUP_SIZE((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT);
gb_tiling_config 1367 drivers/gpu/drm/radeon/rv770.c 		gb_tiling_config |= ROW_TILING(3);
gb_tiling_config 1368 drivers/gpu/drm/radeon/rv770.c 		gb_tiling_config |= SAMPLE_SPLIT(3);
gb_tiling_config 1370 drivers/gpu/drm/radeon/rv770.c 		gb_tiling_config |=
gb_tiling_config 1372 drivers/gpu/drm/radeon/rv770.c 		gb_tiling_config |=
gb_tiling_config 1376 drivers/gpu/drm/radeon/rv770.c 	gb_tiling_config |= BANK_SWAPS(1);
gb_tiling_config 1377 drivers/gpu/drm/radeon/rv770.c 	rdev->config.rv770.tile_config = gb_tiling_config;
gb_tiling_config 1379 drivers/gpu/drm/radeon/rv770.c 	WREG32(GB_TILING_CONFIG, gb_tiling_config);
gb_tiling_config 1380 drivers/gpu/drm/radeon/rv770.c 	WREG32(DCP_TILING_CONFIG, (gb_tiling_config & 0xffff));
gb_tiling_config 1381 drivers/gpu/drm/radeon/rv770.c 	WREG32(HDP_TILING_CONFIG, (gb_tiling_config & 0xffff));
gb_tiling_config 1382 drivers/gpu/drm/radeon/rv770.c 	WREG32(DMA_TILING_CONFIG, (gb_tiling_config & 0xffff));
gb_tiling_config 1383 drivers/gpu/drm/radeon/rv770.c 	WREG32(DMA_TILING_CONFIG2, (gb_tiling_config & 0xffff));
gb_tiling_config 1385 drivers/gpu/drm/radeon/rv770.c 		WREG32(UVD_UDEC_DB_TILING_CONFIG, (gb_tiling_config & 0xffff));
gb_tiling_config 1386 drivers/gpu/drm/radeon/rv770.c 		WREG32(UVD_UDEC_DBW_TILING_CONFIG, (gb_tiling_config & 0xffff));
gb_tiling_config 1387 drivers/gpu/drm/radeon/rv770.c 		WREG32(UVD_UDEC_TILING_CONFIG, (gb_tiling_config & 0xffff));