gafr               54 arch/arm/mach-pxa/mfp-pxa2xx.c 	unsigned long gafr, mask = GPIO_bit(gpio);
gafr               65 arch/arm/mach-pxa/mfp-pxa2xx.c 	gafr = (uorl == 0) ? GAFR_L(bank) : GAFR_U(bank);
gafr               66 arch/arm/mach-pxa/mfp-pxa2xx.c 	gafr = (gafr & ~(0x3 << shft)) | (fn << shft);
gafr               69 arch/arm/mach-pxa/mfp-pxa2xx.c 		GAFR_L(bank) = gafr;
gafr               71 arch/arm/mach-pxa/mfp-pxa2xx.c 		GAFR_U(bank) = gafr;
gafr               89 drivers/gpio/gpio-intel-mid.c 	void __iomem *gafr = gpio_reg_2bit(chip, offset, GAFR);
gafr               90 drivers/gpio/gpio-intel-mid.c 	u32 value = readl(gafr);
gafr               95 drivers/gpio/gpio-intel-mid.c 		writel(value, gafr);
gafr              203 drivers/gpio/gpio-pxa.c 	unsigned long gafr = 0, gpdr = 0;
gafr              213 drivers/gpio/gpio-pxa.c 		gafr = readl_relaxed(base + GAFR_OFFSET);
gafr              214 drivers/gpio/gpio-pxa.c 		af = (gafr >> ((gpio & 0xf) * 2)) & 0x3;
gafr              145 drivers/pinctrl/pxa/pinctrl-pxa2xx.c 	void __iomem *gafr, *gpdr;
gafr              155 drivers/pinctrl/pxa/pinctrl-pxa2xx.c 	gafr = pctl->base_gafr[pin / 16];
gafr              163 drivers/pinctrl/pxa/pinctrl-pxa2xx.c 	val = readl_relaxed(gafr);
gafr              165 drivers/pinctrl/pxa/pinctrl-pxa2xx.c 	writel_relaxed(val, gafr);