fwparams           32 drivers/gpu/drm/sti/sti_awg_utils.c 			      struct awg_code_generation_params *fwparams)
fwparams           48 drivers/gpu/drm/sti/sti_awg_utils.c 		if (fwparams->instruction_offset >= AWG_MAX_INST) {
fwparams          113 drivers/gpu/drm/sti/sti_awg_utils.c 		fwparams->ram_code[fwparams->instruction_offset] =
fwparams          115 drivers/gpu/drm/sti/sti_awg_utils.c 		fwparams->instruction_offset++;
fwparams          121 drivers/gpu/drm/sti/sti_awg_utils.c 		struct awg_code_generation_params *fwparams,
fwparams          130 drivers/gpu/drm/sti/sti_awg_utils.c 		ret |= awg_generate_instr(RPLSET, val, 0, 0, fwparams);
fwparams          133 drivers/gpu/drm/sti/sti_awg_utils.c 		ret |= awg_generate_instr(SKIP, val, 0, 0, fwparams);
fwparams          139 drivers/gpu/drm/sti/sti_awg_utils.c 			val, 0, 1, fwparams);
fwparams          144 drivers/gpu/drm/sti/sti_awg_utils.c 		ret |= awg_generate_instr(SKIP, val, 0, 1, fwparams);
fwparams          148 drivers/gpu/drm/sti/sti_awg_utils.c 		ret |= awg_generate_instr(SET, val, 0, 0, fwparams);
fwparams          155 drivers/gpu/drm/sti/sti_awg_utils.c 		struct awg_code_generation_params *fwparams,
fwparams          164 drivers/gpu/drm/sti/sti_awg_utils.c 		ret |= awg_generate_instr(RPLSET, val, 0, 0, fwparams);
fwparams          167 drivers/gpu/drm/sti/sti_awg_utils.c 		ret |= awg_generate_instr(REPLAY, val, 0, 0, fwparams);
fwparams          174 drivers/gpu/drm/sti/sti_awg_utils.c 		ret |= awg_generate_line_signal(fwparams, timing);
fwparams          178 drivers/gpu/drm/sti/sti_awg_utils.c 					  0, 0, fwparams);
fwparams          185 drivers/gpu/drm/sti/sti_awg_utils.c 		ret |= awg_generate_instr(RPLSET, val, 0, 0, fwparams);
fwparams          188 drivers/gpu/drm/sti/sti_awg_utils.c 		ret |= awg_generate_instr(REPLAY, val, 0, 0, fwparams);