full_recout_width 417 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c input->dest.full_recout_width = pipe->plane_res.scl_data.recout.width; full_recout_width 2058 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.full_recout_width = pipes[pipe_cnt].pipe.dest.recout_width; /*when is_hsplit != 1*/ full_recout_width 2099 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.full_recout_width = scl->recout.width; full_recout_width 2102 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.full_recout_width += full_recout_width 2107 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c pipes[pipe_cnt].pipe.dest.full_recout_width += full_recout_width 892 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c unsigned int full_recout_width; full_recout_width 1194 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c full_recout_width = 0; full_recout_width 1199 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c if (dst->full_recout_width == 0 && !dst->odm_combine) { full_recout_width 1202 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c full_recout_width = dst->recout_width * 2; // assume half split for dcn1 full_recout_width 1204 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c full_recout_width = dst->full_recout_width; full_recout_width 1206 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c full_recout_width = dst->recout_width; full_recout_width 1213 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c full_recout_width, full_recout_width 1224 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c full_recout_width, full_recout_width 1233 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c full_recout_width); full_recout_width 1249 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c full_recout_width, full_recout_width 1260 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c full_recout_width, full_recout_width 1288 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c full_recout_width, full_recout_width 1298 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c full_recout_width, full_recout_width 1320 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c full_recout_width, full_recout_width 1330 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c full_recout_width, full_recout_width 892 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c unsigned int full_recout_width; full_recout_width 1194 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c full_recout_width = 0; full_recout_width 1199 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c if (dst->full_recout_width == 0 && !dst->odm_combine) { full_recout_width 1202 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c full_recout_width = dst->recout_width * 2; // assume half split for dcn1 full_recout_width 1204 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c full_recout_width = dst->full_recout_width; full_recout_width 1206 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c full_recout_width = dst->recout_width; full_recout_width 1213 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c full_recout_width, full_recout_width 1224 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c full_recout_width, full_recout_width 1233 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c full_recout_width); full_recout_width 1249 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c full_recout_width, full_recout_width 1260 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c full_recout_width, full_recout_width 1288 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c full_recout_width, full_recout_width 1298 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c full_recout_width, full_recout_width 1320 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c full_recout_width, full_recout_width 1330 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c full_recout_width, full_recout_width 711 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c full_src_vp_width = pipe_param.scale_ratio_depth.hscl_ratio_c * pipe_param.dest.full_recout_width; full_recout_width 714 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c full_src_vp_width = pipe_param.scale_ratio_depth.hscl_ratio * pipe_param.dest.full_recout_width; full_recout_width 939 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c unsigned int full_recout_width; full_recout_width 1246 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c full_recout_width = 0; full_recout_width 1251 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c if (dst->full_recout_width == 0 && !dst->odm_combine) { full_recout_width 1255 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c full_recout_width = dst->recout_width * 2; // assume half split for dcn1 full_recout_width 1257 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c full_recout_width = dst->full_recout_width; full_recout_width 1259 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c full_recout_width = dst->recout_width; full_recout_width 1267 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c full_recout_width, full_recout_width 1279 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c full_recout_width, full_recout_width 1286 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c dml_print("DML_DLG: %s: full_recout_width = %d\n", __func__, full_recout_width); full_recout_width 1306 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c full_recout_width, full_recout_width 1318 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c full_recout_width, full_recout_width 1349 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c full_recout_width, full_recout_width 1360 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c full_recout_width, full_recout_width 1385 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c full_recout_width, full_recout_width 1396 drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c full_recout_width, full_recout_width 306 drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h unsigned int full_recout_width; full_recout_width 1106 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c unsigned int full_recout_width; full_recout_width 1634 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c full_recout_width = 0; full_recout_width 1636 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c if (e2e_pipe_param.pipe.dest.full_recout_width == 0) { full_recout_width 1638 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c full_recout_width = e2e_pipe_param.pipe.dest.recout_width * 2; /* assume half split for dcn1 */ full_recout_width 1640 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c full_recout_width = e2e_pipe_param.pipe.dest.full_recout_width; full_recout_width 1642 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c full_recout_width = e2e_pipe_param.pipe.dest.recout_width; full_recout_width 1648 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c full_recout_width, full_recout_width 1658 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c full_recout_width, full_recout_width 1664 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c DTRACE("DLG: %s: full_recout_width = %d", __func__, full_recout_width); full_recout_width 1689 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c full_recout_width, full_recout_width 1699 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c full_recout_width, full_recout_width 1738 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c full_recout_width, full_recout_width 1747 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c full_recout_width, full_recout_width 1775 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c full_recout_width, full_recout_width 1784 drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c full_recout_width,