GRPH_CONTROL 1884 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 0); GRPH_CONTROL 1885 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 0); GRPH_CONTROL 1889 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 1); GRPH_CONTROL 1890 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 2); GRPH_CONTROL 1898 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 1); GRPH_CONTROL 1899 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 0); GRPH_CONTROL 1907 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 1); GRPH_CONTROL 1908 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 5); GRPH_CONTROL 1915 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 1); GRPH_CONTROL 1916 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 1); GRPH_CONTROL 1924 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 2); GRPH_CONTROL 1925 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 0); GRPH_CONTROL 1933 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 2); GRPH_CONTROL 1934 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 1); GRPH_CONTROL 1944 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 2); GRPH_CONTROL 1945 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 4); GRPH_CONTROL 1955 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 2); GRPH_CONTROL 1956 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 0); GRPH_CONTROL 1979 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_NUM_BANKS, num_banks); GRPH_CONTROL 1980 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_ARRAY_MODE, GRPH_CONTROL 1982 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_TILE_SPLIT, GRPH_CONTROL 1984 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_BANK_WIDTH, bankw); GRPH_CONTROL 1985 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_BANK_HEIGHT, bankh); GRPH_CONTROL 1986 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_MACRO_TILE_ASPECT, GRPH_CONTROL 1988 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_MICRO_TILE_MODE, GRPH_CONTROL 1991 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_ARRAY_MODE, GRPH_CONTROL 1995 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_PIPE_CONFIG, GRPH_CONTROL 1926 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 0); GRPH_CONTROL 1927 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 0); GRPH_CONTROL 1931 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 1); GRPH_CONTROL 1932 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 2); GRPH_CONTROL 1940 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 1); GRPH_CONTROL 1941 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 0); GRPH_CONTROL 1949 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 1); GRPH_CONTROL 1950 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 5); GRPH_CONTROL 1957 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 1); GRPH_CONTROL 1958 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 1); GRPH_CONTROL 1966 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 2); GRPH_CONTROL 1967 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 0); GRPH_CONTROL 1975 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 2); GRPH_CONTROL 1976 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 1); GRPH_CONTROL 1986 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 2); GRPH_CONTROL 1987 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 4); GRPH_CONTROL 1997 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 2); GRPH_CONTROL 1998 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 0); GRPH_CONTROL 2021 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_NUM_BANKS, num_banks); GRPH_CONTROL 2022 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_ARRAY_MODE, GRPH_CONTROL 2024 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_TILE_SPLIT, GRPH_CONTROL 2026 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_BANK_WIDTH, bankw); GRPH_CONTROL 2027 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_BANK_HEIGHT, bankh); GRPH_CONTROL 2028 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_MACRO_TILE_ASPECT, GRPH_CONTROL 2030 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_MICRO_TILE_MODE, GRPH_CONTROL 2033 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_ARRAY_MODE, GRPH_CONTROL 2037 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_PIPE_CONFIG, GRPH_CONTROL 359 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c REG_UPDATE_6(GRPH_CONTROL, GRPH_CONTROL 373 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c REG_UPDATE_9(GRPH_CONTROL, GRPH_CONTROL 493 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c REG_UPDATE_2(GRPH_CONTROL, GRPH_CONTROL 36 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h SRI(GRPH_CONTROL, DCP, id),\ GRPH_CONTROL 87 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h uint32_t GRPH_CONTROL; GRPH_CONTROL 130 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h SFB(blk, GRPH_CONTROL, GRPH_NUM_BANKS, mask_sh),\ GRPH_CONTROL 131 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h SFB(blk, GRPH_CONTROL, GRPH_BANK_WIDTH, mask_sh),\ GRPH_CONTROL 132 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h SFB(blk, GRPH_CONTROL, GRPH_BANK_HEIGHT, mask_sh),\ GRPH_CONTROL 133 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h SFB(blk, GRPH_CONTROL, GRPH_MACRO_TILE_ASPECT, mask_sh),\ GRPH_CONTROL 134 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h SFB(blk, GRPH_CONTROL, GRPH_TILE_SPLIT, mask_sh),\ GRPH_CONTROL 135 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h SFB(blk, GRPH_CONTROL, GRPH_MICRO_TILE_MODE, mask_sh),\ GRPH_CONTROL 136 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h SFB(blk, GRPH_CONTROL, GRPH_PIPE_CONFIG, mask_sh),\ GRPH_CONTROL 137 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h SFB(blk, GRPH_CONTROL, GRPH_ARRAY_MODE, mask_sh),\ GRPH_CONTROL 138 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h SFB(blk, GRPH_CONTROL, GRPH_COLOR_EXPANSION_MODE, mask_sh) GRPH_CONTROL 142 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h SFB(blk, GRPH_CONTROL, GRPH_DEPTH, mask_sh),\ GRPH_CONTROL 143 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h SFB(blk, GRPH_CONTROL, GRPH_FORMAT, mask_sh),\ GRPH_CONTROL 144 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h SFB(blk, GRPH_CONTROL, GRPH_NUM_BANKS, mask_sh),\ GRPH_CONTROL 209 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h SFB(blk, GRPH_CONTROL, GRPH_SW_MODE, mask_sh),\ GRPH_CONTROL 210 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h SFB(blk, GRPH_CONTROL, GRPH_SE_ENABLE, mask_sh),\ GRPH_CONTROL 211 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h SFB(blk, GRPH_CONTROL, GRPH_NUM_SHADER_ENGINES, mask_sh),\ GRPH_CONTROL 212 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h SFB(blk, GRPH_CONTROL, GRPH_NUM_PIPES, mask_sh),\ GRPH_CONTROL 213 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.h SFB(blk, GRPH_CONTROL, GRPH_COLOR_EXPANSION_MODE, mask_sh)