frag_mode         160 drivers/crypto/marvell/hash.c 	u32 frag_mode;
frag_mode         196 drivers/crypto/marvell/hash.c 	frag_mode = mv_cesa_get_op_cfg(op) & CESA_SA_DESC_CFG_FRAG_MSK;
frag_mode         200 drivers/crypto/marvell/hash.c 		if (frag_mode == CESA_SA_DESC_CFG_FIRST_FRAG)
frag_mode         201 drivers/crypto/marvell/hash.c 			frag_mode = CESA_SA_DESC_CFG_NOT_FRAG;
frag_mode         202 drivers/crypto/marvell/hash.c 		else if (frag_mode == CESA_SA_DESC_CFG_MID_FRAG)
frag_mode         203 drivers/crypto/marvell/hash.c 			frag_mode = CESA_SA_DESC_CFG_LAST_FRAG;
frag_mode         206 drivers/crypto/marvell/hash.c 	if (frag_mode == CESA_SA_DESC_CFG_NOT_FRAG ||
frag_mode         207 drivers/crypto/marvell/hash.c 	    frag_mode == CESA_SA_DESC_CFG_LAST_FRAG) {
frag_mode         227 drivers/crypto/marvell/hash.c 			if (frag_mode == CESA_SA_DESC_CFG_LAST_FRAG)
frag_mode         228 drivers/crypto/marvell/hash.c 				frag_mode = CESA_SA_DESC_CFG_MID_FRAG;
frag_mode         230 drivers/crypto/marvell/hash.c 				frag_mode = CESA_SA_DESC_CFG_FIRST_FRAG;
frag_mode         235 drivers/crypto/marvell/hash.c 	mv_cesa_update_op_cfg(op, frag_mode, CESA_SA_DESC_CFG_FRAG_MSK);
frag_mode         240 drivers/crypto/marvell/hash.c 	if (frag_mode == CESA_SA_DESC_CFG_FIRST_FRAG)