frac_urg_bw_flip  158 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c 	if (safe_to_lower || watermarks->a.frac_urg_bw_flip
frac_urg_bw_flip  159 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c 			> hubbub1->watermarks.a.frac_urg_bw_flip) {
frac_urg_bw_flip  160 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c 		hubbub1->watermarks.a.frac_urg_bw_flip = watermarks->a.frac_urg_bw_flip;
frac_urg_bw_flip  163 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c 				DCHUBBUB_ARB_FRAC_URG_BW_FLIP_A, watermarks->a.frac_urg_bw_flip);
frac_urg_bw_flip  189 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c 	if (safe_to_lower || watermarks->a.frac_urg_bw_flip
frac_urg_bw_flip  190 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c 			> hubbub1->watermarks.a.frac_urg_bw_flip) {
frac_urg_bw_flip  191 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c 		hubbub1->watermarks.a.frac_urg_bw_flip = watermarks->a.frac_urg_bw_flip;
frac_urg_bw_flip  194 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c 				DCHUBBUB_ARB_FRAC_URG_BW_FLIP_B, watermarks->a.frac_urg_bw_flip);
frac_urg_bw_flip  220 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c 	if (safe_to_lower || watermarks->a.frac_urg_bw_flip
frac_urg_bw_flip  221 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c 			> hubbub1->watermarks.a.frac_urg_bw_flip) {
frac_urg_bw_flip  222 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c 		hubbub1->watermarks.a.frac_urg_bw_flip = watermarks->a.frac_urg_bw_flip;
frac_urg_bw_flip  225 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c 				DCHUBBUB_ARB_FRAC_URG_BW_FLIP_C, watermarks->a.frac_urg_bw_flip);
frac_urg_bw_flip  251 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c 	if (safe_to_lower || watermarks->a.frac_urg_bw_flip
frac_urg_bw_flip  252 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c 			> hubbub1->watermarks.a.frac_urg_bw_flip) {
frac_urg_bw_flip  253 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c 		hubbub1->watermarks.a.frac_urg_bw_flip = watermarks->a.frac_urg_bw_flip;
frac_urg_bw_flip  256 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c 				DCHUBBUB_ARB_FRAC_URG_BW_FLIP_D, watermarks->a.frac_urg_bw_flip);
frac_urg_bw_flip  973 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c 	wm_set->frac_urg_bw_flip = get_fraction_of_urgent_bandwidth_imm_flip(dml, pipes, pipe_cnt) * 1000;
frac_urg_bw_flip   45 drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h 	uint32_t frac_urg_bw_flip;