fpga_ctrl 85 drivers/net/ethernet/mellanox/mlx5/core/fpga/cmd.c u32 in[MLX5_ST_SZ_DW(fpga_ctrl)] = {0}; fpga_ctrl 86 drivers/net/ethernet/mellanox/mlx5/core/fpga/cmd.c u32 out[MLX5_ST_SZ_DW(fpga_ctrl)]; fpga_ctrl 88 drivers/net/ethernet/mellanox/mlx5/core/fpga/cmd.c MLX5_SET(fpga_ctrl, in, operation, op); fpga_ctrl 128 drivers/net/ethernet/mellanox/mlx5/core/fpga/cmd.c u32 in[MLX5_ST_SZ_DW(fpga_ctrl)] = {0}; fpga_ctrl 129 drivers/net/ethernet/mellanox/mlx5/core/fpga/cmd.c u32 out[MLX5_ST_SZ_DW(fpga_ctrl)]; fpga_ctrl 137 drivers/net/ethernet/mellanox/mlx5/core/fpga/cmd.c query->status = MLX5_GET(fpga_ctrl, out, status); fpga_ctrl 138 drivers/net/ethernet/mellanox/mlx5/core/fpga/cmd.c query->admin_image = MLX5_GET(fpga_ctrl, out, flash_select_admin); fpga_ctrl 139 drivers/net/ethernet/mellanox/mlx5/core/fpga/cmd.c query->oper_image = MLX5_GET(fpga_ctrl, out, flash_select_oper);