fpcr               60 arch/alpha/include/asm/fpu.h swcr_update_status(unsigned long swcr, unsigned long fpcr)
fpcr               66 arch/alpha/include/asm/fpu.h 		swcr |= (fpcr >> 35) & IEEE_STATUS_MASK;
fpcr              823 arch/alpha/kernel/osf_sys.c 		unsigned long swcr, fpcr;
fpcr              841 arch/alpha/kernel/osf_sys.c 		fpcr = rdfpcr() & FPCR_DYN_MASK;
fpcr              842 arch/alpha/kernel/osf_sys.c 		fpcr |= ieee_swcr_to_fpcr(swcr);
fpcr              843 arch/alpha/kernel/osf_sys.c 		wrfpcr(fpcr);
fpcr              849 arch/alpha/kernel/osf_sys.c 		unsigned long exc, swcr, fpcr, fex;
fpcr              862 arch/alpha/kernel/osf_sys.c 		fpcr = rdfpcr();
fpcr              863 arch/alpha/kernel/osf_sys.c 		fpcr |= ieee_swcr_to_fpcr(swcr);
fpcr              864 arch/alpha/kernel/osf_sys.c 		wrfpcr(fpcr);
fpcr              134 arch/alpha/kernel/ptrace.c 		unsigned long fpcr = *get_reg_addr(task, regno);
fpcr              137 arch/alpha/kernel/ptrace.c 		swcr = swcr_update_status(swcr, fpcr);
fpcr              138 arch/alpha/kernel/ptrace.c 		return fpcr | swcr;
fpcr              108 arch/alpha/math-emu/math.c 	unsigned long res, va, vb, vc, swcr, fpcr;
fpcr              120 arch/alpha/math-emu/math.c 	fpcr = rdfpcr();
fpcr              121 arch/alpha/math-emu/math.c 	swcr = swcr_update_status(current_thread_info()->ieee_state, fpcr);
fpcr              125 arch/alpha/math-emu/math.c 		mode = (fpcr >> FPCR_DYN_SHIFT) & 3;
fpcr              308 arch/alpha/math-emu/math.c 		fpcr &= (~FPCR_MASK | FPCR_DYN_MASK);
fpcr              309 arch/alpha/math-emu/math.c 		fpcr |= ieee_swcr_to_fpcr(swcr);
fpcr              310 arch/alpha/math-emu/math.c 		wrfpcr(fpcr);
fpcr               45 arch/arm/include/asm/user.h 	unsigned int fpcr:32;
fpcr               70 arch/arm/nwfpe/fpa11.h /* 100 */ FPCR fpcr;		/* floating point control register */
fpcr               28 arch/arm64/include/asm/fpsimdmacros.h 	mrs	x\tmpnr, fpcr
fpcr               37 arch/arm64/include/asm/fpsimdmacros.h 	mrs	\tmp, fpcr
fpcr               40 arch/arm64/include/asm/fpsimdmacros.h 	msr	fpcr, \state
fpcr              195 arch/arm64/include/asm/fpsimdmacros.h 		mrs		x\nxtmp, fpcr
fpcr              215 arch/arm64/include/asm/fpsimdmacros.h 		msr		fpcr, x\nxtmp
fpcr               85 arch/arm64/include/uapi/asm/ptrace.h 	__u32		fpcr;
fpcr               76 arch/arm64/include/uapi/asm/sigcontext.h 	__u32 fpcr;
fpcr             1383 arch/arm64/kernel/ptrace.c 			(uregs->fpcr & VFP_FPSCR_CTRL_MASK);
fpcr             1415 arch/arm64/kernel/ptrace.c 			uregs->fpcr = fpscr & VFP_FPSCR_CTRL_MASK;
fpcr              179 arch/arm64/kernel/signal.c 	__put_user_error(fpsimd->fpcr, &ctx->fpcr, err);
fpcr              206 arch/arm64/kernel/signal.c 	__get_user_error(fpsimd.fpcr, &ctx->fpcr, err);
fpcr              306 arch/arm64/kernel/signal.c 	__get_user_error(fpsimd.fpcr, &user->fpsimd->fpcr, err);
fpcr              129 arch/arm64/kernel/signal32.c 		(fpsimd->fpcr & VFP_FPSCR_CTRL_MASK);
fpcr              172 arch/arm64/kernel/signal32.c 	fpsimd.fpcr = fpscr & VFP_FPSCR_CTRL_MASK;
fpcr               85 arch/arm64/kvm/guest.c 	case KVM_REG_ARM_CORE_REG(fp_regs.fpcr):
fpcr               22 arch/m68k/fpsp040/fpsp.h |		fmove.l	fpsr/fpcr/fpiar,USER_FPSR(a6)
fpcr               52 arch/m68k/fpsp040/fpsp.h |		fmove.l	USER_FPSR(a6),fpsr/fpcr/fpiar
fpcr               98 arch/m68k/include/asm/math-emu.h 	unsigned int fpcr;
fpcr               73 arch/powerpc/include/asm/spu_csa.h 	struct spu_reg128 fpcr;
fpcr              525 arch/powerpc/platforms/cell/spufs/file.c 				      &lscsa->fpcr, sizeof(lscsa->fpcr));
fpcr              551 arch/powerpc/platforms/cell/spufs/file.c 	if (*pos >= sizeof(lscsa->fpcr))
fpcr              558 arch/powerpc/platforms/cell/spufs/file.c 	size = simple_write_to_buffer(&lscsa->fpcr, sizeof(lscsa->fpcr), pos,
fpcr              118 arch/powerpc/platforms/cell/spufs/spu_restore.c 	vector unsigned int fpcr;
fpcr              124 arch/powerpc/platforms/cell/spufs/spu_restore.c 	offset = LSCSA_QW_OFFSET(fpcr);
fpcr              125 arch/powerpc/platforms/cell/spufs/spu_restore.c 	fpcr = regs_spill[offset].v;
fpcr              126 arch/powerpc/platforms/cell/spufs/spu_restore.c 	spu_mtfpscr(fpcr);
fpcr               76 arch/powerpc/platforms/cell/spufs/spu_save.c 	offset = LSCSA_QW_OFFSET(fpcr);