fp_gen_cntl       735 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 	uint32_t fp_gen_cntl = RREG32(RADEON_FP_GEN_CNTL);
fp_gen_cntl       740 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 		fp_gen_cntl |= (RADEON_FP_FPON | RADEON_FP_TMDS_EN);
fp_gen_cntl       745 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 		fp_gen_cntl &= ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN);
fp_gen_cntl       749 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 	WREG32(RADEON_FP_GEN_CNTL, fp_gen_cntl);
fp_gen_cntl       789 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 	uint32_t tmp, tmds_pll_cntl, tmds_transmitter_cntl, fp_gen_cntl;
fp_gen_cntl       835 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 	fp_gen_cntl = (RREG32(RADEON_FP_GEN_CNTL) |
fp_gen_cntl       839 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 	fp_gen_cntl &= ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN);
fp_gen_cntl       841 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 	fp_gen_cntl &= ~(RADEON_FP_RMX_HVSYNC_CONTROL_EN |
fp_gen_cntl       850 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 		fp_gen_cntl |= RADEON_FP_PANEL_FORMAT;  /* 24 bit format */
fp_gen_cntl       852 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 		fp_gen_cntl &= ~RADEON_FP_PANEL_FORMAT;/* 18 bit format */
fp_gen_cntl       856 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 			fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK;
fp_gen_cntl       858 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 				fp_gen_cntl |= R200_FP_SOURCE_SEL_RMX;
fp_gen_cntl       860 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 				fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC1;
fp_gen_cntl       862 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 			fp_gen_cntl &= ~RADEON_FP_SEL_CRTC2;
fp_gen_cntl       865 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 			fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK;
fp_gen_cntl       866 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 			fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC2;
fp_gen_cntl       868 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 			fp_gen_cntl |= RADEON_FP_SEL_CRTC2;
fp_gen_cntl       873 drivers/gpu/drm/radeon/radeon_legacy_encoders.c 	WREG32(RADEON_FP_GEN_CNTL, fp_gen_cntl);
fp_gen_cntl      1337 drivers/video/fbdev/aty/radeon_base.c 	save->fp_gen_cntl = INREG(FP_GEN_CNTL);
fp_gen_cntl      1513 drivers/video/fbdev/aty/radeon_base.c 		OUTREG(FP_GEN_CNTL, mode->fp_gen_cntl);
fp_gen_cntl      1885 drivers/video/fbdev/aty/radeon_base.c 		newmode->fp_gen_cntl = (rinfo->init_state.fp_gen_cntl & (u32)
fp_gen_cntl      1895 drivers/video/fbdev/aty/radeon_base.c 		newmode->fp_gen_cntl |= (FP_CRTC_DONT_SHADOW_VPAR |
fp_gen_cntl      1901 drivers/video/fbdev/aty/radeon_base.c 			newmode->fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK;
fp_gen_cntl      1903 drivers/video/fbdev/aty/radeon_base.c 				newmode->fp_gen_cntl |= R200_FP_SOURCE_SEL_RMX;
fp_gen_cntl      1905 drivers/video/fbdev/aty/radeon_base.c 				newmode->fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC1;
fp_gen_cntl      1907 drivers/video/fbdev/aty/radeon_base.c 			newmode->fp_gen_cntl |= FP_SEL_CRTC1;
fp_gen_cntl      1916 drivers/video/fbdev/aty/radeon_base.c 			newmode->fp_gen_cntl &= ~(FP_FPON | FP_TMDS_EN);
fp_gen_cntl      1919 drivers/video/fbdev/aty/radeon_base.c 			newmode->fp_gen_cntl |= (FP_FPON | FP_TMDS_EN);
fp_gen_cntl      1251 drivers/video/fbdev/aty/radeon_pm.c 		fp_gen_cntl, fp2_gen_cntl;
fp_gen_cntl      1257 drivers/video/fbdev/aty/radeon_pm.c 	fp_gen_cntl 	= INREG( FP_GEN_CNTL);
fp_gen_cntl      1426 drivers/video/fbdev/aty/radeon_pm.c 	OUTREG( FP_GEN_CNTL, 		fp_gen_cntl);
fp_gen_cntl       216 drivers/video/fbdev/aty/radeonfb.h 	u32		fp_gen_cntl;