fmc2 287 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller); fmc2 290 drivers/mtd/nand/raw/stm32_fmc2_nand.c u32 pcr = readl_relaxed(fmc2->io_base + FMC2_PCR); fmc2 311 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(pcr, fmc2->io_base + FMC2_PCR); fmc2 312 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(pmem, fmc2->io_base + FMC2_PMEM); fmc2 313 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(patt, fmc2->io_base + FMC2_PATT); fmc2 319 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller); fmc2 320 drivers/mtd/nand/raw/stm32_fmc2_nand.c u32 pcr = readl_relaxed(fmc2->io_base + FMC2_PCR); fmc2 341 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(pcr, fmc2->io_base + FMC2_PCR); fmc2 347 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller); fmc2 352 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (nand->cs_used[chipnr] == fmc2->cs_sel) fmc2 355 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->cs_sel = nand->cs_used[chipnr]; fmc2 363 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (fmc2->dma_tx_ch && fmc2->dma_rx_ch) { fmc2 365 drivers/mtd/nand/raw/stm32_fmc2_nand.c dma_cfg.src_addr = fmc2->data_phys_addr[fmc2->cs_sel]; fmc2 366 drivers/mtd/nand/raw/stm32_fmc2_nand.c dma_cfg.dst_addr = fmc2->data_phys_addr[fmc2->cs_sel]; fmc2 372 drivers/mtd/nand/raw/stm32_fmc2_nand.c ret = dmaengine_slave_config(fmc2->dma_tx_ch, &dma_cfg); fmc2 374 drivers/mtd/nand/raw/stm32_fmc2_nand.c dev_err(fmc2->dev, "tx DMA engine slave config failed\n"); fmc2 378 drivers/mtd/nand/raw/stm32_fmc2_nand.c ret = dmaengine_slave_config(fmc2->dma_rx_ch, &dma_cfg); fmc2 380 drivers/mtd/nand/raw/stm32_fmc2_nand.c dev_err(fmc2->dev, "rx DMA engine slave config failed\n"); fmc2 385 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (fmc2->dma_ecc_ch) { fmc2 391 drivers/mtd/nand/raw/stm32_fmc2_nand.c dma_cfg.src_addr = fmc2->io_phys_addr; fmc2 396 drivers/mtd/nand/raw/stm32_fmc2_nand.c ret = dmaengine_slave_config(fmc2->dma_ecc_ch, &dma_cfg); fmc2 398 drivers/mtd/nand/raw/stm32_fmc2_nand.c dev_err(fmc2->dev, "ECC DMA engine slave config failed\n"); fmc2 403 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->dma_ecc_len = chip->ecc.strength == FMC2_ECC_HAM ? fmc2 411 drivers/mtd/nand/raw/stm32_fmc2_nand.c static void stm32_fmc2_set_buswidth_16(struct stm32_fmc2_nfc *fmc2, bool set) fmc2 413 drivers/mtd/nand/raw/stm32_fmc2_nand.c u32 pcr = readl_relaxed(fmc2->io_base + FMC2_PCR); fmc2 418 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(pcr, fmc2->io_base + FMC2_PCR); fmc2 422 drivers/mtd/nand/raw/stm32_fmc2_nand.c static void stm32_fmc2_set_ecc(struct stm32_fmc2_nfc *fmc2, bool enable) fmc2 424 drivers/mtd/nand/raw/stm32_fmc2_nand.c u32 pcr = readl(fmc2->io_base + FMC2_PCR); fmc2 429 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel(pcr, fmc2->io_base + FMC2_PCR); fmc2 433 drivers/mtd/nand/raw/stm32_fmc2_nand.c static inline void stm32_fmc2_enable_seq_irq(struct stm32_fmc2_nfc *fmc2) fmc2 435 drivers/mtd/nand/raw/stm32_fmc2_nand.c u32 csqier = readl_relaxed(fmc2->io_base + FMC2_CSQIER); fmc2 439 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->irq_state = FMC2_IRQ_SEQ; fmc2 441 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(csqier, fmc2->io_base + FMC2_CSQIER); fmc2 445 drivers/mtd/nand/raw/stm32_fmc2_nand.c static inline void stm32_fmc2_disable_seq_irq(struct stm32_fmc2_nfc *fmc2) fmc2 447 drivers/mtd/nand/raw/stm32_fmc2_nand.c u32 csqier = readl_relaxed(fmc2->io_base + FMC2_CSQIER); fmc2 451 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(csqier, fmc2->io_base + FMC2_CSQIER); fmc2 453 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->irq_state = FMC2_IRQ_UNKNOWN; fmc2 457 drivers/mtd/nand/raw/stm32_fmc2_nand.c static inline void stm32_fmc2_clear_seq_irq(struct stm32_fmc2_nfc *fmc2) fmc2 459 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(FMC2_CSQICR_CLEAR_IRQ, fmc2->io_base + FMC2_CSQICR); fmc2 463 drivers/mtd/nand/raw/stm32_fmc2_nand.c static inline void stm32_fmc2_enable_bch_irq(struct stm32_fmc2_nfc *fmc2, fmc2 466 drivers/mtd/nand/raw/stm32_fmc2_nand.c u32 bchier = readl_relaxed(fmc2->io_base + FMC2_BCHIER); fmc2 473 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->irq_state = FMC2_IRQ_BCH; fmc2 475 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(bchier, fmc2->io_base + FMC2_BCHIER); fmc2 479 drivers/mtd/nand/raw/stm32_fmc2_nand.c static inline void stm32_fmc2_disable_bch_irq(struct stm32_fmc2_nfc *fmc2) fmc2 481 drivers/mtd/nand/raw/stm32_fmc2_nand.c u32 bchier = readl_relaxed(fmc2->io_base + FMC2_BCHIER); fmc2 486 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(bchier, fmc2->io_base + FMC2_BCHIER); fmc2 488 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->irq_state = FMC2_IRQ_UNKNOWN; fmc2 492 drivers/mtd/nand/raw/stm32_fmc2_nand.c static inline void stm32_fmc2_clear_bch_irq(struct stm32_fmc2_nfc *fmc2) fmc2 494 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(FMC2_BCHICR_CLEAR_IRQ, fmc2->io_base + FMC2_BCHICR); fmc2 503 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller); fmc2 505 drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_set_ecc(fmc2, false); fmc2 508 drivers/mtd/nand/raw/stm32_fmc2_nand.c u32 pcr = readl_relaxed(fmc2->io_base + FMC2_PCR); fmc2 514 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(pcr, fmc2->io_base + FMC2_PCR); fmc2 516 drivers/mtd/nand/raw/stm32_fmc2_nand.c reinit_completion(&fmc2->complete); fmc2 517 drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_clear_bch_irq(fmc2); fmc2 518 drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_enable_bch_irq(fmc2, mode); fmc2 521 drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_set_ecc(fmc2, true); fmc2 539 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller); fmc2 543 drivers/mtd/nand/raw/stm32_fmc2_nand.c ret = readl_relaxed_poll_timeout(fmc2->io_base + FMC2_SR, fmc2 547 drivers/mtd/nand/raw/stm32_fmc2_nand.c dev_err(fmc2->dev, "ham timeout\n"); fmc2 551 drivers/mtd/nand/raw/stm32_fmc2_nand.c heccr = readl_relaxed(fmc2->io_base + FMC2_HECCR); fmc2 556 drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_set_ecc(fmc2, false); fmc2 621 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller); fmc2 625 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (!wait_for_completion_timeout(&fmc2->complete, fmc2 627 drivers/mtd/nand/raw/stm32_fmc2_nand.c dev_err(fmc2->dev, "bch timeout\n"); fmc2 628 drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_disable_bch_irq(fmc2); fmc2 633 drivers/mtd/nand/raw/stm32_fmc2_nand.c bchpbr = readl_relaxed(fmc2->io_base + FMC2_BCHPBR1); fmc2 639 drivers/mtd/nand/raw/stm32_fmc2_nand.c bchpbr = readl_relaxed(fmc2->io_base + FMC2_BCHPBR2); fmc2 647 drivers/mtd/nand/raw/stm32_fmc2_nand.c bchpbr = readl_relaxed(fmc2->io_base + FMC2_BCHPBR3); fmc2 653 drivers/mtd/nand/raw/stm32_fmc2_nand.c bchpbr = readl_relaxed(fmc2->io_base + FMC2_BCHPBR4); fmc2 658 drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_set_ecc(fmc2, false); fmc2 706 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller); fmc2 710 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (!wait_for_completion_timeout(&fmc2->complete, fmc2 712 drivers/mtd/nand/raw/stm32_fmc2_nand.c dev_err(fmc2->dev, "bch timeout\n"); fmc2 713 drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_disable_bch_irq(fmc2); fmc2 717 drivers/mtd/nand/raw/stm32_fmc2_nand.c ecc_sta[0] = readl_relaxed(fmc2->io_base + FMC2_BCHDSR0); fmc2 718 drivers/mtd/nand/raw/stm32_fmc2_nand.c ecc_sta[1] = readl_relaxed(fmc2->io_base + FMC2_BCHDSR1); fmc2 719 drivers/mtd/nand/raw/stm32_fmc2_nand.c ecc_sta[2] = readl_relaxed(fmc2->io_base + FMC2_BCHDSR2); fmc2 720 drivers/mtd/nand/raw/stm32_fmc2_nand.c ecc_sta[3] = readl_relaxed(fmc2->io_base + FMC2_BCHDSR3); fmc2 721 drivers/mtd/nand/raw/stm32_fmc2_nand.c ecc_sta[4] = readl_relaxed(fmc2->io_base + FMC2_BCHDSR4); fmc2 724 drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_set_ecc(fmc2, false); fmc2 795 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller); fmc2 800 drivers/mtd/nand/raw/stm32_fmc2_nand.c u32 pcr = readl_relaxed(fmc2->io_base + FMC2_PCR); fmc2 806 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(pcr, fmc2->io_base + FMC2_PCR); fmc2 868 drivers/mtd/nand/raw/stm32_fmc2_nand.c csqar2 = FMC2_CSQCAR2_NANDCEN(fmc2->cs_sel); fmc2 880 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(csqcfgr1, fmc2->io_base + FMC2_CSQCFGR1); fmc2 881 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(csqcfgr2, fmc2->io_base + FMC2_CSQCFGR2); fmc2 882 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(csqcfgr3, fmc2->io_base + FMC2_CSQCFGR3); fmc2 883 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(csqar1, fmc2->io_base + FMC2_CSQAR1); fmc2 884 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(csqar2, fmc2->io_base + FMC2_CSQAR2); fmc2 896 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller); fmc2 899 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct dma_chan *dma_ch = fmc2->dma_rx_ch; fmc2 902 drivers/mtd/nand/raw/stm32_fmc2_nand.c u32 csqcr = readl_relaxed(fmc2->io_base + FMC2_CSQCR); fmc2 912 drivers/mtd/nand/raw/stm32_fmc2_nand.c dma_ch = fmc2->dma_tx_ch; fmc2 915 drivers/mtd/nand/raw/stm32_fmc2_nand.c for_each_sg(fmc2->dma_data_sg.sgl, sg, eccsteps, s) { fmc2 920 drivers/mtd/nand/raw/stm32_fmc2_nand.c ret = dma_map_sg(fmc2->dev, fmc2->dma_data_sg.sgl, fmc2 925 drivers/mtd/nand/raw/stm32_fmc2_nand.c desc_data = dmaengine_prep_slave_sg(dma_ch, fmc2->dma_data_sg.sgl, fmc2 933 drivers/mtd/nand/raw/stm32_fmc2_nand.c reinit_completion(&fmc2->dma_data_complete); fmc2 934 drivers/mtd/nand/raw/stm32_fmc2_nand.c reinit_completion(&fmc2->complete); fmc2 936 drivers/mtd/nand/raw/stm32_fmc2_nand.c desc_data->callback_param = &fmc2->dma_data_complete; fmc2 945 drivers/mtd/nand/raw/stm32_fmc2_nand.c p = fmc2->ecc_buf; fmc2 946 drivers/mtd/nand/raw/stm32_fmc2_nand.c for_each_sg(fmc2->dma_ecc_sg.sgl, sg, eccsteps, s) { fmc2 947 drivers/mtd/nand/raw/stm32_fmc2_nand.c sg_set_buf(sg, p, fmc2->dma_ecc_len); fmc2 948 drivers/mtd/nand/raw/stm32_fmc2_nand.c p += fmc2->dma_ecc_len; fmc2 951 drivers/mtd/nand/raw/stm32_fmc2_nand.c ret = dma_map_sg(fmc2->dev, fmc2->dma_ecc_sg.sgl, fmc2 956 drivers/mtd/nand/raw/stm32_fmc2_nand.c desc_ecc = dmaengine_prep_slave_sg(fmc2->dma_ecc_ch, fmc2 957 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->dma_ecc_sg.sgl, fmc2 965 drivers/mtd/nand/raw/stm32_fmc2_nand.c reinit_completion(&fmc2->dma_ecc_complete); fmc2 967 drivers/mtd/nand/raw/stm32_fmc2_nand.c desc_ecc->callback_param = &fmc2->dma_ecc_complete; fmc2 972 drivers/mtd/nand/raw/stm32_fmc2_nand.c dma_async_issue_pending(fmc2->dma_ecc_ch); fmc2 975 drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_clear_seq_irq(fmc2); fmc2 976 drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_enable_seq_irq(fmc2); fmc2 980 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(csqcr, fmc2->io_base + FMC2_CSQCR); fmc2 983 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (!wait_for_completion_timeout(&fmc2->complete, fmc2 985 drivers/mtd/nand/raw/stm32_fmc2_nand.c dev_err(fmc2->dev, "seq timeout\n"); fmc2 986 drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_disable_seq_irq(fmc2); fmc2 989 drivers/mtd/nand/raw/stm32_fmc2_nand.c dmaengine_terminate_all(fmc2->dma_ecc_ch); fmc2 995 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (!wait_for_completion_timeout(&fmc2->dma_data_complete, fmc2 997 drivers/mtd/nand/raw/stm32_fmc2_nand.c dev_err(fmc2->dev, "data DMA timeout\n"); fmc2 1004 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (!wait_for_completion_timeout(&fmc2->dma_ecc_complete, fmc2 1006 drivers/mtd/nand/raw/stm32_fmc2_nand.c dev_err(fmc2->dev, "ECC DMA timeout\n"); fmc2 1007 drivers/mtd/nand/raw/stm32_fmc2_nand.c dmaengine_terminate_all(fmc2->dma_ecc_ch); fmc2 1014 drivers/mtd/nand/raw/stm32_fmc2_nand.c dma_unmap_sg(fmc2->dev, fmc2->dma_ecc_sg.sgl, fmc2 1018 drivers/mtd/nand/raw/stm32_fmc2_nand.c dma_unmap_sg(fmc2->dev, fmc2->dma_data_sg.sgl, eccsteps, dma_data_dir); fmc2 1081 drivers/mtd/nand/raw/stm32_fmc2_nand.c static inline u16 stm32_fmc2_get_mapping_status(struct stm32_fmc2_nfc *fmc2) fmc2 1083 drivers/mtd/nand/raw/stm32_fmc2_nand.c u32 csqemsr = readl_relaxed(fmc2->io_base + FMC2_CSQEMSR); fmc2 1092 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller); fmc2 1097 drivers/mtd/nand/raw/stm32_fmc2_nand.c u32 *ecc_sta = (u32 *)fmc2->ecc_buf; fmc2 1098 drivers/mtd/nand/raw/stm32_fmc2_nand.c u16 sta_map = stm32_fmc2_get_mapping_status(fmc2); fmc2 1150 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller); fmc2 1169 drivers/mtd/nand/raw/stm32_fmc2_nand.c sta_map = stm32_fmc2_get_mapping_status(fmc2); fmc2 1226 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = (struct stm32_fmc2_nfc *)dev_id; fmc2 1228 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (fmc2->irq_state == FMC2_IRQ_SEQ) fmc2 1230 drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_disable_seq_irq(fmc2); fmc2 1231 drivers/mtd/nand/raw/stm32_fmc2_nand.c else if (fmc2->irq_state == FMC2_IRQ_BCH) fmc2 1233 drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_disable_bch_irq(fmc2); fmc2 1235 drivers/mtd/nand/raw/stm32_fmc2_nand.c complete(&fmc2->complete); fmc2 1243 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller); fmc2 1244 drivers/mtd/nand/raw/stm32_fmc2_nand.c void __iomem *io_addr_r = fmc2->data_base[fmc2->cs_sel]; fmc2 1248 drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_set_buswidth_16(fmc2, false); fmc2 1284 drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_set_buswidth_16(fmc2, true); fmc2 1290 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller); fmc2 1291 drivers/mtd/nand/raw/stm32_fmc2_nand.c void __iomem *io_addr_w = fmc2->data_base[fmc2->cs_sel]; fmc2 1295 drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_set_buswidth_16(fmc2, false); fmc2 1331 drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_set_buswidth_16(fmc2, true); fmc2 1336 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller); fmc2 1341 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (readl_relaxed_poll_timeout_atomic(fmc2->io_base + FMC2_SR, sr, fmc2 1344 drivers/mtd/nand/raw/stm32_fmc2_nand.c dev_warn(fmc2->dev, "Waitrdy timeout\n"); fmc2 1351 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(FMC2_ICR_CIHLF, fmc2->io_base + FMC2_ICR); fmc2 1354 drivers/mtd/nand/raw/stm32_fmc2_nand.c return readl_relaxed_poll_timeout_atomic(fmc2->io_base + FMC2_ISR, fmc2 1363 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller); fmc2 1381 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->cmd_base[fmc2->cs_sel]); fmc2 1387 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->addr_base[fmc2->cs_sel]); fmc2 1413 drivers/mtd/nand/raw/stm32_fmc2_nand.c static void stm32_fmc2_init(struct stm32_fmc2_nfc *fmc2) fmc2 1415 drivers/mtd/nand/raw/stm32_fmc2_nand.c u32 pcr = readl_relaxed(fmc2->io_base + FMC2_PCR); fmc2 1416 drivers/mtd/nand/raw/stm32_fmc2_nand.c u32 bcr1 = readl_relaxed(fmc2->io_base + FMC2_BCR1); fmc2 1419 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->cs_sel = -1; fmc2 1449 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(bcr1, fmc2->io_base + FMC2_BCR1); fmc2 1450 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(pcr, fmc2->io_base + FMC2_PCR); fmc2 1451 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(FMC2_PMEM_DEFAULT, fmc2->io_base + FMC2_PMEM); fmc2 1452 drivers/mtd/nand/raw/stm32_fmc2_nand.c writel_relaxed(FMC2_PATT_DEFAULT, fmc2->io_base + FMC2_PATT); fmc2 1459 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller); fmc2 1462 drivers/mtd/nand/raw/stm32_fmc2_nand.c unsigned long hclk = clk_get_rate(fmc2->clk); fmc2 1607 drivers/mtd/nand/raw/stm32_fmc2_nand.c static int stm32_fmc2_dma_setup(struct stm32_fmc2_nfc *fmc2) fmc2 1611 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->dma_tx_ch = dma_request_slave_channel(fmc2->dev, "tx"); fmc2 1612 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->dma_rx_ch = dma_request_slave_channel(fmc2->dev, "rx"); fmc2 1613 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->dma_ecc_ch = dma_request_slave_channel(fmc2->dev, "ecc"); fmc2 1615 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (!fmc2->dma_tx_ch || !fmc2->dma_rx_ch || !fmc2->dma_ecc_ch) { fmc2 1616 drivers/mtd/nand/raw/stm32_fmc2_nand.c dev_warn(fmc2->dev, "DMAs not defined in the device tree, polling mode is used\n"); fmc2 1620 drivers/mtd/nand/raw/stm32_fmc2_nand.c ret = sg_alloc_table(&fmc2->dma_ecc_sg, FMC2_MAX_SG, GFP_KERNEL); fmc2 1625 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->ecc_buf = devm_kzalloc(fmc2->dev, FMC2_MAX_ECC_BUF_LEN, fmc2 1627 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (!fmc2->ecc_buf) fmc2 1630 drivers/mtd/nand/raw/stm32_fmc2_nand.c ret = sg_alloc_table(&fmc2->dma_data_sg, FMC2_MAX_SG, GFP_KERNEL); fmc2 1634 drivers/mtd/nand/raw/stm32_fmc2_nand.c init_completion(&fmc2->dma_data_complete); fmc2 1635 drivers/mtd/nand/raw/stm32_fmc2_nand.c init_completion(&fmc2->dma_ecc_complete); fmc2 1643 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller); fmc2 1649 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (fmc2->dma_tx_ch && fmc2->dma_rx_ch && fmc2->dma_ecc_ch) { fmc2 1739 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = to_stm32_nfc(chip->controller); fmc2 1751 drivers/mtd/nand/raw/stm32_fmc2_nand.c dev_err(fmc2->dev, "nand_ecc_mode is not well defined in the DT\n"); fmc2 1758 drivers/mtd/nand/raw/stm32_fmc2_nand.c dev_err(fmc2->dev, "no valid ECC settings set\n"); fmc2 1763 drivers/mtd/nand/raw/stm32_fmc2_nand.c dev_err(fmc2->dev, "nand page size is not supported\n"); fmc2 1778 drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_set_buswidth_16(fmc2, true); fmc2 1790 drivers/mtd/nand/raw/stm32_fmc2_nand.c static int stm32_fmc2_parse_child(struct stm32_fmc2_nfc *fmc2, fmc2 1793 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nand *nand = &fmc2->nand; fmc2 1802 drivers/mtd/nand/raw/stm32_fmc2_nand.c dev_err(fmc2->dev, "invalid reg property size\n"); fmc2 1809 drivers/mtd/nand/raw/stm32_fmc2_nand.c dev_err(fmc2->dev, "could not retrieve reg property: %d\n", fmc2 1815 drivers/mtd/nand/raw/stm32_fmc2_nand.c dev_err(fmc2->dev, "invalid reg value: %d\n", cs); fmc2 1819 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (fmc2->cs_assigned & BIT(cs)) { fmc2 1820 drivers/mtd/nand/raw/stm32_fmc2_nand.c dev_err(fmc2->dev, "cs already assigned: %d\n", cs); fmc2 1824 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->cs_assigned |= BIT(cs); fmc2 1833 drivers/mtd/nand/raw/stm32_fmc2_nand.c static int stm32_fmc2_parse_dt(struct stm32_fmc2_nfc *fmc2) fmc2 1835 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct device_node *dn = fmc2->dev->of_node; fmc2 1841 drivers/mtd/nand/raw/stm32_fmc2_nand.c dev_err(fmc2->dev, "NAND chip not defined\n"); fmc2 1846 drivers/mtd/nand/raw/stm32_fmc2_nand.c dev_err(fmc2->dev, "too many NAND chips defined\n"); fmc2 1851 drivers/mtd/nand/raw/stm32_fmc2_nand.c ret = stm32_fmc2_parse_child(fmc2, child); fmc2 1865 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2; fmc2 1872 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2 = devm_kzalloc(dev, sizeof(*fmc2), GFP_KERNEL); fmc2 1873 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (!fmc2) fmc2 1876 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->dev = dev; fmc2 1877 drivers/mtd/nand/raw/stm32_fmc2_nand.c nand_controller_init(&fmc2->base); fmc2 1878 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->base.ops = &stm32_fmc2_nand_controller_ops; fmc2 1880 drivers/mtd/nand/raw/stm32_fmc2_nand.c ret = stm32_fmc2_parse_dt(fmc2); fmc2 1885 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->io_base = devm_ioremap_resource(dev, res); fmc2 1886 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (IS_ERR(fmc2->io_base)) fmc2 1887 drivers/mtd/nand/raw/stm32_fmc2_nand.c return PTR_ERR(fmc2->io_base); fmc2 1889 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->io_phys_addr = res->start; fmc2 1893 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (!(fmc2->cs_assigned & BIT(chip_cs))) fmc2 1897 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->data_base[chip_cs] = devm_ioremap_resource(dev, res); fmc2 1898 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (IS_ERR(fmc2->data_base[chip_cs])) fmc2 1899 drivers/mtd/nand/raw/stm32_fmc2_nand.c return PTR_ERR(fmc2->data_base[chip_cs]); fmc2 1901 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->data_phys_addr[chip_cs] = res->start; fmc2 1905 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->cmd_base[chip_cs] = devm_ioremap_resource(dev, res); fmc2 1906 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (IS_ERR(fmc2->cmd_base[chip_cs])) fmc2 1907 drivers/mtd/nand/raw/stm32_fmc2_nand.c return PTR_ERR(fmc2->cmd_base[chip_cs]); fmc2 1911 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->addr_base[chip_cs] = devm_ioremap_resource(dev, res); fmc2 1912 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (IS_ERR(fmc2->addr_base[chip_cs])) fmc2 1913 drivers/mtd/nand/raw/stm32_fmc2_nand.c return PTR_ERR(fmc2->addr_base[chip_cs]); fmc2 1924 drivers/mtd/nand/raw/stm32_fmc2_nand.c dev_name(dev), fmc2); fmc2 1930 drivers/mtd/nand/raw/stm32_fmc2_nand.c init_completion(&fmc2->complete); fmc2 1932 drivers/mtd/nand/raw/stm32_fmc2_nand.c fmc2->clk = devm_clk_get(dev, NULL); fmc2 1933 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (IS_ERR(fmc2->clk)) fmc2 1934 drivers/mtd/nand/raw/stm32_fmc2_nand.c return PTR_ERR(fmc2->clk); fmc2 1936 drivers/mtd/nand/raw/stm32_fmc2_nand.c ret = clk_prepare_enable(fmc2->clk); fmc2 1949 drivers/mtd/nand/raw/stm32_fmc2_nand.c ret = stm32_fmc2_dma_setup(fmc2); fmc2 1954 drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_init(fmc2); fmc2 1956 drivers/mtd/nand/raw/stm32_fmc2_nand.c nand = &fmc2->nand; fmc2 1961 drivers/mtd/nand/raw/stm32_fmc2_nand.c chip->controller = &fmc2->base; fmc2 1979 drivers/mtd/nand/raw/stm32_fmc2_nand.c platform_set_drvdata(pdev, fmc2); fmc2 1987 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (fmc2->dma_ecc_ch) fmc2 1988 drivers/mtd/nand/raw/stm32_fmc2_nand.c dma_release_channel(fmc2->dma_ecc_ch); fmc2 1989 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (fmc2->dma_tx_ch) fmc2 1990 drivers/mtd/nand/raw/stm32_fmc2_nand.c dma_release_channel(fmc2->dma_tx_ch); fmc2 1991 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (fmc2->dma_rx_ch) fmc2 1992 drivers/mtd/nand/raw/stm32_fmc2_nand.c dma_release_channel(fmc2->dma_rx_ch); fmc2 1994 drivers/mtd/nand/raw/stm32_fmc2_nand.c sg_free_table(&fmc2->dma_data_sg); fmc2 1995 drivers/mtd/nand/raw/stm32_fmc2_nand.c sg_free_table(&fmc2->dma_ecc_sg); fmc2 1997 drivers/mtd/nand/raw/stm32_fmc2_nand.c clk_disable_unprepare(fmc2->clk); fmc2 2004 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = platform_get_drvdata(pdev); fmc2 2005 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nand *nand = &fmc2->nand; fmc2 2009 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (fmc2->dma_ecc_ch) fmc2 2010 drivers/mtd/nand/raw/stm32_fmc2_nand.c dma_release_channel(fmc2->dma_ecc_ch); fmc2 2011 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (fmc2->dma_tx_ch) fmc2 2012 drivers/mtd/nand/raw/stm32_fmc2_nand.c dma_release_channel(fmc2->dma_tx_ch); fmc2 2013 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (fmc2->dma_rx_ch) fmc2 2014 drivers/mtd/nand/raw/stm32_fmc2_nand.c dma_release_channel(fmc2->dma_rx_ch); fmc2 2016 drivers/mtd/nand/raw/stm32_fmc2_nand.c sg_free_table(&fmc2->dma_data_sg); fmc2 2017 drivers/mtd/nand/raw/stm32_fmc2_nand.c sg_free_table(&fmc2->dma_ecc_sg); fmc2 2019 drivers/mtd/nand/raw/stm32_fmc2_nand.c clk_disable_unprepare(fmc2->clk); fmc2 2026 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = dev_get_drvdata(dev); fmc2 2028 drivers/mtd/nand/raw/stm32_fmc2_nand.c clk_disable_unprepare(fmc2->clk); fmc2 2037 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nfc *fmc2 = dev_get_drvdata(dev); fmc2 2038 drivers/mtd/nand/raw/stm32_fmc2_nand.c struct stm32_fmc2_nand *nand = &fmc2->nand; fmc2 2043 drivers/mtd/nand/raw/stm32_fmc2_nand.c ret = clk_prepare_enable(fmc2->clk); fmc2 2049 drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_init(fmc2); fmc2 2052 drivers/mtd/nand/raw/stm32_fmc2_nand.c if (!(fmc2->cs_assigned & BIT(chip_cs)))