flip_immediate   5803 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 		bundle->flip_addrs[planes_count].flip_immediate =
flip_immediate    506 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 			pipe->plane_state->flip_immediate);
flip_immediate   1687 drivers/gpu/drm/amd/display/dc/core/dc.c 		surface->flip_immediate =
flip_immediate   1688 drivers/gpu/drm/amd/display/dc/core/dc.c 			srf_update->flip_addr->flip_immediate;
flip_immediate   2050 drivers/gpu/drm/amd/display/dc/core/dc.c 					!plane_state->flip_immediate &&
flip_immediate   2121 drivers/gpu/drm/amd/display/dc/core/dc.c 							plane_state->flip_immediate);
flip_immediate     82 drivers/gpu/drm/amd/display/dc/core/dc_debug.c 				plane_state->flip_immediate,
flip_immediate    198 drivers/gpu/drm/amd/display/dc/core/dc_debug.c 					update->flip_addr->flip_immediate);
flip_immediate    755 drivers/gpu/drm/amd/display/dc/dc.h 	bool flip_immediate;
flip_immediate    851 drivers/gpu/drm/amd/display/dc/dc.h 	bool flip_immediate;
flip_immediate    693 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c 	bool flip_immediate)
flip_immediate    701 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c 		GRPH_SURFACE_UPDATE_H_RETRACE_EN, flip_immediate ? 1 : 0);
flip_immediate    724 drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c 	if (flip_immediate)
flip_immediate   2211 drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c 			plane_state->flip_immediate);
flip_immediate    489 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c 	bool flip_immediate)
flip_immediate    493 drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c 	set_flip_control(mem_input110, flip_immediate);
flip_immediate    342 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 	bool flip_immediate)
flip_immediate    349 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 			SURFACE_FLIP_TYPE, flip_immediate);
flip_immediate    707 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h 	bool flip_immediate);
flip_immediate   1378 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 			plane_state->flip_immediate);
flip_immediate   1382 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 	if (plane_state->flip_immediate)
flip_immediate    680 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c 	bool flip_immediate)
flip_immediate    686 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c 			SURFACE_FLIP_TYPE, flip_immediate);
flip_immediate    287 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h 	bool flip_immediate);
flip_immediate   1094 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 	bool flip_immediate = false;
flip_immediate   1103 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 		flip_immediate = pipe->plane_state->flip_immediate;
flip_immediate   1105 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 	if (flip_immediate && lock) {
flip_immediate   1128 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 		if ((flip_immediate && pipe->stream_res.gsl_group == 0) ||
flip_immediate   1129 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 		    (!flip_immediate && pipe->stream_res.gsl_group > 0))
flip_immediate   1130 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 			dcn20_setup_gsl_group_as_lock(dc, pipe, flip_immediate);
flip_immediate   1571 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 			plane_state->flip_immediate);
flip_immediate   1575 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 	if (plane_state->flip_immediate)
flip_immediate   1913 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 		bool flip_immediate)
flip_immediate   1917 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 				pipe_ctx->plane_res.hubp, flip_immediate);
flip_immediate   2074 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c 			pipes[pipe_cnt].pipe.src.immediate_flip = pln->flip_immediate;
flip_immediate     92 drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h 		bool flip_immediate);
flip_immediate    136 drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h 		bool flip_immediate);
flip_immediate    123 drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h 		bool flip_immediate);