flcmncr_base      540 drivers/mtd/nand/raw/sh_flctl.c 	uint32_t flcmncr_val = flctl->flcmncr_base & ~SEL_16BIT;
flcmncr_base      922 drivers/mtd/nand/raw/sh_flctl.c 		flctl->flcmncr_base &= ~CE0_ENABLE;
flcmncr_base      925 drivers/mtd/nand/raw/sh_flctl.c 		writel(flctl->flcmncr_base, FLCMNCR(flctl));
flcmncr_base      935 drivers/mtd/nand/raw/sh_flctl.c 		flctl->flcmncr_base |= CE0_ENABLE;
flcmncr_base      996 drivers/mtd/nand/raw/sh_flctl.c 		flctl->flcmncr_base |= SEL_16BIT;
flcmncr_base     1045 drivers/mtd/nand/raw/sh_flctl.c 		flctl->flcmncr_base |= _4ECCEN;
flcmncr_base     1162 drivers/mtd/nand/raw/sh_flctl.c 	flctl->flcmncr_base = pdata->flcmncr_val;
flcmncr_base      149 include/linux/mtd/sh_flctl.h 	uint32_t flcmncr_base;	/* base value of FLCMNCR */