fiu 221 drivers/spi/spi-npcm-fiu.c struct npcm_fiu_spi *fiu; fiu 245 drivers/spi/spi-npcm-fiu.c static void npcm_fiu_set_drd(struct npcm_fiu_spi *fiu, fiu 248 drivers/spi/spi-npcm-fiu.c regmap_update_bits(fiu->regmap, NPCM_FIU_DRD_CFG, fiu 252 drivers/spi/spi-npcm-fiu.c fiu->drd_op.addr.buswidth = op->addr.buswidth; fiu 253 drivers/spi/spi-npcm-fiu.c regmap_update_bits(fiu->regmap, NPCM_FIU_DRD_CFG, fiu 257 drivers/spi/spi-npcm-fiu.c fiu->drd_op.dummy.nbytes = op->dummy.nbytes; fiu 258 drivers/spi/spi-npcm-fiu.c regmap_update_bits(fiu->regmap, NPCM_FIU_DRD_CFG, fiu 260 drivers/spi/spi-npcm-fiu.c fiu->drd_op.cmd.opcode = op->cmd.opcode; fiu 261 drivers/spi/spi-npcm-fiu.c regmap_update_bits(fiu->regmap, NPCM_FIU_DRD_CFG, fiu 264 drivers/spi/spi-npcm-fiu.c fiu->drd_op.addr.nbytes = op->addr.nbytes; fiu 270 drivers/spi/spi-npcm-fiu.c struct npcm_fiu_spi *fiu = fiu 272 drivers/spi/spi-npcm-fiu.c struct npcm_fiu_chip *chip = &fiu->chip[desc->mem->spi->chip_select]; fiu 278 drivers/spi/spi-npcm-fiu.c if (fiu->spix_mode) { fiu 282 drivers/spi/spi-npcm-fiu.c if (desc->info.op_tmpl.addr.buswidth != fiu->drd_op.addr.buswidth || fiu 283 drivers/spi/spi-npcm-fiu.c desc->info.op_tmpl.dummy.nbytes != fiu->drd_op.dummy.nbytes || fiu 284 drivers/spi/spi-npcm-fiu.c desc->info.op_tmpl.cmd.opcode != fiu->drd_op.cmd.opcode || fiu 285 drivers/spi/spi-npcm-fiu.c desc->info.op_tmpl.addr.nbytes != fiu->drd_op.addr.nbytes) fiu 286 drivers/spi/spi-npcm-fiu.c npcm_fiu_set_drd(fiu, &desc->info.op_tmpl); fiu 297 drivers/spi/spi-npcm-fiu.c struct npcm_fiu_spi *fiu = fiu 299 drivers/spi/spi-npcm-fiu.c struct npcm_fiu_chip *chip = &fiu->chip[desc->mem->spi->chip_select]; fiu 305 drivers/spi/spi-npcm-fiu.c if (fiu->spix_mode) fiu 318 drivers/spi/spi-npcm-fiu.c struct npcm_fiu_spi *fiu = fiu 326 drivers/spi/spi-npcm-fiu.c regmap_update_bits(fiu->regmap, NPCM_FIU_UMA_CTS, fiu 330 drivers/spi/spi-npcm-fiu.c regmap_update_bits(fiu->regmap, NPCM_FIU_UMA_CMD, fiu 343 drivers/spi/spi-npcm-fiu.c regmap_write(fiu->regmap, NPCM_FIU_UMA_ADDR, addr); fiu 345 drivers/spi/spi-npcm-fiu.c regmap_write(fiu->regmap, NPCM_FIU_UMA_ADDR, 0x0); fiu 349 drivers/spi/spi-npcm-fiu.c regmap_write(fiu->regmap, NPCM_FIU_UMA_CFG, uma_cfg); fiu 350 drivers/spi/spi-npcm-fiu.c regmap_write_bits(fiu->regmap, NPCM_FIU_UMA_CTS, fiu 353 drivers/spi/spi-npcm-fiu.c ret = regmap_read_poll_timeout(fiu->regmap, NPCM_FIU_UMA_CTS, val, fiu 361 drivers/spi/spi-npcm-fiu.c regmap_read(fiu->regmap, NPCM_FIU_UMA_DR0 + (i * 4), fiu 373 drivers/spi/spi-npcm-fiu.c struct npcm_fiu_spi *fiu = fiu 380 drivers/spi/spi-npcm-fiu.c regmap_update_bits(fiu->regmap, NPCM_FIU_UMA_CTS, fiu 385 drivers/spi/spi-npcm-fiu.c regmap_update_bits(fiu->regmap, NPCM_FIU_UMA_CMD, fiu 391 drivers/spi/spi-npcm-fiu.c regmap_write(fiu->regmap, NPCM_FIU_UMA_DW0 + (i * 4), fiu 402 drivers/spi/spi-npcm-fiu.c regmap_write(fiu->regmap, NPCM_FIU_UMA_ADDR, op->addr.val); fiu 404 drivers/spi/spi-npcm-fiu.c regmap_write(fiu->regmap, NPCM_FIU_UMA_ADDR, 0x0); fiu 408 drivers/spi/spi-npcm-fiu.c regmap_write(fiu->regmap, NPCM_FIU_UMA_CFG, uma_cfg); fiu 410 drivers/spi/spi-npcm-fiu.c regmap_write_bits(fiu->regmap, NPCM_FIU_UMA_CTS, fiu 414 drivers/spi/spi-npcm-fiu.c return regmap_read_poll_timeout(fiu->regmap, NPCM_FIU_UMA_CTS, val, fiu 422 drivers/spi/spi-npcm-fiu.c struct npcm_fiu_spi *fiu = fiu 433 drivers/spi/spi-npcm-fiu.c regmap_update_bits(fiu->regmap, NPCM_FIU_UMA_CTS, fiu 437 drivers/spi/spi-npcm-fiu.c regmap_update_bits(fiu->regmap, NPCM_FIU_UMA_CTS, fiu 462 drivers/spi/spi-npcm-fiu.c regmap_update_bits(fiu->regmap, NPCM_FIU_UMA_CTS, fiu 499 drivers/spi/spi-npcm-fiu.c static void npcm_fiux_set_direct_wr(struct npcm_fiu_spi *fiu) fiu 501 drivers/spi/spi-npcm-fiu.c regmap_write(fiu->regmap, NPCM_FIU_DWR_CFG, fiu 503 drivers/spi/spi-npcm-fiu.c regmap_update_bits(fiu->regmap, NPCM_FIU_DWR_CFG, fiu 506 drivers/spi/spi-npcm-fiu.c regmap_update_bits(fiu->regmap, NPCM_FIU_DWR_CFG, fiu 511 drivers/spi/spi-npcm-fiu.c static void npcm_fiux_set_direct_rd(struct npcm_fiu_spi *fiu) fiu 515 drivers/spi/spi-npcm-fiu.c regmap_write(fiu->regmap, NPCM_FIU_DRD_CFG, fiu 517 drivers/spi/spi-npcm-fiu.c regmap_update_bits(fiu->regmap, NPCM_FIU_DRD_CFG, fiu 520 drivers/spi/spi-npcm-fiu.c regmap_update_bits(fiu->regmap, NPCM_FIU_DRD_CFG, fiu 527 drivers/spi/spi-npcm-fiu.c struct npcm_fiu_spi *fiu = fiu 529 drivers/spi/spi-npcm-fiu.c struct npcm_fiu_chip *chip = &fiu->chip[mem->spi->chip_select]; fiu 533 drivers/spi/spi-npcm-fiu.c dev_dbg(fiu->dev, "cmd:%#x mode:%d.%d.%d.%d addr:%#llx len:%#x\n", fiu 538 drivers/spi/spi-npcm-fiu.c if (fiu->spix_mode || op->addr.nbytes > 4) fiu 541 drivers/spi/spi-npcm-fiu.c if (fiu->clkrate != chip->clkrate) { fiu 542 drivers/spi/spi-npcm-fiu.c ret = clk_set_rate(fiu->clk, chip->clkrate); fiu 544 drivers/spi/spi-npcm-fiu.c dev_warn(fiu->dev, "Failed setting %lu frequency, stay at %lu frequency\n", fiu 545 drivers/spi/spi-npcm-fiu.c chip->clkrate, fiu->clkrate); fiu 547 drivers/spi/spi-npcm-fiu.c fiu->clkrate = chip->clkrate; fiu 587 drivers/spi/spi-npcm-fiu.c struct npcm_fiu_spi *fiu = fiu 589 drivers/spi/spi-npcm-fiu.c struct npcm_fiu_chip *chip = &fiu->chip[desc->mem->spi->chip_select]; fiu 592 drivers/spi/spi-npcm-fiu.c if (!fiu->res_mem) { fiu 593 drivers/spi/spi-npcm-fiu.c dev_warn(fiu->dev, "Reserved memory not defined, direct read disabled\n"); fiu 598 drivers/spi/spi-npcm-fiu.c if (!fiu->spix_mode && fiu 606 drivers/spi/spi-npcm-fiu.c devm_ioremap_nocache(fiu->dev, (fiu->res_mem->start + fiu 607 drivers/spi/spi-npcm-fiu.c (fiu->info->max_map_size * fiu 611 drivers/spi/spi-npcm-fiu.c dev_warn(fiu->dev, "Error mapping memory region, direct read disabled\n"); fiu 617 drivers/spi/spi-npcm-fiu.c if (of_device_is_compatible(fiu->dev->of_node, "nuvoton,npcm750-fiu")) { fiu 621 drivers/spi/spi-npcm-fiu.c dev_warn(fiu->dev, "Didn't find nuvoton,npcm750-gcr, direct read disabled\n"); fiu 631 drivers/spi/spi-npcm-fiu.c if (!fiu->spix_mode) fiu 632 drivers/spi/spi-npcm-fiu.c npcm_fiu_set_drd(fiu, &desc->info.op_tmpl); fiu 634 drivers/spi/spi-npcm-fiu.c npcm_fiux_set_direct_rd(fiu); fiu 637 drivers/spi/spi-npcm-fiu.c npcm_fiux_set_direct_wr(fiu); fiu 646 drivers/spi/spi-npcm-fiu.c struct npcm_fiu_spi *fiu = spi_controller_get_devdata(ctrl); fiu 649 drivers/spi/spi-npcm-fiu.c chip = &fiu->chip[spi->chip_select]; fiu 650 drivers/spi/spi-npcm-fiu.c chip->fiu = fiu; fiu 654 drivers/spi/spi-npcm-fiu.c fiu->clkrate = clk_get_rate(fiu->clk); fiu 677 drivers/spi/spi-npcm-fiu.c struct npcm_fiu_spi *fiu; fiu 683 drivers/spi/spi-npcm-fiu.c ctrl = spi_alloc_master(dev, sizeof(*fiu)); fiu 687 drivers/spi/spi-npcm-fiu.c fiu = spi_controller_get_devdata(ctrl); fiu 702 drivers/spi/spi-npcm-fiu.c fiu->info = &fiu_data_match->npcm_fiu_data_info[id]; fiu 704 drivers/spi/spi-npcm-fiu.c platform_set_drvdata(pdev, fiu); fiu 705 drivers/spi/spi-npcm-fiu.c fiu->dev = dev; fiu 712 drivers/spi/spi-npcm-fiu.c fiu->regmap = devm_regmap_init_mmio(dev, regbase, fiu 714 drivers/spi/spi-npcm-fiu.c if (IS_ERR(fiu->regmap)) { fiu 716 drivers/spi/spi-npcm-fiu.c return PTR_ERR(fiu->regmap); fiu 719 drivers/spi/spi-npcm-fiu.c fiu->res_mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, fiu 721 drivers/spi/spi-npcm-fiu.c fiu->clk = devm_clk_get(dev, NULL); fiu 722 drivers/spi/spi-npcm-fiu.c if (IS_ERR(fiu->clk)) fiu 723 drivers/spi/spi-npcm-fiu.c return PTR_ERR(fiu->clk); fiu 725 drivers/spi/spi-npcm-fiu.c fiu->spix_mode = of_property_read_bool(dev->of_node, fiu 728 drivers/spi/spi-npcm-fiu.c platform_set_drvdata(pdev, fiu); fiu 729 drivers/spi/spi-npcm-fiu.c clk_prepare_enable(fiu->clk); fiu 736 drivers/spi/spi-npcm-fiu.c ctrl->num_chipselect = fiu->info->max_cs; fiu 748 drivers/spi/spi-npcm-fiu.c struct npcm_fiu_spi *fiu = platform_get_drvdata(pdev); fiu 750 drivers/spi/spi-npcm-fiu.c clk_disable_unprepare(fiu->clk);