filter_h 355 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c if (coeffs_v != xfm_dce->filter_v || coeffs_h != xfm_dce->filter_h) { filter_h 372 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c if (xfm_dce->filter_h == NULL) filter_h 387 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->filter_h = coeffs_h; filter_h 957 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c xfm_dce->filter_h = NULL; filter_h 476 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h const uint16_t *filter_h; filter_h 569 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c || coeffs_h != xfm_dce->filter_h filter_h 597 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c xfm_dce->filter_h = coeffs_h; filter_h 615 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c xfm_dce->filter_h = NULL; filter_h 209 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c dpp->filter_h = NULL; filter_h 1352 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h const uint16_t *filter_h; filter_h 310 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c const uint16_t *filter_h = NULL; filter_h 336 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c filter_h = dpp1_dscl_get_filter_coeffs_64p( filter_h 341 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c filter_updated = (filter_h && (filter_h != dpp->filter_h)) filter_h 356 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c if (!h_2tap_hardcode_coef_en && filter_h) { filter_h 359 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c SCL_COEF_LUMA_HORZ_FILTER, filter_h); filter_h 361 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c dpp->filter_h = filter_h; filter_h 634 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.h const uint16_t *filter_h; filter_h 734 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c const uint16_t *filter_h = NULL; filter_h 785 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c filter_h = wbscl_get_filter_coeffs_16p( filter_h 791 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb_scl.c WBSCL_COEF_LUMA_HORZ_FILTER, filter_h);