fifoch            378 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c gf100_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch,
fifoch            394 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c 	chan->vmm = nvkm_vmm_ref(fifoch->vmm);
fifoch            406 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c 	ret = nvkm_vmm_get(fifoch->vmm, 12, 0x1000, &chan->mmio_vma);
fifoch            410 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c 	ret = nvkm_memory_map(chan->mmio, 0, fifoch->vmm,
fifoch            423 drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c 		ret = nvkm_vmm_get(fifoch->vmm, 12,
fifoch           1184 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c nv04_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch,
fifoch           1195 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv04.c 	chan->chid = fifoch->chid;
fifoch           1002 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c nv10_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch,
fifoch           1014 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c 	chan->chid = fifoch->chid;
fifoch             75 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c nv20_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch,
fifoch             86 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv20.c 	chan->chid = fifoch->chid;
fifoch             21 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c nv25_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch,
fifoch             32 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv25.c 	chan->chid = fifoch->chid;
fifoch             21 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c nv2a_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch,
fifoch             32 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv2a.c 	chan->chid = fifoch->chid;
fifoch             22 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c nv30_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch,
fifoch             33 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv30.c 	chan->chid = fifoch->chid;
fifoch             21 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c nv34_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch,
fifoch             32 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv34.c 	chan->chid = fifoch->chid;
fifoch             21 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c nv35_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch,
fifoch             32 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv35.c 	chan->chid = fifoch->chid;
fifoch            148 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c nv40_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch,
fifoch            159 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv40.c 	chan->fifo = fifoch;
fifoch             89 drivers/gpu/drm/nouveau/nvkm/engine/gr/nv50.c nv50_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch,
fifoch             84 drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv31.c nv31_mpeg_chan_new(struct nvkm_fifo_chan *fifoch,
fifoch             97 drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv31.c 	chan->fifo = fifoch;
fifoch            103 drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv44.c nv44_mpeg_chan_new(struct nvkm_fifo_chan *fifoch,
fifoch            115 drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv44.c 	chan->fifo = fifoch;
fifoch             77 drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c nvkm_sw_cclass_get(struct nvkm_fifo_chan *fifoch,
fifoch             82 drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c 	return sw->func->chan_new(sw, fifoch, oclass, pobject);
fifoch            105 drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c gf100_sw_chan_new(struct nvkm_sw *sw, struct nvkm_fifo_chan *fifoch,
fifoch            117 drivers/gpu/drm/nouveau/nvkm/engine/sw/gf100.c 	ret = nvkm_sw_chan_ctor(&gf100_sw_chan, sw, fifoch, oclass,
fifoch            100 drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c nv50_sw_chan_new(struct nvkm_sw *sw, struct nvkm_fifo_chan *fifoch,
fifoch            111 drivers/gpu/drm/nouveau/nvkm/engine/sw/nv50.c 	ret = nvkm_sw_chan_ctor(&nv50_sw_chan, sw, fifoch, oclass, &chan->base);