fifo_ctrl          77 arch/powerpc/include/asm/mpc5121.h 	u32	fifo_ctrl;	/* LPC RX/TX FIFO Control Register */
fifo_ctrl         280 arch/powerpc/platforms/512x/mpc512x_lpbfifo.c 	out_be32(&lpbfifo.regs->fifo_ctrl, MPC512X_SCLPC_FIFO_CTRL(0x7));
fifo_ctrl         111 drivers/dma/tegra210-adma.c 	unsigned int fifo_ctrl;
fifo_ctrl         377 drivers/dma/tegra210-adma.c 	tdma_ch_write(tdc, ADMA_CH_FIFO_CTRL, ch_regs->fifo_ctrl);
fifo_ctrl         602 drivers/dma/tegra210-adma.c 	ch_regs->fifo_ctrl = cdata->ch_fifo_ctrl;
fifo_ctrl         734 drivers/dma/tegra210-adma.c 		ch_reg->fifo_ctrl = tdma_ch_read(tdc, ADMA_CH_FIFO_CTRL);
fifo_ctrl         771 drivers/dma/tegra210-adma.c 		tdma_ch_write(tdc, ADMA_CH_FIFO_CTRL, ch_reg->fifo_ctrl);
fifo_ctrl        2628 drivers/gpu/drm/radeon/evergreen.c 	unsigned fifo_ctrl;
fifo_ctrl        2658 drivers/gpu/drm/radeon/evergreen.c 	fifo_ctrl = RREG32(EVERGREEN_DP_STEER_FIFO + evergreen_dp_offsets[dig_fe]);
fifo_ctrl        2659 drivers/gpu/drm/radeon/evergreen.c 	fifo_ctrl |= EVERGREEN_DP_STEER_FIFO_RESET;
fifo_ctrl        2660 drivers/gpu/drm/radeon/evergreen.c 	WREG32(EVERGREEN_DP_STEER_FIFO + evergreen_dp_offsets[dig_fe], fifo_ctrl);
fifo_ctrl          35 drivers/media/dvb-frontends/dib3000.h 	int (*fifo_ctrl)(struct dvb_frontend *fe, int onoff);
fifo_ctrl         770 drivers/media/dvb-frontends/dib3000mb.c 	xfer_ops->fifo_ctrl = dib3000mb_fifo_control;
fifo_ctrl          26 drivers/media/usb/dvb-usb/dibusb-common.c 		if (st->ops.fifo_ctrl != NULL)
fifo_ctrl          27 drivers/media/usb/dvb-usb/dibusb-common.c 			if (st->ops.fifo_ctrl(adap->fe_adap[0].fe, onoff)) {