fieldbit           31 drivers/clk/mvebu/clk-corediv.c 	unsigned int fieldbit;
fieldbit           70 drivers/clk/mvebu/clk-corediv.c 	{ .mask = 0x3f, .offset = 8, .fieldbit = 1 }, /* NAND clock */
fieldbit           74 drivers/clk/mvebu/clk-corediv.c 	{ .mask = 0x0f, .offset = 6, .fieldbit = 27 }, /* NAND clock */
fieldbit           84 drivers/clk/mvebu/clk-corediv.c 	u32 enable_mask = BIT(desc->fieldbit) << soc_desc->enable_bit_offset;
fieldbit          100 drivers/clk/mvebu/clk-corediv.c 	reg |= (BIT(desc->fieldbit) << soc_desc->enable_bit_offset);
fieldbit          119 drivers/clk/mvebu/clk-corediv.c 	reg &= ~(BIT(desc->fieldbit) << soc_desc->enable_bit_offset);
fieldbit          173 drivers/clk/mvebu/clk-corediv.c 	reg = readl(corediv->reg) | BIT(desc->fieldbit);