field_value1 59 drivers/gpu/drm/amd/display/dc/dc_helper.c uint8_t shift1, uint32_t mask1, uint32_t field_value1, field_value1 67 drivers/gpu/drm/amd/display/dc/dc_helper.c field_value1, mask1, shift1); field_value1 82 drivers/gpu/drm/amd/display/dc/dc_helper.c uint8_t shift1, uint32_t mask1, uint32_t field_value1, field_value1 89 drivers/gpu/drm/amd/display/dc/dc_helper.c va_start(ap, field_value1); field_value1 92 drivers/gpu/drm/amd/display/dc/dc_helper.c field_value1, ap); field_value1 105 drivers/gpu/drm/amd/display/dc/dc_helper.c uint8_t shift1, uint32_t mask1, uint32_t field_value1, field_value1 111 drivers/gpu/drm/amd/display/dc/dc_helper.c va_start(ap, field_value1); field_value1 114 drivers/gpu/drm/amd/display/dc/dc_helper.c field_value1, ap); field_value1 152 drivers/gpu/drm/amd/display/dc/dc_helper.c uint8_t shift1, uint32_t mask1, uint32_t *field_value1, field_value1 156 drivers/gpu/drm/amd/display/dc/dc_helper.c *field_value1 = get_reg_field_value_ex(reg_val, mask1, shift1); field_value1 162 drivers/gpu/drm/amd/display/dc/dc_helper.c uint8_t shift1, uint32_t mask1, uint32_t *field_value1, field_value1 167 drivers/gpu/drm/amd/display/dc/dc_helper.c *field_value1 = get_reg_field_value_ex(reg_val, mask1, shift1); field_value1 174 drivers/gpu/drm/amd/display/dc/dc_helper.c uint8_t shift1, uint32_t mask1, uint32_t *field_value1, field_value1 180 drivers/gpu/drm/amd/display/dc/dc_helper.c *field_value1 = get_reg_field_value_ex(reg_val, mask1, shift1); field_value1 188 drivers/gpu/drm/amd/display/dc/dc_helper.c uint8_t shift1, uint32_t mask1, uint32_t *field_value1, field_value1 195 drivers/gpu/drm/amd/display/dc/dc_helper.c *field_value1 = get_reg_field_value_ex(reg_val, mask1, shift1); field_value1 204 drivers/gpu/drm/amd/display/dc/dc_helper.c uint8_t shift1, uint32_t mask1, uint32_t *field_value1, field_value1 212 drivers/gpu/drm/amd/display/dc/dc_helper.c *field_value1 = get_reg_field_value_ex(reg_val, mask1, shift1); field_value1 222 drivers/gpu/drm/amd/display/dc/dc_helper.c uint8_t shift1, uint32_t mask1, uint32_t *field_value1, field_value1 231 drivers/gpu/drm/amd/display/dc/dc_helper.c *field_value1 = get_reg_field_value_ex(reg_val, mask1, shift1); field_value1 242 drivers/gpu/drm/amd/display/dc/dc_helper.c uint8_t shift1, uint32_t mask1, uint32_t *field_value1, field_value1 252 drivers/gpu/drm/amd/display/dc/dc_helper.c *field_value1 = get_reg_field_value_ex(reg_val, mask1, shift1); field_value1 359 drivers/gpu/drm/amd/display/dc/dc_helper.c uint8_t shift1, uint32_t mask1, uint32_t field_value1, field_value1 367 drivers/gpu/drm/amd/display/dc/dc_helper.c va_start(ap, field_value1); field_value1 369 drivers/gpu/drm/amd/display/dc/dc_helper.c reg_val = set_reg_field_value_ex(reg_val, field_value1, mask1, shift1); field_value1 136 drivers/gpu/drm/amd/display/dc/dm_services.h uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...); field_value1 140 drivers/gpu/drm/amd/display/dc/dm_services.h uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...); field_value1 395 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h uint8_t shift1, uint32_t mask1, uint32_t *field_value1, field_value1 399 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h uint8_t shift1, uint32_t mask1, uint32_t *field_value1, field_value1 404 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h uint8_t shift1, uint32_t mask1, uint32_t *field_value1, field_value1 410 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h uint8_t shift1, uint32_t mask1, uint32_t *field_value1, field_value1 417 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h uint8_t shift1, uint32_t mask1, uint32_t *field_value1, field_value1 425 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h uint8_t shift1, uint32_t mask1, uint32_t *field_value1, field_value1 434 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h uint8_t shift1, uint32_t mask1, uint32_t *field_value1, field_value1 485 drivers/gpu/drm/amd/display/dc/inc/reg_helper.h uint8_t shift1, uint32_t mask1, uint32_t field_value1,